ITS4040D-EP-D. 1 Overview ITS4040D-EP-D. 40 mω Dual Channel Smart High-Side Power Switch

ITS44D-EP-D 1 Overview Feaures Dual channel Smar High-Side Power Swich wih inegraed proecion and diagnosis Maximum R DS(ON) 4 mω per channel a = 25 C High oupu curren capabiliy: nominal curren up o 2.6 A Low and accurae curren limiaion: 4.1 A (± 2 %) Exended supply volage range up o 45 V All conrol inpus 24 V capable and suppor direc inerface o opocouplers All conrol inpus 3.3 V and 5 V logic level compaible 4 kv elecrosaic discharge proecion (ESD) Opimized elecromagneic compaibiliy Very small, hermally enhanced TSDSO-14 package Device robusness validaed by exended qualificaion according o JEDEC sandard JESD47J Green produc (RoHS complian) Applicaions Digial oupu modules (PLC applicaions, facory auomaion) Indusrial peripheral swiches and power disribuion Swiching resisive, inducive and capaciive loads in harsh indusrial environmens Replacemen for elecromechanical relays, fuses and discree circuis Mos suiable for loads ha require a precise curren limi Descripion The ITS44D-EP-D is a providing inegraed proecion funcions and a diagnosis feedback. Wih wo channels capable of currens of more han 2 A each, very low ypical R DS(ON) values of 6 mω a = 125 C and he small PG-TSDSO-14 exposed pad package i combines high curren capabiliy wih minimum space requiremens. The exposed pad of he hermally enhanced PG- TSDSO-14 package allows a very efficien hea ransfer from he device o inner layers of he PCB by means of hermal vias. The power ransisors are buil by N-channel verical power MOSFETs (DMOS) wih charge pump. Daa Shee 1 Rev. 1. www.infineon.com/indusrial-profe

Overview The ITS44D-EP-D is specifically designed o swich resisive, inducive or capaciive loads in harsh indusrial environmens. The ITS44D-EP-D is equipped wih essenial proecion feaures ha make i exremely robus. Diagnosic informaion can be read ou via he STATUS oupu (ST). The wo channel device can be conrolled wih wo separae inpu pins. Due o heir high volage capabiliy he inpu pins can be direcly inerfaced o opocouplers wihou addiional exernal componens. Diagnosic Funcions Shor circui o ground (overload) indicaion Overemperaure swich off indicaion Sable diagnosic signal during shor circui and overemperaure shudown Inelligen channel faul deecion sysem Proecion Funcions Sable behavior during undervolage Overemperaure proecion wih resar afer cooling down phase Overload- and shor circui proecion Reverse polariy / inverse curren proecion wih exernal componens Overvolage proecion wih exernal componens Loss of ground proecion The qualificaion of his produc is based on JEDEC JESD47J and may reference exising qualificaion resuls of similar producs. Such referring is jusified by he srucural similariy of he producs. The produc is no qualified and manufacured according o he requiremens of Infineon Technologies wih regard o auomoive and/or ransporaion applicaions. Infineon Technologies adminisraes a comprehensive qualiy managemen sysem according o he laes version of he ISO91 and IATF 16949. The mos updaed cerificaes of he ISO91 and IATF 16949 are available a www.infineon.com/cms/en/produc/echnology/qualiy/ Type Package Marking ITS44D-EP-D PG-TSDSO-14 ITS44D Daa Shee 2 Rev. 1.

Table of Conens 1 Overview........................................................................ 1 Table of Conens................................................................. 3 2 Block Diagram................................................................... 5 3 Pin Configuraion................................................................. 6 3.1 Pin Assignmen PG-TSDSO-14.............................................................. 6 3.2 Pin Definiions and Funcions PG-TSDSO-14................................................. 6 3.3 Volage and Curren Definiions............................................................ 7 4 General Produc Characerisics.................................................... 8 4.1 Absolue Maximum Raings................................................................ 8 4.2 Funcional Range........................................................................ 1 4.3 Typical Performance Characerisics Operaing Curren..................................... 11 4.4 Thermal Resisance...................................................................... 12 5 Power Sage.................................................................... 14 5.1 Oupu ON-sae Resisance.............................................................. 14 5.2 Turn ON/OFF Characerisics wih Resisive Load........................................... 14 5.3 Inducive Load.......................................................................... 15 5.3.1 Oupu Clamping...................................................................... 15 5.3.2 Maximum Load Inducance............................................................. 16 5.4 Inverse Curren Capabiliy................................................................ 16 5.5 Elecrical Characerisics: Power Sage.................................................... 18 5.6 Typical Performance Characerisics Power Sage.......................................... 2 6 Proecion Funcions............................................................. 23 6.1 Loss of Ground Proecion................................................................ 23 6.2 Undervolage Proecion................................................................. 24 6.2.1 Overvolage Proecion................................................................. 24 6.3 Reverse Polariy Proecion............................................................... 26 6.4 Overload Proecion..................................................................... 27 6.4.1 Curren Limiaion..................................................................... 27 6.4.2 Temperaure Limiaion in he Power DMOS.............................................. 28 6.5 Elecrical Characerisics: Proecion Funcions............................................. 28 6.6 Typical Performance Characerisics Proecion Funcions................................... 29 7 Diagnosic Funcions............................................................. 3 7.1 Elecrical Characerisics Diagnosic Funcion.............................................. 31 7.2 Channel Faul Deecion.................................................................. 31 7.3 Typical Performance Characerisics Diagnosic Funcions................................... 33 8 Inpu Pins...................................................................... 34 8.1 Inpu Circuiry........................................................................... 34 8.2 Inpu Pin Volage........................................................................ 34 8.3 Elecrical Characerisics: Inpu Pins....................................................... 35 8.4 Typical Performance Characerisics Inpu Pins............................................. 36 9 Applicaion Informaion.......................................................... 37 9.1 Thermal Consideraions.................................................................. 38 1 Package Oulines................................................................ 4 Daa Shee 3 Rev. 1.

11 Revision Hisory................................................................. 41 Daa Shee 4 Rev. 1.

Block Diagram 2 Block Diagram ITS44D-EP-D Bias Volage Sensor Over Temperaure IN1 3 ESD Proecion Driver Logic Gae conrol & Charge Pump Over Curren Swich Limi Clamp for Inducive Loads 12 OUT1 Channel 1 ST 5 Bias Volage Sensor Over Temperaure IN2 7 ESD Proecion Driver Logic Gae conrol & Charge Pump Over Curren Swich Limi Clamp for Inducive Loads 1 OUT2 Channel 2 PG-TSDSO-14 2 GND Figure 1 Block Diagram: ITS44D-EP-D Daa Shee 5 Rev. 1.

Pin Configuraion 3 Pin Configuraion 3.1 Pin Assignmen PG-TSDSO-14 TM 1 14 OUT1 GND 2 13 N.C. IN1 3 12 OUT1 N.C. 4 11 N.C. ST 5 1 OUT2 N.C. 6 9 N.C. IN2 7 8 OUT2 Figure 2 Pin Configuraion PG-TSDSO-14 3.2 Pin Definiions and Funcions PG-TSDSO-14 Pin Symbol Funcion 1 TM Tes Mode Enry; mus be conneced o device GND (pin 2) via resisor 1) 2 GND Ground 3 IN1 INpu channel 1; Inpu signal for channel 1 acivaion, Acive High 5 ST STaus feedback; Acive Low ; connec wih exernal pull-up resisor o High 7 IN2 INpu channel 2; Inpu signal for channel 2 acivaion, Acive High 8,1 OUT2 OUTpu 2; Proeced high-side power oupu channel 2 12, 14 OUT1 OUTpu 1; Proeced high -side power oupu channel 1 4, 6, 9, 11,13 N.C. No Conneced Exposed Pad VS Volage Supply 1) o ensure proper funcionaliy of he device he TM pin mus be conneced o device ground. In order o proec he pin furhermore in case of reverse polariy condiions or ground shifs he TM pin needs o be conneced wih a serial resisor o device ground. The recommended value for his resisor is 2.2 kω. Daa Shee 6 Rev. 1.

Pin Configuraion 3.3 Volage and Curren Definiions Figure 3 shows all erms used in his daa shee, wih associaed convenion for posiive values. I S VS I IN1 IN1 OUT1 VDS1 I OUT1 I ST I IN2 ST IN2 ITS44D-EP-D OUT2 VDS2 I OUT2 VS VIN1 VST VIN2 GND VOUT1 VOUT2 I GND Figure 3 Volage and Curren Definiions Daa Shee 7 Rev. 1.

General Produc Characerisics 4 General Produc Characerisics 4.1 Absolue Maximum Raings Table 1 Absolue Maximum Raings 1) = -4 C o 15 C, posiive curren flowing ino pin; (unless oherwise specified) Parameer Symbol Values Uni Noe or Tes Condiion Number Min. Typ. Max. Supply Volages Supply volage -.3 45 V P_4.1.1 Reverse polariy volage -(REV) 28 V 2) <2min P_4.1.3 T A = 25 C R L 25 Ω Z GND = 15 Ω Power Resisor Supply volage for shor (SC) 36 V P_4.1.4 circui proecion Inpu Pins Volage a INPUT pins V IN -.3 45 V > V IN P_4.1.5 Curren hrough INPUT pins IN I -2 2 ma P_4.1.6 STATUS Pin Volage a ST pin T -.3 45 V > T P_4.1.7 Curren hrough ST pin ST I -2 2 ma P_4.1.8 Power Sage Power dissipaion (DC) P TOT 1.9 W 3) T A = 85 C < 15 C P_4.1.1 Maximum energy dissipaion single pulse (one channel) E AS 185 mj L I =2A = 15 C =28V P_4.1.11 < 2 min Volage a power ransisor V DS 65 V P_4.1.12 Currens Curren hrough ground pin I GND -2 2 ma P_4.1.13 Temporary reverse curren I GND -2 ma P_4.1.21 hrough ground pin o Temperaures Juncion emperaure -4 15 C P_4.1.14 Sorage emperaure T STG -55 15 C P_4.1.15 ESD Suscepibiliy ESD suscepibiliy (all pins) V ESD_HBM -2 2 kv HBM 4) P_4.1.16 ESD suscepibiliy OUT Pin vs. GND and conneced V ESD_HBM -4 4 kv HBM 4) P_4.1.17 Daa Shee 8 Rev. 1.

General Produc Characerisics Table 1 Absolue Maximum Raings 1) (con d) = -4 C o 15 C, posiive curren flowing ino pin; (unless oherwise specified) Parameer Symbol Values Uni Noe or Tes Condiion Number Min. Typ. Max. ESD suscepibiliy V ESD_CDM -5 5 V CDM 5) P_4.1.18 ESD suscepibiliy pin (corner pins) V ESD_CDM -75 75 V CDM 5) P_4.1.19 1) No subjec o producion es; specified by design. 2) Reverse polariy proecion can only be achieved in combinaion wih exernal componens: o limi he curren hrough he GND-pah a 15 Ω power resisor needs o be placed beween GND-pin and ground. An alernaive soluion is o use a reverse curren diode in he GND-pah o realize reverse polariy proecion. In his case placing a resisor in he range of 27 Ω in series o he diode is recommended o improve a he same ime he overvolage capabiliy in case of overvolage pulses on. 3) This parameer serves as reference for he hermal budge: i illusraes he power dissipaion ha can be handled by he device in an applicaion under he given boundary condiions before exceeding he maximum raing of when assuming a R hja value for a hermally well dimensioned PCB connecion like given in he JEDEC case P_4.3.3 in Chaper 4.4. As R hja depends srongly on he applied PCB and layou of any individual applicaion he acual achievable values of P TOT can eiher be lower or higher depending on he given applicaion. 4) ESD suscepibiliy, HBM according o ANSI/ESDA/JEDEC JS-1(1.5 kω, 1 pf). 5) ESD suscepibiliy, Charged Device Model CDM JEDEC JESD22-C11. Noes 1. Sresses above he ones lised here may cause permanen damage o he device. Exposure o absolue maximum raing condiions for exended periods may affec device reliabiliy. 2. Inegraed proecion funcions are designed o preven IC desrucion under faul condiions described in he daa shee. Faul condiions are considered as ouside normal operaing range. Proecion funcions are no designed for coninuous repeiive operaion. Daa Shee 9 Rev. 1.

General Produc Characerisics 4.2 Funcional Range Table 2 Funcional Range = -4 C o 15 C; (unless oherwise specified) Parameer Symbol Values Uni Noe or Number Min. Typ. Max. Tes Condiion Nominal operaing volage (NOM) 8 24 36 V > V IN P_4.2.1 Exended operaing volage (EOP) 5 45 V 1) > V IN OUT I =2A V DS <.5V P_4.2.2 Minimum funcional supply volage during power-up (OP)_MIN 4.3 5 V > V IN OUT I =A o V DS <.5V ( rising; powering up) Undervolage shudown (UV) 3 3.5 4.1 V > V IN from V DS <.5V o OUT I =A ( dropping from funcional range) Undervolage shudown hyseresis (UV)_HYS 85 mv 1) Operaing curren One channel acive Operaing curren Boh channels acive ( 25 C) Operaing curren Boh channels acive ( = 15 C) 1) No subjec o producion es; specified by design. GND_1 I 3 4.1 ma = V IN =24V Device in R DS(ON) GND_2 I 5.2 6.8 ma = V IN =24V Device in R DS(ON) 25 C GND_2_15 I 4.8 6. ma = V IN =24V Device in R DS(ON) = 15 C P_4.2.3 P_4.2.4 P_4.2.5 P_4.2.6 P_4.2.7 P_4.2.9 Juncion Temperaure -4 15 C P_4.2.8 Noe: Wihin he funcional range he IC operaes as described in he circui descripion. The elecrical characerisics are specified wihin he condiions given in he relaed elecrical characerisics able. Daa Shee 1 Rev. 1.

General Produc Characerisics 4.3 Typical Performance Characerisics Operaing Curren Typical Performance Characerisics Operaing Curren I GND versus Juncion Temperaure Operaing Curren I GND versus Supply Volage 7 6 = 24 V 1 channel acive 2 channels acive 7 6 = 25 C 1 channel acive 2 channels acive 5 5 I GND [ma] 4 3 I GND [ma] 4 3 2 2 1 1 5 5 1 15 [ C] 1 2 3 4 [V] Daa Shee 11 Rev. 1.

General Produc Characerisics 4.4 Thermal Resisance Table 3 Thermal Resisance 1) Parameer Symbol Values Uni Noe or Number Min. Typ. Max. Tes Condiion Juncion o exposed pad soldering poin R hjc 1 K/W P_4.3.1 Juncion o ambien All channels acive R hja_2s2pvia 34 K/W 2) P_4.3.3 Juncion o ambien R hja_1sp 19 K/W 3) P_4.3.4 All channels acive Juncion o ambien R hja_1sp_3mm 51 K/W 4) P_4.3.5 All channels acive Juncion o ambien R hja_1sp_6mm 42 K/W 5) P_4.3.6 All channels acive 1) No subjec o producion es; specified by design. 2) Specified R hja value is according o JEDEC JESD51-2,-5,-7 a naural convecion on FR4 2s2p board; he produc (chip + package) was simulaed on a 76.2 114.3 1.5 mm board wih 2 inner copper layers (2 7 µm Cu, 2 35 µm Cu). Where applicable a hermal via array under he exposed pad conaced he firs inner copper layer. 3) Specified R hja value is according o JEDEC JESD51-3 a naural convecion on FR4 1sp board, fooprin; The produc (chip + package) was simulaed on a 76.2 x 114.3 x 1.5 mm board wih 1 x 7 µm Cu. 4) Specified R hja value is according o JEDEC JESD51-3 a naural convecion on FR4 1sp board, 3 mm; The produc (chip + package) was simulaed on a 76.2 x 114.3 x 1.5 mm board wih 1 x 7 µm Cu. 5) Specified R hja value is according o JEDEC JESD51-3 a naural convecion on FR4 1sp board, 6 mm; The produc (chip + package) was simulaed on a 76.2 x 114.3 x 1.5 mm board wih 1 x 7 µm Cu. 1, 1, Thermal Impedance (one channel acive; P DISSIPATION =.46W) Z H-JA [K/W] 1, 1,,1,1,,, Rh-JA (fooprin only) Rh-JA (1sp_3mm) Rh-JA (1sp_6mm) Rh-JA (2s2p-via), 1,E-9 1,E-7 1,E-5 1,E-3 1,E-1 ime [s] Figure 4 Thermal Impedance (shor ime scale; one channel acive) Daa Shee 12 Rev. 1.

General Produc Characerisics Z H-JA [K/W] 14, 12, 1, 8, 6, Thermal Impedance (one channel acive; P DISSIPATION =.46W) Rh-JA (fooprin only) Rh-JA (1sp_3mm) Rh-JA (1sp_6mm) Rh-JA (2s2p-via) 4, 2,, 1,E-5 1,E-3 1,E-1 1,E+1 1,E+3 ime [s] Figure 5 Thermal Impedance (long ime scale; one channel acive) Daa Shee 13 Rev. 1.

Power Sage 5 Power Sage The power sages are buil using an N-channel verical power MOSFET (DMOS) wih charge pump. 5.1 Oupu ON-sae Resisance The ON-sae resisance R DS(ON) of he power sage depends on supply volage as well as on juncion emperaure. Figure 6 shows he influence of emperaure on he ypical ON-sae resisance. The behavior of he power sage in reverse polariy condiion is described in Chaper 6.3. 8 7 6 5 R DSON [mω] 4 3 2 1 5 5 1 15 [ C] Figure 6 Typical ON-sae Resisance 5.2 Turn ON/OFF Characerisics wih Resisive Load A High signal a he inpu pin (see Chaper 8) causes he power DMOS o swich ON wih a dedicaed slope, which is opimized in erms of EMC emission. Figure 7 shows he ypical iming when swiching a resisive load. IN V IN_H V IN_L V OUT dv/d ON dv/d OFF 9% 7% ON OFF_delay 3% 1% ON_delay OFF Swiching imes.vsd Figure 7 Swiching a Resisive Load Timing Daa Shee 14 Rev. 1.

Power Sage 5.3 Inducive Load 5.3.1 Oupu Clamping When swiching OFF inducive loads wih high-side swiches, he volage V OUT drops below ground poenial, because he inducance inends o coninue driving he curren. To preven he desrucion of he device by avalanche due o high volage drop over he power sage a volage clamp mechanism Z DS(AZ) is implemened ha limis negaive oupu volage o a cerain level ( - V DS(AZ) ). The clamping mechanism allows in addiion a fas demagneizaion of inducive loads because during he phase of acive clamping he power is dissipaed o a grea exen rapidly inside he swich. On he oher hand he power dissipaed inside he swich while swiching off inducive loads can cause considerable sress o he device. Therefore he maximum allowed energy a a given curren (and by his also he inducance) is limied. In Figure 8 and Figure 9 he basic principle of acive clamping as well as simplified waveforms when swiching off inducive loads are illusraed. ITS44D-EP-D VS VS Bias ZDS(AZ) VDS INx Driver Logic OUTx IL VÎN L, R L GND VOUT ZGND Figure 8 Oupu Clamp IN V OUT -V DS(AZ) I L Swiching an inducance.vsd Figure 9 Swiching an Inducive Load Timing Daa Shee 15 Rev. 1.

Power Sage 5.3.2 Maximum Load Inducance During demagneizaion of inducive loads, he following energy mus be dissipaed in he ITS44D-EP-D: E = L V DS( AZ) ----- R L V DS( AZ) R L R L I L V DS( AZ) -------------------------------- 1 ln -------------------------------- + I L (5.1) Assuming R L =Ω simplifies he calculaion: E = V DS( AZ) 1 2 -- L I 2 1 -------------------------------- (5.2) The energy, which may be convered ino hea, is limied by he hermal design of he componen. Figure 1 shows he maximum allowed energy dissipaion as a funcion of he load curren for a singular pulse even on one channel. 6 Single Channel Pulse @ 15 C Single Channel Pulse @ 125 C 5 4 EAS [mj] 3 2 1 1 1.5 2 2.5 3 3.5 4 I Load [A] Figure 1 Maximum Energy Dissipaion Single Pulse for a Single Channel, _START = 15 C; =28V 5.4 Inverse Curren Capabiliy In case of inverse curren, meaning a volage V INV a he OUTpu higher han he supply volage, a curren I INV will flow from oupu o pin via he body diode of he power ransisor (please refer o Figure 11). Channels ha are acive (ON-sae) by he ime when he inverse curren condiion appears will remain acive and heir oupu sage will follow he sae of he corresponding IN pin, which means ha he channel can be swiched off during inverse curren condiion. Channels ha are inacive (OFF-sae) by he ime when he inverse curren condiion appears will remain inacive regardless of he sae of he corresponding IN pin. If during an inverse curren condiion he IN-pin of a channel is se from Low o High in order o acivae he channel, he oupu sage of he channel is kep OFF unil he inverse curren disappears. For all cases he curren I INV should no be higher han I L(INV). Please noe ha during inverse curren condiion he proecion funcions of concerned channels are no available. Daa Shee 16 Rev. 1.

Power Sage ITS44D-EP-D Bias IN x Gae Driver V INV Device Logic Inv. Comp OUT x I L(INV) GND Z GND Figure 11 Inverse Curren Circuiry I L(INV) Inverse Curren Even V IN Channel Sae ON OFF OFF ON Figure 12 Inverse Curren even: channel in OFF-sae (channel remains off for duraion of inverse curren even) Daa Shee 17 Rev. 1.

Power Sage I L(INV) Inverse Curren Even V IN Channel Sae ON OFF OFF ON OFF Figure 13 Inverse Curren even: channel in ON-sae (oupu no influenced bu can be swiched off) 5.5 Elecrical Characerisics: Power Sage Table 4 Elecrical Characerisics: Power Sage =8V o 36V, = -4 C o 15 C (unless oherwise specified). Typical values are given a =24V, =25 C Parameer Symbol Values Uni Noe or Min. Typ. Max. Tes Condiion ON-sae resisance per channel ( = 25 C) ON-sae resisance per channel ( = 125 C) ON-sae resisance per channel ( = 15 C) Nominal load curren per channel Drain o source clamping volage V DS(AZ) = [ - V OUT] Oupu leakage curren per channel Oupu leakage curren per channel R DS(ON) 4 mω Lx I =2A V IN =4.5V = 25 C Number P_5.5.18 R DS(ON)_125 6 mω 1) Lx I =2A V IN =4.5V = 125 C P_5.5.19 R DS(ON)_15 8 mω Lx I =2A P_5.5.1 V IN =4.5V = 15 C L(NOM)1 I 2.6 A 1) 2) < 15 C P_5.5.2 V DS(AZ) 65 7 75 V I DS =5mA P_5.5.5 L(OFF) I.1.5 µa 1) V IN floaing V OUT =V 85 C L(OFF)_15 I 1 5 µa V IN floaing V OUT =V = 15 C P_5.5.6 P_5.5.4 Daa Shee 18 Rev. 1.

Power Sage Table 4 Elecrical Characerisics: Power Sage (con d) =8V o 36V, = -4 C o 15 C (unless oherwise specified). Typical values are given a =24V, =25 C Parameer Symbol Values Uni Noe or Min. Typ. Max. Tes Condiion Inverse curren capabiliy L(INV) I 2.2 A 1) 3) < V OUTX <2min Slew rae (swich on) ΔV/Δ ON.3.75 1.9 V/µs R L =12Ω 3% o 7% of =24V Slew rae (swich off) -ΔV/Δ OFF.3.75 1.9 V/µs R L =12Ω 7% o 3% of =24V Turn-ON ime o VOUT = 9% ON 2 55 1 µs R L =12Ω =24V Turn-OFF ime o VOUT = OFF 2 55 1 µs R L =12Ω 1% =24V Turn-ON / OFF maching Δ SW -5 5 µs R L =12Ω OFF - ON =24V Turn-ON ime o VOUT = 1% ON_delay 25 5 µs R L =12Ω =24V Turn-OFF ime o VOUT = OFF_delay 25 5 µs R L =12Ω 9% =24V Number P_5.5.7 P_5.5.8 P_5.5.9 P_5.5.11 P_5.5.12 P_5.5.13 P_5.5.14 P_5.5.15 1) No subjec o producion es; specified by design. 2) This parameer describes he nominal load capabiliy per channel from an elecrical poin of view respecing a maximum 15 C. Please noe ha depending on he individual hermal design of a real applicaion (and a poenially insufficien hermal budge resuling hereof) addiional resricions for I L(NOM) may occur for pure hermal reasons in order no o exceed he maximum allowed juncion emperaure = 15 C. The laer needs o be considered especially for cases where boh channels are operaing simulaneously under high load condiions and a high ambien emperaure T AMB. For furher deails abou poenial deraing of he nominal load curren due o hermal resricions please refer o Thermal Consideraions on Page 38. 3) Please noe ha during inverse curren condiion he proecion feaures are no operaional. Daa Shee 19 Rev. 1.

Power Sage 5.6 Typical Performance Characerisics Power Sage Typical Performance Characerisics ON-Sae Resisance R DSON versus Juncion Temperaure Leakage Curren per channel I L(OFF) versus Juncion Temperaure 8 7 = 24 V; I Load = 2A 2 1.8 = 24 V 6 1.6 1.4 R DSON [mω] 5 4 3 I L(OFF) [ua] 1.2 1.8 2.6.4 1.2 5 5 1 15 [ C] Oupu Clamp Volage V DS(AZ) versus Juncion Temperaure 5 5 1 15 [ C] 75 74 73 72 V DS(AZ) [V] 71 7 69 68 67 66 CH 1 CH 2 65 5 5 1 15 [ C] Daa Shee 2 Rev. 1.

Power Sage Turn-ON ime ON o V OUT =9% versus Juncion Temperaure Turn-OFF ime OFF o V OUT =9% versus Juncion Temperaure 1 9 = 24V 1 9 = 24V 8 8 7 7 6 6 ON [us] 5 OFF [us] 5 4 4 3 3 2 I Load =.5A I Load = 1.A 1 I Load = 2.A I Load = 2.5A 5 5 1 15 [ C] Turn-ON delay ime ON_delay o V OUT =1% versus Juncion Temperaure 2 I Load =.5A I Load = 1.A 1 I Load = 2.A I Load = 2.5A 5 5 1 15 [ C] Turn-OFF delay ime OFF_delay o V OUT = 1% versus Juncion Temperaure 5 45 = 24V 5 45 = 24V 4 4 35 35 ON_delay [us] 3 25 2 OFF_delay [us] 3 25 2 15 15 1 I Load =.5A I Load = 1.A 5 I Load = 2.A I Load = 2.5A 5 5 1 15 [ C] 1 I Load =.5A I Load = 1.A 5 I Load = 2.A I Load = 2.5A 5 5 1 15 [ C] Daa Shee 21 Rev. 1.

Power Sage Turn-ON ime ON o V OUT =9% versus Load Curren I Load Turn-OFF ime OFF o V OUT =9% versus Load Curren I Load 1 9 = 4 C = 25 C 1 9 = 4 C = 25 C 8 = 15 C 8 = 15 C 7 7 6 6 ON [us] 5 OFF [us] 5 4 4 3 3 2 2 1 = 24 V 1 = 24 V.5 1 1.5 2 2.5 3 I Load [A] Turn-ON delay ime ON_delay o V OUT =1% versus Load Curren I Load.5 1 1.5 2 2.5 3 I Load [A] Turn-OFF delay ime OFF_delay o V OUT = 1% versus Load Curren I Load 5 45 = 4 C = 25 C 5 45 = 4 C = 25 C 4 = 15 C 4 = 15 C 35 35 ON_delay [us] 3 25 2 OFF_delay [us] 3 25 2 15 15 1 1 5 = 24 V 5 = 24 V.5 1 1.5 2 2.5 3 I Load [A].5 1 1.5 2 2.5 3 I Load [A] Daa Shee 22 Rev. 1.

Proecion Funcions 6 Proecion Funcions The device provides inegraed proecion funcions. Exposure o absolue maximum raing condiions for exended periods may affec device reliabiliy. Proecion funcions are designed o preven he desrucion of he ITS44D-EP-D due o faul condiions described in he daa shee. Please noe ha faul condiions are no considered as normal operaion condiions and he proecion funcions are neiher designed for coninuous operaion nor for repeiive operaion. 6.1 Loss of Ground Proecion In case of loss of module ground when he load remains conneced o ground, he device proecs iself by auomaically urning OFF (when i was previously ON) or remains OFF, regardless of he volage applied a he inpu pins. In an applicaion where he inpus are direcly conrolled by logic levels < (e.g. by a microconroller wihou galvanic isolaion), i is recommended o use inpu resisors 1) beween he exernal conrol circui (microconroller) and he ITS44D-EP-D o proec also he exernal conrol circui in case of loss of device ground. In case of loss of module or device ground, a curren (I OUT(GND) ) can flow ou of he DMOS. Figure 14 skeches he siuaion. Z GND is recommended o be a resisor in series o a diode. ITS44D-EP-D R ST + - ST Z D(AZ) Z DS(AZ) R IN IN x Logic I OUT(GND) OUT x GND Z GND Figure 14 Loss of Ground Proecion wih Exernal Componens 1) Recommended value is 1 kω Daa Shee 23 Rev. 1.

Proecion Funcions 6.2 Undervolage Proecion If he supply volage falls below (UV) he undervolage proecion of he device is riggered. (UV) represens hence he minimum volage for which he swich sill can hold ON. Once he device is off (OP)_MIN represens he lowes volage where he device is urning on again (and hus he channels can be swiched again). If he supply volage is below he undervolage hreshold (UV), he channels of he device are OFF (or urning OFF). As soon as he supply volage is recovering and exceeding he hreshold of he funcional supply volage (OP)_MIN, he device is re-powering and is channels can be swiched again. In addiion he proecion funcions as well as diagnosis become operaional once (OP)_MIN is reached. Figure 15 skeches he undervolage mechanism. V OUT (UV) (OP)_MIN Figure 15 Undervolage Behavior 6.2.1 Overvolage Proecion There is an inegraed clamping mechanism for overvolage proecion (Z D(AZ) ). To ensure his mechanism operaes properly in he applicaion, he curren in he Zener diode Z D(AZ) mus be limied by a ground resisor. Figure 16 shows a ypical applicaion o wihsand overvolage issues. In case of supply volage higher han (AZ), he volage across supply o ground pah is clamped. As a resul, he inernal ground poenial rises o - (AZ). Due o he ESD Zener diodes, he poenial a pin INx rises almos o ha poenial, depending on he impedance of he conneced circuiry 1). In he case he device was ON, prior o overvolage, he ITS44D- EP-D remains ON. In case he ITS44D-EP-D was OFF, prior o overvolage, he power ransisor can be acivaed. In case he supply volage is above (SC) and below V DS(AZ), he oupu ransisor is sill operaional and follows he inpu. If a leas one channel is in ON-sae, parameers are no longer wihin specified range and lifeime is reduced compared o he nominal supply volage range. This especially impacs he shor circui robusness, as well as he maximum energy E AS capabiliy. Z GND is recommended o be eiher a resisor (27 Ω) in series o a diode or alernaively a 15 Ω power resisor. 1) Hence, he usage of exernal inpu resisors needs o be considered. Daa Shee 24 Rev. 1.

Proecion Funcions I SOV + - Z DS(AZ) R ST ST Z D(AZ) R IN IN x Logic I OUT OUT x ITS44D-EP-D GND Z GND Figure 16 Overvolage Proecion wih Exernal Componens Daa Shee 25 Rev. 1.

Proecion Funcions 6.3 Reverse Polariy Proecion In case of reverse polariy, he inrinsic body diodes of he affeced power DMOS-channels will dissipae power. The curren flowing hrough he inrinsic body diode is limied exernally by he load iself. Bu in addiion he curren ino he ground pah and he logic pins mus be limied by an exernal resisor o he maximum allowed curren described in Chaper 4.1. Figure 17 shows a ypical applicaion. Z GND resisor is used o limi he curren hrough he Zener proecion of he device. Z GND is recommended o be eiher a resisor (~ 27 Ω) in series o a diode or alernaively a power resisor (~ 15 Ω). During reverse polariy no proecion funcions are available. Microconroller Proecion diodes ITS44D-EP-D V DS(REV) - + -(REV) Z DS(AZ) RST ST Z D(AZ) RIN IN x Logic OUT x GND Z GND Figure 17 Reverse Polariy Proecion wih Exernal Componens Daa Shee 26 Rev. 1.

Proecion Funcions 6.4 Overload Proecion In case of overload, such as high inrush curren of a cold lamp filamen, or shor circui o ground, he ITS44D-EP-D offers a se of proecion mechanisms which is illusraed in Figure 18. 6.4.1 Curren Limiaion As a firs sep, he insananeous power in he swich is conained wihin a safe range by limiing he curren o he maximum curren allowed in he swich I L(LIM). During his ime, where he curren is limied o I L(LIM) he DMOS emperaure is increasing caused by he volage drop V DS over he DMOS. Overemperaure concep: Overemperaure behavior: V IN H ON heaing up (SC) L V OUT ON OFF OFF Device Saus cooling down (SC) (SC) (SC) Normal Toggling Overemperaure T H L OFF ON OFF ON OFF Waveforms urn on ino a shor circui: Waveforms shor circui during on sae: V IN H V IN H L V OUT ON OFF L V OUT ON OFF I L(LIM) I L(LIM) T H L ST(FAULT)_SC1 Normal OFF Overloaded OFF OFF OUT shored o GND operaion T H L ST(FAULT) OFF Shu down by overemperaure and resar afer cooling down (hermal oggling) once he device exceeds hermal hreshold afer being heaed up during curren limiaion sae Shu down by overemperaure and resar afer cooling down (hermal oggling) once he device exceeds hermal hreshold afer being heaed up during curren limiaion sae Figure 18 Proecion behavior of he ITS44D-EP-D Daa Shee 27 Rev. 1.

Proecion Funcions 6.4.2 Temperaure Limiaion in he Power DMOS Each channel incorporaes one emperaure sensor. Acivaion of his emperaure sensor will cause an overheaed channel o swich OFF o preven desrucion. Any proecive overemperaure shudown even riggered wihin a channel is swiching OFF he oupu of he corresponding channel unil he emperaure reaches an accepable value again. A resar funcionaliy is implemened ha is swiching he channel ON again afer he DMOS emperaure has sufficienly cooled down. 6.5 Elecrical Characerisics: Proecion Funcions Table 5 Elecrical Characerisics: Proecion Funcions 1) =8V o 36V, = -4 C o 15 C (unless oherwise specified). Typical values are given a =24V, = 25 C Parameer Symbol Values Uni Noe or Min. Typ. Max. Tes Condiion Loss of Ground Oupu leakage curren OUT(GND) I.1 ma 2) 3) =24V while GND disconneced Reverse Polariy Drain source diode volage during reverse polariy V DS(REV) 65 7 mv L I =-2A = 15 C Number P_6.5.1 P_6.5.2 Overvolage Overvolage proecion (AZ) 65 7 75 V 4) SOV I =5mA P_6.5.3 Overload Condiion Load curren limiaion L(LIM) I 3.3 4.1 4.9 A P_6.5.4 Thermal shudown (SC) 15 175 2 C 3) P_6.5.6 emperaure Thermal shudown Δ(SC) 3 K 3) P_6.5.7 hyseresis 1) Exposure o absolue maximum raing condiions for exended periods may affec device reliabiliy. Inegraed proecion funcions are designed o preven IC from desrucion under faul condiions described in he daa shee. Faul condiions are considered as ouside normal operaing range. Proecion funcions are designed neiher for coninuous nor repeiive operaion. 2) All pins are disconneced excep and OUT. 3) No subjec o producion es; specified by design. 4) For pracical cases i is recommended o place a resisor in he range of 27 Ω ino he GND pah o limi he GND curren associaed wih overvolage evens. Daa Shee 28 Rev. 1.

Proecion Funcions 6.6 Typical Performance Characerisics Proecion Funcions Typical Performance Characerisics Curren Limi I L(LIM) versus Juncion Temperaure Clamping Volage (AZ) versus Volage 6 75 74 5 73 4 72 71 I L(LIM) [A] 3 (AZ) [V] 7 69 2 68 1 V DS = 12V 67 66 5 5 1 15 [ C] 65 5 5 1 15 [ C] Daa Shee 29 Rev. 1.

Diagnosic Funcions 7 Diagnosic Funcions For diagnosis purpose, he ITS44D-EP-D provides a digial signal a pin ST. This signal is called STATUS. The STATUS pin is realized as open drain oupu and mus be conneced o an exernal pull-up resisor. During normal operaion he STATUS signal is logic High (H). During shor circui o ground or overemperaure condiion he STATUS signal is logic Low (L). Table 6 shows he corresponding ruh able. Table 6 1) 2) Diagnosic Truh Table Device Operaion IN1 IN2 OUT1 OUT2 ST Commen Normal Operaion L L OFF OFF H Exernal pull up a ST pin H H ON ON H H L ON OFF H L H OFF ON H Shor Circui o GND on CH1 H H ON ON L 3) H L ON OFF L Shor Circui o GND on CH2 H H ON ON L L H OFF ON L Shor Circui o GND on CH 1 + 2 H H ON ON L Overemperaure on CH1 H H OFF 4) ON L H L OFF 4) OFF L Overemperaure on CH2 H H ON OFF 4) L L H OFF OFF 4) L Overemperaure on CH 1 + 2 H H OFF 4) OFF 4) L 1) Please refer o Table 7 for more deails. 2) No subjec o producion es; specified by design. 3) Device no in specified R DS(ON). 4) Channel remains OFF during cooling-down phase of power sage; hen channel ries o re-sar. Daa Shee 3 Rev. 1.

Diagnosic Funcions 7.1 Elecrical Characerisics Diagnosic Funcion Table 7 Elecrical Characerisics: Diagnosics =8V o 36V, = -4 C o 15 C (unless oherwise specified). Typical values are given a =24V, = 25 C Parameer Symbol Values Uni Noe or Min. Typ. Max. Tes Condiion Diagnosic Timing in Overload Condiion STATUS seling ime for overload deecion STATUS seling ime for channel sar-up ino exising overload 2) 7.2 Channel Faul Deecion ST(FAULT) 25 µs 1) =24V load jump of R L : 12 Ω -> 3.3 Ω Please refer o Figure 18 for more deails ST(FAULT)_SC1-35 9 µs V DS 8V; Please refer o Figure 18 for more deails Number P_7.1.1 P_7.1.9 Low level STATUS volage T(L).5 V 3) ST I =1.6mA P_7.1.3 High level STATUS volage T(H) 2 4) V > T P_7.1.4 Curren hrough STATUS pin ST I 1.6 ma T <.5V P_7.1.5 (Operaing Range) Channel faul deecion T x 3 6 µs T <.5V 5) P_7.1.2 inerrogaion ime (Sequenial Pulse Widh) STATUS signal High valid T m 4 8 15 µs 5) P_7.1.6 window afer T x on faul affeced channel Minimum delay beween T X-2-X 2 µs 1) P_7.1.8 subsequen T x inerrogaion windows Maximum delay ime T D 8 µs 1) P_7.1.7 beween T x ( High o Low ) on faul affeced channel and STATUS High signal T m 1) No subjec o producion es, specified by design 2) This parameer describes he saus seling ime when a channel is swiched on ino an already exising overload condiion. This parameer is referenced o he edge of he inpu pin IN ha swiches he channel ino overload. 3) Levels referenced o device ground. 4) Depends on pull-up circui ha is used wihin applicaion; maximum raings of STATUS pin need o be respeced. 5) Please refer o Channel Faul Deecion on Page 31 for more deails. The ITS44D-EP-D is equipped wih an inelligen channel faul deecion sysem, which allows wih he aid of a microconroller o idenify and communicae he channel on which he faul occurs. Daa Shee 31 Rev. 1.

Diagnosic Funcions During normal operaion he STATUS pin is kep High by he exernal pull-up resisor as shown in Table 6. If - in case of a faul - he applicaion requires he informaion on which of he channels he faul occurs when a Low STATUS is flagged, hen he microconroller can be programmed according o he sequence depiced as an example in Figure 19. The figure shows a case where boh channels are acive. During normal operaion of channels 1 and 2 he saus signal is High. Le us now assume ha a faul occurs on channel 2. The saus signal goes low o flag an error o he microconroller. In order o disinguish wheher he faul occurs on channel 1 or channel 2 he microconroller mus send a low pulse T X sequenially o each inpu pin of he acivaed channels. The pulses T X versus ime are shown in Figure 19. Time T x should be beween 3 µs up o 6 µs in order o ensure ha he oupu does no reac o his Low pulse a he inpu. The saus signal goes High for a shor period of ime T m only afer he channel on which he faul occurs ges a Low pulse from he microconroller, which in his case is afer channel 2 receives a low pulse for a ime T x. By his means, he microconroller is able o deec on which channel he faul occurs. Once he microconroller receives his informaion, i can swich OFF he channel on which he faul occurs (channel 2 in his case) via he inpu pin IN2. For he maximum delay ime T D beween T x going Low and T m going High a value of 8 µs needs o be aken ino accoun. Normal Operaion Faul a channel 2 Normal Operaion STATUS IN1 IN2 T m T D? T X T m Faul Channel T D T X T X-2-X A flipped ST-pin signal following a T X inerrogaion pulse wihin a ime window T M on a given channel confirms a faul channel. A non-flipped ST-pin signal afer a T X pulse (dashed lines) indicae ha corresponding channel is no in faul condiion. Figure 19 Channel Faul Deecion Timing Diagram Daa Shee 32 Rev. 1.

Diagnosic Funcions 7.3 Typical Performance Characerisics Diagnosic Funcions Typical Performance Characerisics Saus Seling Time ST(FAULT) versus Juncion Temperaure (overload during ON) Saus Seling Time ST(Faul)_SC1 versus Juncion Temperaure (swich on ino overload) 5 45 yp. ST(Faul) for R L : 12 Ω > 3.3Ω yp. ST(Faul) for R L : 12 Ω > Ω 8 7 ST(Faul)_SC1 4 35 = 24V 6 ST(Faul) [us] 3 25 2 ST(Faul)_SC1 [us] 5 4 3 15 1 2 5 5 5 1 15 [ C] 1 = 24V V DS = 8V 5 5 1 15 [ C] Maximum Delay Time T D (T X H->L o ST L->H ) vs Juncion Temperaure ST HIGH Valid window (afer T X ) T M versus Juncion Temperaure 1 1 9 T D 9 T M 8 8 7 7 6 6 T D [us] 5 T M [us] 5 4 4 3 3 2 2 1 = 24V 5 5 1 15 [ C] 1 = 24V 5 5 1 15 [ C] Daa Shee 33 Rev. 1.

Inpu Pins 8 Inpu Pins 8.1 Inpu Circuiry The inpu circuiry is compaible wih 3.3 V and 5 V microconrollers as well as inpu levels up o 1). The concep of he inpu pin is o reac o volage hresholds which are referenced o device ground. An implemened Schmi rigger avoids any undefined sae if he volage on he inpu pin is slowly increasing or decreasing. The oupu is eiher OFF or ON bu canno be in a linear or undefined sae. Figure 2 shows he elecrical equivalen inpu circuiry. In case a channel is permanenly no needed, he corresponding inpu pin shall no be lef floaing bu ied wih a serial resisor o device ground (no module ground). The recommended value for he serial resisor is 2.2 kω. ITS44Q-EP-D Bias IN x Gae Driver V IH Device Logic Inv. Comp OUT x GND Z GND Figure 2 Inpu Pin Circuiry 8.2 Inpu Pin Volage The inpu pin IN uses a comparaor wih hyseresis. Swiching ON / OFF of he channels akes place in a defined region, se by he hresholds V IN(L),max and V IN(H),min. The exac values where he ON and OFF ake 1) V IN mus no exceed. The relaion V IN mus always be fulfilled. Daa Shee 34 Rev. 1.

Inpu Pins place depend on he process, as well as he emperaure. To avoid cross alk and parasiic urn-on or urn- OFF, a hyseresis is implemened. This ensures an improved immuniy o noise. 8.3 Elecrical Characerisics: Inpu Pins Table 8 Elecrical Characerisics: Inpu Pins 8 = 8 V o 36 V, = -4 C o 15 C (unless oherwise specified). Typical values are given a = 24 V, = 25 C Parameer Symbol Values Uni Noe or Min. Typ. Max. Tes Condiion INpu Pins Characerisics Low level inpu volage V IN(L) -.3.8 V 1) range High level inpu volage V IN(H) 2 36 V 1) > V IN range Inpu volage hyseresis V IN(HYS) 45 mv 2) Number P_8.3.1 P_8.3.2 P_8.3.3 Low level inpu curren I IN(L) 37 7 µa V IN =.8V P_8.3.4 High level inpu curren I IN(H) 44 7 µa V IN =24V P_8.3.5 1) Levels referenced o device ground. 2) No subjec o producion es; specified by design. Daa Shee 35 Rev. 1.

Inpu Pins 8.4 Typical Performance Characerisics Inpu Pins Typical Performance Characerisics Inpu Volage hresholds V IN(L) V IN(H) versus Juncion Temperaure Inpu Volage hyseresis V IN(HYS) versus Juncion Temperaure 2.8 1.8 1.6 1.4 1.2.7.6.5 V IN(HYS) V IN [V] 1 V IN [V].4.8.3.6.4.2.2 = 24V 5 1 15 [ C] Inpu Pin Curren I IN(H) versus Supply Volage V IN(H) V IN(L).1 = 24V 5 1 15 [ C] Inpu Pin Curren I IN(H) versus Juncion Temperaure 7 4 C 7 V IN = 24V 6 25 C 15 C 6 5 5 4 4 I IN [ua] 3 I IN [ua] 3 2 2 1 = 28.8V 1 5 1 15 2 25 V IN [V] 5 1 15 [ C] Daa Shee 36 Rev. 1.

Applicaion Informaion 9 Applicaion Informaion Noe: This is a very simplified example of an applicaion circui. The funcion mus be verified in he real applicaion. VOUT Linear Volage Regulaor e.g. IFX1763 VIN Exernal componens for Surge Immuniy COUT VS V DD Microconroller e.g. XMC4xxx I/O IN1 VS OUT1 I/O V DD ST ITS44D-EP-D LOAD 1 I/O IN2 OUT2 GND TM LOAD 2 GND Z GND Exernal componens for reverse polariy proecion and overvolage pulses. Recommended seup for Z GND is a diode for reverse polariy in series wih a resisor of ~27Ω o limi GND curren during overvolage spikes. Figure 21 Applicaion Diagram wih ITS44D-EP-D In Figure 21 above a simplified applicaion diagram is shown where he inpus are galvanically isolaed from wih opocouplers. Thanks o he fac ha he inpu pins are 24 V capable hey can be direcly conneced o he opocouplers. Reverse polariy proecion can be achieved wih exernal componens. In his conex i should be noed ha inpu pins of channels which are permanenly unused have o be ied wih 2.2 kω resisance o device ground. In addiion he TM-pin mus be always ied wih a serial resisor o device ground in order o proec he pin in case of reverse polariy. The recommended value for his serial resisor is also 2.2 kω. For applicaions where no galvanic isolaion is presen beween he exernal conrol circuiry (e.g microconroller) and he inpu pins of he ITS44D-EP-D serial inpu resisors need o be placed in order o proec he exernal conrol circuiry and he inpu srucures of he ITS44D-EP-D under faul condiions (like e.g. reverse polariy, loss of ground or overvolage). For furher deails please also refer o he corresponding secions in Chaper 6. The recommended value for such serial inpu resisors is 1 kω however Daa Shee 37 Rev. 1.

Applicaion Informaion applicaion specific opimized values may also depend on he individual applicaion condiions as well as he applied exernal conrol circuiry / microconroller. 9.1 Thermal Consideraions If he cooling possibiliies wihin he applicaion are no sufficien o sink he hea of he dissipaed power he juncion emperaure of he device may exceed is maximum specified raing of 15 C and evenually rigger a hermal shudown of he overheaed channels o proec he device from desrucion. Such hermal shudown evens may occur e.g. if one or more channels are operaed in overload condiions ha are causing he curren limiaion funcionaliy o become acive. If he curren limiaion of a channel becomes acive he power dissipaion will rise rapidly and in many cases lead o hermal shudown evens of he corresponding channels wihin shor periods of ime. Bu also under nominal load condiions he power dissipaion can become oo high inside an applicaion if i is applied a high environmenal emperaure T AMB and if a he same ime he cooling capabiliy of he PCB is no sufficien. In general he cooling capabiliy of an IC on a PCB wihin an applicaion can be described for saic cases by is hermal resisance from juncion-o-ambien R hja. The hermal resisance R hja can be improved by adding cooling area on op- or boom layer of he PCB or by adding inner layers ha are conneced o he layer wih hermal vias. Thermal vias show he bes efficiency for hea disribuion if direcly placed underneah he exposed pad of he ITS44D. The achievable values for R hja will differ from applicaion o applicaion. As reference simulaion resuls for a se of sandardized JEDEC cases are provided in Chaper 4.4 Thermal Resisance on Page 12. Acual values in real applicaions naurally can be lower or higher. For cases where he achievable hermal resisance R hja and he hereof resuling hermal budge wihin an applicaion is no sufficien for a given ambien emperaure T AMB here is no oher choice han o lower he load curren o smaller numbers han he elecrically allowed maximum nominal curren of 2.6 A. Figure 22 illusraes how he deraing of he nominal curren as a funcion of achievable R hja a a given T AMB can look like. The graphs show how he hermal budge wih is limiing condiion = 15 C can be shared beween he influencing parameers T AMB, R hja, Load I depending on he number of acive channels n CH. One can see ha hanks o he excellen RDSON values of he ITS44D a deraing needs o be applied only in cases wih PCB s showing exremely poor hermal performance. The calculaion of he hermal budge follows simple rules as given in he equaions below. I should be noed ha he calculaion is resriced o saic cases where he resuling T AMB and have reached a sable equilibrium. 2 P DISS = I Load = T AMB + R hja P DISS R DS(ON) n CH + I GND (9.1) (9.2) Daa Shee 38 Rev. 1.

Applicaion Informaion 2.5 2.5 2 2 I nom,max [A] 1.5 I nom,max [A] 1.5 1 1.5 R hja = 4 K/W R hja = 48 K/W R hja =12 K/W 1 channel acive ( = 28V) 2 3 4 5 6 7 8 9 1 T AMB [ C].5 R hja = 4 K/W R hja = 48 K/W R hja =12 K/W 2 channels acive ( = 28V) 2 3 4 5 6 7 8 9 1 T AMB [ C] Figure 22 Thermal deraing of nominal curren due o insufficien cooling performance of PCB Daa Shee 39 Rev. 1.

Package Oulines 1 Package Oulines Figure 23 PG-TSDSO-14 (Plasic Dual Small Ouline Package) (RoHS-Complian) Green Produc (RoHS complian) To mee he world-wide cusomer requiremens for environmenally friendly producs and o be complian wih governmen regulaions he device is available as a green produc. Green producs are RoHS-Complian (i.e Pb-free finish on leads and suiable for Pb-free soldering according o IPC/JEDEC J-STD-2). For furher informaion on alernaive packages, please visi our websie: hp://www.infineon.com/packages. Dimensions in mm Daa Shee 4 Rev. 1.

Revision Hisory 11 Revision Hisory Revision Dae Changes 1. Daa Shee (Iniial Release) Daa Shee 41 Rev. 1.

Revision Hisory Daa Shee 42 Rev. 1.

Revision Hisory Daa Shee 43 Rev. 1.

Trademarks of Infineon Technologies AG µhvic, µipm, µpfc, AU-ConverIR, AURIX, C166, CanPAK, CIPOS, CIPURSE, CoolDP, CoolGaN, COOLiR, CoolMOS, CoolSET, CoolSiC, DAVE, DI-POL, DirecFET, DrBlade, EasyPIM, EconoBRIDGE, EconoDUAL, EconoPACK, EconoPIM, EiceDRIVER, eupec, FCOS, GaNpowIR, HEXFET, HITFET, HybridPACK, imotion, IRAM, ISOFACE, IsoPACK, LEDrivIR, LITIX, MIPAQ, ModSTACK, my-d, NovalihIC, OPTIGA, OpiMOS, ORIGA, PowIRaudio, PowIRSage, PrimePACK, PrimeSTACK, PROFET, PRO-SIL, RASIC, REAL3, SmarLEWIS, SOLID FLASH, SPOC, SrongIRFET, SupIRBuck, TEMPFET, TRENCHSTOP, TriCore, UHVIC, XHP, XMC. Trademarks updaed November 215 Oher Trademarks All referenced produc or service names and rademarks are he propery of heir respecive owners. Ediion Published by Infineon Technologies AG 81726 Munich, Germany 218 Infineon Technologies AG. All Righs Reserved. Do you have a quesion abou any aspec of his documen? Email: erraum@infineon.com IMPORTANT NOTICE The informaion given in his documen shall in no even be regarded as a guaranee of condiions or characerisics ("Beschaffenheisgaranie"). Wih respec o any examples, hins or any ypical values saed herein and/or any informaion regarding he applicaion of he produc, Infineon Technologies hereby disclaims any and all warranies and liabiliies of any kind, including wihou limiaion warranies of non-infringemen of inellecual propery righs of any hird pary. In addiion, any informaion given in his documen is subjec o cusomer's compliance wih is obligaions saed in his documen and any applicable legal requiremens, norms and sandards concerning cusomer's producs and any use of he produc of Infineon Technologies in cusomer's applicaions. The daa conained in his documen is exclusively inended for echnically rained saff. I is he responsibiliy of cusomer's echnical deparmens o evaluae he suiabiliy of he produc for he inended applicaion and he compleeness of he produc informaion given in his documen wih respec o such applicaion. For furher informaion on echnology, delivery erms and condiions and prices, please conac he neares Infineon Technologies Office (www.infineon.com). Please noe ha his produc is no qualified according o he AEC Q1 or AEC Q11 documens of he Auomoive Elecronics Council. WARNINGS Due o echnical requiremens producs may conain dangerous subsances. For informaion on he ypes in quesion please conac your neares Infineon Technologies office. Excep as oherwise explicily approved by Infineon Technologies in a wrien documen signed by auhorized represenaives of Infineon Technologies, Infineon Technologies producs may no be used in any applicaions where a failure of he produc or any consequences of he use hereof can reasonably be expeced o resul in personal injury.