NOT REOMMENDED FOR NEW DESIGNS REOMMENDED REPLAEMENT PART ISL8393 Low-Voltage, Single and Dual Supply, Quad SPDT, Analog Switches DATASHEET FN638 Rev 3. The Intersil ISL8394 device is a precision, quad SPDT analog switches designed to operate from a single +2V to +12V supply or from a 2V to 6V supply. Targeted applications include battery powered equipment that benefit from the devices low power consumption (5 W), low leakage currents (2.5nA max), and fast switching speeds (t ON = ns, t OFF = ns). A 4 maximum R ON flatness ensures signal fidelity, while channel to channel mismatch is guaranteed to be less than 2. The ISL8394 is a quad single-pole/double-throw (SPDT) device and can be used as a quad SPDT, a quad 2:1 multiplexer, a single 4:1 multiplexer, or a dual 2-channel differential multiplexer. Table 1 summarizes the performance of this family. For higher performance, pin compatible versions, see the ISL4324 data sheet. onfiguration 5V R ON 5V t ON /t OFF 5V R ON 5V t ON /t OFF 3V R ON 3V t ON /t OFF Package Ordering Information PART NUMBER TABLE 1. FEATURES AT A GLANE PART MARKG TEMP. RANGE ( ) ISL8394 Quad SPDT 17 ns/ns 8ns/4ns 75 1ns/75ns Ld SOI PAKAGE PKG. DWG. # ISL8394IB ISL8394IB -4 to 85 Ld SOI M.3 ISL8394IBZ (See Note) ISL8394IBZ -4 to 85 Ld SOI (Pb-free) M.3 *Add -T suffix for tape and reel. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 1% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IP/JEDE J STD-. Features Drop-in Replacement for MAX394 Four Separately ontrolled SPDT Switches ON Resistance (R ON )........... 17 Typ) 35 Max) R ON Matching Between hannels.................. <1 Low harge Injection..................... 1p (Max) Low Power onsumption (P D )....................<5 W Low Leakage urrent (Max at 85 )............ 2.5nA Fast Switching Action - t ON.................................... ns - t OFF................................... ns Guaranteed Break-Before-Make Minimum V ESD Protection per Method.7 TTL, MOS ompatible Pb-Free Plus Anneal Available (RoHS ompliant) Applications Battery Powered, Handheld, and Portable Equipment - Barcode Scanners - Laptops, Notebooks, Palmtops ommunications Systems - Radios - Base Stations - RF Tee Switches Test Equipment - Ultrasound - AT/PET SAN - Electrocardiograph Audio and Video Switching General Purpose ircuits - +3V/+5V DAs and ADs - Digital Filters - Operational Amplifier Gain Switching Networks - High Frequency Analog Switching - High Speed Multiplexing Related Literature Technical Brief TB363 Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs) Application Note AN557 Recommended Test Procedures for Analog Switches FN638 Rev 3. Page 1 of 11
Pinout (Note 1) 1 NO1 OM1 N1 N2 OM2 NO2 2 1 2 3 4 5 6 7 8 9 1 ISL8394 (SOI) TOP VIEW 4 19 18 17 16 14 13 12 11 NO4 OM4 N4 N.. N3 OM3 NO3 3 Pin Descriptions P FUNTION Positive Power Supply Input Negative Power Supply Input. onnect to for Single Supply onfigurations. OM NO N N.. Ground onnection Digital ontrol Input Analog Switch ommon Pin Analog Switch Normally Open Pin Analog Switch Normally losed Pin No Internal onnection NOTE: 1. Switches Shown for Logic Input. Truth Table LOGI ISL8394 NO SW ISL8394 N SW OFF ON 1 ON OFF NOTE: Logic.8V. Logic 1 2.4V. FN638 Rev 3. Page 2 of 11
Absolute Maximum Ratings to...................................... -.3 tov to.................................... -.3 tov to.................................... - to.3v All Other Pins (Note 2)............. (() -.3V) to (() +.3V) ontinuous urrent (Any Terminal)..................... ma Peak urrent,, NO, N, or OM (Pulsed 1ms, 1% Duty ycle, Max)................. 1mA ESD Rating (Per MIL-STD-883 Method )..............>2kV Thermal Information Thermal Resistance (Typical, Note 3) JA ( /W) Ld SOI Package........................ 95 Maximum Junction Temperature (Plastic Package)........ 1 Moisture Sensitivity (See Technical Brief TB363) SOI Package.................................. Level 1 Maximum Storage Temperature Range............. -65 to 1 Maximum Lead Temperature (Soldering 1s)............ (Lead Tips Only) Operating onditions Temperature Range ISL8394IX................................. -4 to 85 AUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 2. Signals on N, NO, OM, or exceeding or are clamped by internal diodes. Limit forward diode current to maximum current ratings. 3. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details. Electrical Specifications: 5V Supply Test onditions: V SUPPLY = 4.5V to 5.5V, = V, V H = 2.4V, V L =.8V (Note 4), Unless Otherwise Specified PARAMETER TEST ONDITIONS TEMP ( ) M TYP MAX UNITS ANALOG SWITH HARATERISTIS Analog Signal Range, V ANALOG Full - V ON Resistance, R ON V S = 4.5V, I OM = 1mA, V NO or V N = 3.5V, (See Figure 5) - 17 35 Full - - 45 R ON Matching Between hannels, V S = 5V, I OM = 1mA, V NO or V N = 3V -.5 2 R ON Full - - 4 R ON Flatness, R FLAT(ON) V S = 5V, I OM = 1mA, V NO or V N = 3V, V, (Note 7) - - 4 Full - - 6 NO or N OFF Leakage urrent, I NO(OFF) or I N(OFF) V S = 5.5V, V OM = 4.5V, V NO or V N = +4.5V, (Note 6) -.2 -.2 na Full -2.5-2.5 na OM ON Leakage urrent, V S = 5.5V, V OM = V NO or V N = 4.5V, (Note 6) -.4 -.4 na I OM(ON) Full -5-5 na DIGITAL PUT HARATERISTIS Input Voltage High, V H Full 2.4 - - V Input Voltage Low, V L Full - -.8 V Input urrent, I H, I L V S = 5.5V, V = V or Full -1 1 A DYNAMI HARATERISTIS Turn-ON Time, t ON Turn-OFF Time, t OFF Break-Before-Make Time Delay, t D V S = 4.5V, V NO or V N = 3V, R L =, L = 35pF, V = to 3V, (See Figure 1) V S = 4.5V, V NO or V N = 3V, R L =, L = 35pF, V = to 3V, (See Figure 1) V S = 5.5V, V NO or V N = 3V, R L =, L = 35pF, V = to 3V, (See Figure 3) - 1 ns Full - - 175 ns - 75 ns Full - - 1 ns 2 1 - ns harge Injection, Q L = 1.nF, V G = V, R G =, (See Figure 2) - 5 1 p NO OFF apacitance, OFF f = 1MHz, V NO or V N = V OM = V, (See Figure 7) - 12 - pf FN638 Rev 3. Page 3 of 11
Electrical Specifications: 5V Supply Test onditions: V SUPPLY = 4.5V to 5.5V, = V, V H = 2.4V, V L =.8V (Note 4), Unless Otherwise Specified (ontinued) PARAMETER TEST ONDITIONS TEMP ( ) M TYP MAX UNITS N OFF apacitance, OFF f = 1MHz, V NO or V N = V OM = V, (See Figure 7) - 12 - pf OM ON apacitance, OM(ON) f = 1MHz, V NO or V N = V OM = V, (See Figure 7) - 39 - pf OFF Isolation R L =, L = pf, f = 1MHz, - 71 - db rosstalk, (Note 8) V NO or V N = 1V RMS, (See Figures 4 and 6) - -92 - db POWER SUPPLY HARATERISTIS Power Supply Range Full 2. - 6 V Positive Supply urrent, I+ V S = 5.5V, V = V or, Switch On or Off -1.1 1 A Negative Supply urrent, I- -1.1 1 A NOTES: 4. V = Input voltage to perform proper function. 5. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. 6. Leakage parameter is 1% tested at high temp, and guaranteed by correlation at. 7. Flatness is defined as the difference between maximum and minimum value of on-resistance over the specified analog signal range. Flatness specifications are guaranteed only with specified voltages. 8. Between any two switches. Electrical Specifications: 5V Supply Test onditions: = +4.5V to +5.5V, = = V, V H = 2.4V, V L =.8V (Note 4), Unless Otherwise Specified PARAMETER TEST ONDITIONS TEMP ( ) M TYP MAX UNITS ANALOG SWITH HARATERISTIS Analog Signal Range, V ANALOG Full - V ON Resistance, R ON = 5V, I OM = 1.mA, V NO or V N = 3.5V, (See Figure 5) - 65 Full - - 75 R ON Matching Between hannels, = 5V, I OM = 1.mA, V NO or V N = 3V -.5 2 R ON Full - - 4 R ON Flatness, R FLAT(ON) = 5V, I OM = 1.mA, V NO or V N = 1V, 2V, 3V, (Note 7) NO or N OFF Leakage urrent, I NO(OFF) or I N(OFF) = 5.5V, V OM = 1V, 4.5V, V NO or V N = 4.5V, 1V, (Note 6) - - 6 Full - - 8 -.2 -.2 na Full -2.5-2.5 na OM ON Leakage urrent, = 5.5V, V OM = V NO or V N = 4.5V, (Note 6) -.4 -.4 na I OM(ON) Full -5-5 na DIGITAL PUT HARATERISTIS Input Voltage High, V H Full 2.4 - - V Input Voltage Low, V L Full - -.8 V Input urrent, I H, I L = 5.5V, V = V or DYNAMI HARATERISTIS Turn-ON Time, t ON = 4.5V, V NO or V N = 3V, R L =, L = 35pF, V = to 3V, (See Figure 1) - 8 2 ns Full - - ns FN638 Rev 3. Page 4 of 11
Electrical Specifications: 5V Supply Test onditions: = +4.5V to +5.5V, = = V, V H = 2.4V, V L =.8V (Note 4), Unless Otherwise Specified (ontinued) PARAMETER TEST ONDITIONS TEMP ( ) M TYP MAX UNITS Turn-OFF Time, t OFF Break-Before-Make Time Delay, t D = 4.5V, V NO or V N = 3V, R L =, L = 35pF, V = to 3V, (See Figure 1) = 5.5V, V NO or V N = 3V, R L =, L = 35pF, V = to 3V, (See Figure 3) - 4 1 ns Full - - 175 ns 5 - ns harge Injection, Q L = 1.nF, V G = V, R G = See Figure 2) - 3 5 p POWER SUPPLY HARATERISTIS Power Supply Range Full 2-12 V Positive Supply urrent, I+ = 5.5V, = V, V = V or, Switch On or Off -1.1 1 A Negative Supply urrent, I- -1.1 1 A Electrical Specifications: 3.3V Supply Test onditions: = +3.V to +3.6V, = = V, V H = 2.4V, V L =.8V (Note 4), Unless Otherwise Specified PARAMETER TEST ONDITIONS TEMP ( ) M TYP MAX UNITS ANALOG SWITH HARATERISTIS Analog Signal Range, V ANALOG Full - V ON Resistance, R ON = 3V, I OM = 1.mA, V NO or V N = 1.5V - 75 185 Full - - 2 NO or N OFF Leakage urrent, I NO(OFF) or I N(OFF) = 3.6V, V OM = V, 4.5V, V NO or V N = 3V, 1V, (Note 6) -.2 -.2 na Full -2.5-2.5 na OM ON Leakage urrent, = 3.6V, V OM = V NO or V N = 3V, (Note 6) -.4 -.4 na I OM(ON) Full -5-5 na DIGITAL PUT HARATERISTIS Input Voltage High, V H Full 2.4 - - V Input Voltage Low, V L Full - -.8 V Input urrent, I H, I L = 3.6V, V = V or DYNAMI HARATERISTIS Turn-ON Time, t ON Turn-OFF Time, t OFF Break-Before-Make Time Delay, t D = 3.V, V NO or V N = 1.5V, R L =, L = 35pF, V = to 3V, (See Figure 1) = 3.V, V NO or V N = 1.5V, R L =, L = 35pF, V = to 3V, (See Figure 1) = 3.6V, V NO or V N = 1.5V, R L =, L = 35pF, V = to 3V, (See Figure 3) - 1 4 ns - 75 1 ns 5 - ns harge Injection, Q L = 1.nF, V G = V, R G = See Figure 2) - 1 5 p POWER SUPPLY HARATERISTIS Power Supply Range Full 2-12 V Positive Supply urrent, I+ = 3.6V, = V, V = V or, Switch On or Off -1.1 1 A Negative Supply urrent, I- -1.1 1 A FN638 Rev 3. Page 5 of 11
Test ircuits and Waveforms LOGI PUT 3V V % t r < ns t f < ns V N SWITH OUTPUT V NO V N t ON t OFF Logic input waveform is inverted for switches that have the opposite logic sense. t ON 75% % t OFF FIGURE 1A. MEASUREMENT POTS 75% % V NO FIGURE 1. SWITHG TIMES SWITH PUTS N NO OM R L L 35pF LOGI PUT Repeat test for all switches. L includes fixture and stray capacitance. R L = V ------------------------------ (NO or N) R L + R ON FIGURE 1B. TEST IRUIT SWITH OUTPUT R G OM NO OR N LOGI PUT ON OFF ON 3V V V G L Q = x L LOGI PUT Logic input waveform is inverted for switches that have the opposite logic sense. FIGURE 2A. MEASUREMENT POTS FIGURE 2. HARGE JETION Repeat test for all switches. L includes fixture and stray capacitance. FIGURE 2B. TEST IRUIT LOGI PUT SWITH OUTPUT 3V V V t D 8% V NX LOGI PUT NO N OM R L L 35pF Repeat test for all switches. L includes fixture and stray capacitance. FIGURE 3A. MEASUREMENT POTS FIGURE 3. BREAK-BEFORE-MAKE TIME FIGURE 3B. TEST IRUIT FN638 Rev 3. Page 6 of 11
Test ircuits and Waveforms (ontinued) SIGNAL GENERATOR NO OR N R ON = V 1 /1mA NO OR N V NX V OR 2.4V 1mA V 1.8V OR 2.4V ANALYZER OM OM R L Repeat test for all switches. FIGURE 4. OFF ISOLATION TEST IRUIT Repeat test for all switches. FIGURE 5. R ON TEST IRUIT SIGNAL GENERATOR NO1 OR N1 OM1 NO OR N V or 2.4V 1 2 V OR 2.4V IMPEDANE ANALYZER V OR 2.4V ANALYZER R L OM2 NO2 or N2 NO ONNETION OM FIGURE 6. ROSSTALK TEST IRUIT FIGURE 7. APAITANE TEST IRUIT Detailed Description The ISL8394 quad analog switches offer precise switching capability from a bipolar 2V to 6V or a single 2V to 12V supply with low on-resistance (17 ) and high speed operation (t ON = ns, t OFF = ns). The devices are especially well suited to portable battery powered equipment thanks to the low operating supply voltage (2V), low power consumption (5 W), low leakage currents (2.5nA max). High frequency applications also benefit from the wide bandwidth, and the very high off isolation and crosstalk rejection. Supply Sequencing And Overvoltage Protection With any MOS device, proper power supply sequencing is required to protect the device from excessive input currents which might permanently damage the I. All I/O pins contain ESD protection diodes from the pin to and to (see Figure 8). To prevent forward biasing these diodes, and must be applied before any input signals, and input signal voltages must remain between and. If these conditions cannot be guaranteed, then one of the following two protection methods should be employed. Logic inputs can easily be protected by adding a 1k resistor in series with the input (see Figure 8). The resistor limits the input current below the threshold that produces permanent damage, and the sub-microamp input current produces an insignificant voltage drop during normal operation. Adding a series resistor to the switch input defeats the purpose of using a low R ON switch, so two small signal diodes can be added in series with the supply pins to provide overvoltage protection for all pins (see Figure 8). These additional diodes limit the analog signal from 1V below to FN638 Rev 3. Page 7 of 11
1V above. The low leakage current performance is unaffected by this approach, but the switch resistance may increase, especially at low supply voltages. OPTIONAL PROTETION RESISTOR X V NO or N Power-Supply onsiderations The ISL8394 construction is typical of most MOS analog switches, in that they have three supply pins:,, and. and drive the internal MOS switches and set their analog voltage limits, so there are no connections between the analog signal path and. Unlike switches with a 13V maximum supply voltage, the ISL8394 V maximum supply voltage provides plenty of room for the 1% tolerance of 12V supplies ( 6V or 12V single supply), as well as room for overshoot and noise spikes. This family of switches performs equally well when operated with bipolar or single voltage supplies.the minimum recommended supply voltage is 2V or 2V. It is important to note that the input signal range, switching times, and onresistance degrade at lower supply voltages. Refer to the electrical specification tables and Typical Performance curves for details. and power the internal logic (thus setting the digital switching point) and level shifters. The level shifters convert the logic levels to switched and signals to drive the analog switch gate terminals. Logic-Level Thresholds and power the internal logic stages, so has no affect on logic thresholds. This switch family is TTL compatible (.8V and 2.4V) over a supply range of 2.7V to 1V. At 12V the V IH level is about 2.5V. This is still below the TTL guaranteed high output minimum level of 2.8V, but noise margin is reduced. For best results with a 12V supply, use a logic family that provides a V OH greater than 3V. FIGURE 8. OVERVOLTAGE PROTETION OPTIONAL PROTETION DIODE V OM OPTIONAL PROTETION DIODE High-Frequency Performance In 5 systems, signal response is reasonably flat even past MHz (see Figure ), with a small signal -3dB bandwidth in excess of MHz, and a large signal bandwidth exceeding MHz. An off switch acts like a capacitor and passes higher frequencies with less attenuation, resulting in signal feedthrough from a switch s input to its output. Off Isolation is the resistance to this feedthrough, while rosstalk indicates the amount of feedthrough from one switch to another. Figure 16 details the high Off Isolation and rosstalk rejection provided by this switch. At 1MHz, off isolation is about db in 5 systems, decreasing approximately db per decade as frequency increases. Higher load impedances decrease Off Isolation and rosstalk rejection due to the voltage divider action of the switch OFF impedance and the load impedance. Leakage onsiderations Reverse ESD protection diodes are internally connected between each analog-signal pin and both and. One of these diodes conducts if any analog signal exceeds or. Virtually all the analog leakage current comes from the ESD diodes to or. Although the ESD diodes on a given signal pin are identical and therefore fairly well balanced, they are reverse biased differently. Each is biased by either or and the analog signal. This means their leakages will vary as the signal varies. The difference in the two diode leakages to the and pins constitutes the analog-signalpath leakage current. All analog leakage current flows between each pin and one of the supply terminals, not to the other switch terminal. This is why both sides of a given switch can show leakage currents of the same or opposite polarity. There is no connection between the analog signal paths and. The digital input stages draw supply current whenever the digital input voltage is not at one of the supply rails. Driving the digital input signals from to with a fast transition time minimizes power dissipation. FN638 Rev 3. Page 8 of 11
Typical Performance urves T A =, Unless Otherwise Specified R ON ( ) 1 62.5 37.5 12.5 85-4 = -5V = V 85-4 V OM = () - 1V I OM = 1mA 3 4 5 6 7 8 9 1 11 12 (V) FIGURE 9. ON RESISTANE vs SUPPLY VOLTAGE R ON ( ) 8 7 6 4 6 4 35 85 = 5V 85-4 85-4 = V I OM = 1mA = 2.7V = V = 3.3V = V -4 1 2 3 4 5 V OM (V) FIGURE 1. ON RESISTANE vs SWITH VOLTAGE R ON ( ) 45 4 35 35 1 I OM = 1mA 85 85 85-4 V S = 5V V S = 2V V S = 3V -4 1-4 5-5 -4-3 -2-1 1 2 3 4 5 V OM (V) FIGURE 11. ON RESISTANE vs SWITH VOLTAGE Q (p) 1 5 = 3.3V = 5V -5 V S = 5V -1-5 -2.5 2.5 5 V OM (V) FIGURE 12. HARGE JETION vs SWITH VOLTAGE FN638 Rev 3. Page 9 of 11
Typical Performance urves T A =, Unless Otherwise Specified (ontinued) t ON (ns) 2 1-4 = -5V V OM = () - 1V 1 85-4 2 = V 85 1 1-4 2 3 4 5 6 7 8 9 1 11 12 (V) (V) FIGURE 13. TURN - ON TIME vs SUPPLY VOLTAGE FIGURE 14. TURN - OFF TIME vs SUPPLY VOLTAGE t OFF (ns) 1 1 75 4-4 -4 85-4 = -5V V OM = () - 1V 85 = V 1 2 3 4 5 6 7 8 9 1 11 12 NORMALIZED GA (db) V S = 5V 3 GA -3 PHASE R L = V =.2V P-P V = 5V P-P V =.2V P-P V = 5V P-P 45 9 1 1 1 6 FREQUENY (MHz) FIGURE. FREQUENY RESPONSE 135 18 PHASE (DEGREES) ROSSTALK (db) -1 - - -4 - -6-7 -8-9 -1 = 3V to 12V or V S = 2V to 5V R L = ISOLATION -11 11 1k 1k 1k 1M 1M 1M M FREQUENY (Hz) ROSSTALK FIGURE 16. ROSSTALK AND OFF ISOLATION 1 4 6 7 8 9 1 OFF ISOLATION (db) Die haracteristics SUBSTRATE POTENTIAL (POWERED UP): TRANSISTOR OUNT: ISL8394: 418 PROESS: Si Gate MOS FN638 Rev 3. Page 1 of 11
Small Outline Plastic Packages (SOI) N DEX AREA 1 2 3 e D B.(.1) M A M E -B- -A- -- SEATG PLANE A B S H.(.1) M B NOTES: 1. Symbols are defined in the MO Series Symbol List in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension D does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed.mm (.6 inch) per side. 4. Dimension E does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed.mm (.1 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. L is the length of terminal for soldering to a substrate. 7. N is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width B, as measured.36mm (.14 inch) or greater above the seating plane, shall not exceed a maximum value of.61mm (.24 inch) 1. ontrolling dimension: MILLIMETER. onverted inch dimensions are not necessarily exact. A1.1(.4) L M h x 45 M.3 (JEDE MS-13-A ISSUE ) LEAD WIDE BODY SMALL OUTLE PLASTI PAKAGE HES MILLIMETERS SYMBOL M MAX M MAX NOTES A.926.143 2.35 2.65 - A1.4.118.1. - B.14.19.35.49 9.91.1.23.32 - D.4961.5118 12.6 13. 3 E.2914.2992 7.4 7.6 4 e. BS 1.27 BS - H.394.419 1. 1.65 - h.1.29..75 5 L.16..4 1.27 6 N 7 8 8 - Rev. 2 6/5 opyright Intersil Americas LL 3-6. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO91 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil orporation and its products, see www.intersil.com FN638 Rev 3. Page 11 of 11