Homework Assignment 07

Homework Assignment 07 Question 1 (Short Takes). 2 points each unless otherwise noted. 1. A single-pole op-amp has an open-loop low-frequency gain of A = 10 5 and an open loop, 3-dB frequency of 4 Hz. If an inverting amplifier with closed-loop low-frequency gain of A f = 50 uses this op-amp, determine the closed-loop bandwidth. Answer. The gain-bandwidth product is 4 10 5 Hz. The bandwidth of the closed-loop amplifier is then is 4 10 5 /50 = 8 khz. 2. A MOSFET is biased such that g m = 1.78 ma/v and I D = 1 ma. If v GS changes with 1 mv, by how much does the drain current change? δi D = g m δv GS = (1.78 10 3 )(1 10 3 ) = 1.78 µa 3. The units for the λ parameter for a MOSFET is V 1 4. The op-amp in the circuit is ideal, and R 1 = 10K, R 2 = 100K, and R 3 = 10K. The input resistance that the source sees is (a) R 1 = 10K (b) R 1 + R 3 = 20K (virtual short between + and ) (c) (Ideal op-amp has R i = ) (d) R 1 R 2 R 3 = 4.72K (KCL at terminal) Answer: R 1 = 10K, so (a) is the answer. 5. What is frequency is 3 decades down from 220 Hz? (a) 22 mhz (b) 220 mhz (c) 6.4 mhz (d) 190 Hz Answer: 3 = log(220 f x ), so that f x = 220 mhz, so (b) is the answer. 6. A signal with amplitude v = 4 V at 4 khz decreases as frequency increases at 2 db/octave. What is the amplitude in V at 13 khz? (3 points) Answer: There are log 2 (13 2) = 1.7octaves between 4 khz and 13 khz. Thus, the amplitude decreases by 1.7 2 = 3.4 db. The new amplitude is 20 log 4 3.4 = 8.6 db. This is equivalent to 2.7 V. 1

7. Below are two schematics of current sources implemented with MOSFETs. Which current source has the best compliance voltage? Answer: (a) (a) (b) 8. True or false: in IC circuits, transistors are often used to replace resistors, because IC realestate is expensive, and resistors, especially large value resistors, require large surface area. Answer: True 9. True or false: assuming that g m1 = g m2 for the amplifiers below, then A v1 is larger than A v2. However, A v1 also more sensitive to FET parameter variation than A v2. Answer: True 2

10. Which one of the MOSFET circuits below behaves as a non-linear resistor? (1) (2) (3) (a) Only (1) (b) Only (2) (c) Only 3 (d) Both (1) and (3) (e) All (f) None Answer: Option (e) 11. True or false: everything else being equal, MOSFETs the drain current is directly proportional to the width-to-length ratio. Answer: True 12. Consider two MOSFETs A and B that are identical in all respects except that A s channel is twice as wide as channel B s channel: W A = 2W B. Under identical bias what is the relationship between the drain current of A and B? I DA = 2I DB 13. Consider two MOSFETs A and B that are identical in all respects except that A s channel is twice as long as channel B s channel: L A = 2L B. Under identical bias what is the relationship between the drain current of A and B? I DA = 0.5I DB 14. True or false: given the symmetrical construction of MOSFETs one can, in principle, at least, interchange the drain and the source terminals without affecting device behavior. Answer: True 15. The output frequency of a full-wave rectifier is the input frequency. Answer: Option (b) (a) one-half (b) double (c) same as (d) quarter 3

16. Write down the dc load line equation for the MOSFET in the circuit below. (3 points) Answer: V DS = V DD I D R D I D = V DD V DS R D R D 17. Write down the dc load line equation for the MOSFET in the circuit below. (3 points) Answer: V DS = V DD I D R D I D R S I D = V DD V DS R D + R S R D + R S 18. The R DS(on) for a small switching MOSFETs such as the 2N7000 is (circle one) (1 point) Answer: (b) (a) 20 mω 200 mω (b) 200 mω 20 Ω (c) 20 Ω 200 Ω 19. Briefly explain (1 2 sentences) what is R DS(on) as it pertains to MOSFETs. (3 points) Answer: R DS(on) refers to the drain-source resistance when the FET is in full saturation. That is, it is fully turned on, or V GS V TN (NMOS) and V SG V TP (PMOS). 4

20. Below is a depiction of an n-channel enhancement-mode MOSFET. Annotate the diagram with a p or n to show the type of substrate material, and then indicate the body diode. p-material substrate Body diode 21. What is the magnitude of the current phase angle for a 5.6 μf capacitor and a 50-Ω resistor in series with a 1.1 khz, 5 VAC source? (a) 72.9 (b) 62.7 (c) 27.3 (d) 17.1 Answer: The impedance of the RC circuit is = R 1 j2πfc = 50 j25.84 Ω. The magnitude of the phase angle is tan 1 ( 25.84 50) = 27.3. Thus, (c) is the answer. Question 2 In the circuit the op-amp is ideal, except for an input bias current I b = 10 na. Further, R F = 10K, R 1 = 100 Ω and C = 6.8 μf. The switch is opened at t = 0. What is the output voltage after 10 seconds? (3 points) For t 0, the voltage across the capacitor is v C = (±I b Δt) C which is (±10 10 9 ) (10) (6.8 10 6 ) = ±14.71 mv for t = 10 s. The gain of the amplifier is1 + R F R 1 = 101, so that the output voltage is ± 1.485 V. 5

Question 3 An engineer uses the circuit shown in (a) below to measure the input offset voltage V OS and input bias current I B for an op-amp. In the circuit, R 1 = 98 Ω, R F = 9.9K, and C = 13 μf. In (b) is the output voltage for various values of R T. Plot her data and use the plot to estimate V OS and I B. (10 points) (a) R T (Ω) V O (V) 0 0.088 100K 0.162 220K 0.225 350K 0.311 470K 0.373 680K 0.509 910K 0.646 (b) Shown is a plot of the data and a linear trendline. By convention I B flows into the noninverting input, and V O = AI B R T + AV OS where A is the gain of the amplifier, namely A = 1 + R F R 1 = 102.6. The intercept of the trenline corresponds to A V OS and from the plot it is 92.6 mv so that V OS = 92.6 10 3 102.6 = 0.9 mv Further, the slope of the trendline corresponds to AI B and from the plot it is 608 na so that I B = 608 10 9 102.6 = 5.9 na The negative sign indicates that I B flows out of the noninverting terminal for this circuit. 6

Question 4 Consider the following circuit. Assume that V TN = 1 V, K n = 1.5 ma V 2, and λ = 0. Sketch I D versus V DS for 0 V DS 5 V. Label and add numerical values on each the axis. Calculate and indicate V DS (sat) on the plot. Clearly indicate the saturation and Ohmic regions and the saturation current. (5 points) V DS (sat) = V GS V TN = 2 1 = 1 V In the saturation region, I D = K n (V GS V TN ) 2 = K n (2 1) 2 = 1.5 ma. Plot see below. 7

Question 5 The transistor characteristics for an NMOS FET are shown below. (a) Is this an enhancement- or depletion-mode device? (1 points) (b) Estimate a value for V TN. (5 points) (Hint: consider using the supplied graph paper) Part (a) This is an enhancement-mode device. Part (b) Make a plot of I D vs. V GS with V DS is the saturation region, for example at V DS = 15 V. Then extend the plot to I D = 0, and estimate V TN ~ 2.65 V (see below). 8

Question 6 The graph and table below summarize the output characteristics for the 2N7000 MOSFET. Use this information and estimate a value for K n. (8 points) The table below gives the numerical values of I D for various V GS at V DS = 12 V. Assume V TN = 2 V V GS (V) I D (A) 2.5 0.036 3.0 0.1 3.5 0.2 4.0 0.33 4.5 0.45 4.75 0.55 I D as a function of V GS at V DS = 12 V I D = K n (V GS V TN ) 2 I D K n = (V GS V TN ) 2 Substitute the values for V GS and I D from the table into the second equation to find K n = 0.144 A V 2,, K n = 0.073 A V 2. The average value is K n = 0.093 A V 2 9

Problem 7 The transistor in the circuit shown has K n = 0.5 ma V 2, V TN = 2 V, and λ = 0. Further, R S = 12K. Determine I DQ, assuming the MOSFET operates in the saturation region. (6 points) I D = K n (V GS V TN ) 2 Since the gate current is zero, V G = 0 and V GS = 0 V S = V S. Further, V S = 9 + I D R S so that V GS = 9 I D R S. Thus I D = K n (9 I D R S V TN ) 2 = 0.5(9 12(I D ) 2) 2 ma A trial-and-error solution reveals that I D = 0.5 ma is a solution. Question 8 The circuit shown uses an NMOS transistor to implement a current source. For the transistor, V TN = 1 V and K n = 12.5 μa V 2. What is the required value op V GS so that I dc = 25 μa? (3 points) What is the compliance voltage? (2 points) I D = K n (V GS V TN ) 2 25 10 6 = (12.5 10 6 )(V GS 1) 2 2 = (V GS 1) 2 V GS = 2 + 1 = 2.414 V To function as a current source the transistor must be in saturation, or V DS > V DS (sat). Now, V DS (sat) = V GS V TN = 2.414 1 = 1.414 V. Thus, the compliance voltage is 1.414 V. 10

Problem 9 The so-called diode-connected transistor is sub circuit that appears in many other circuits. Of interest is the output resistance. Draw the small-signal model and determine R o. Be sure to include the transistor s own output resistance r o. What is a simplified expression for R O when r O is very large? (10 points) Below is the small signal model with a test voltage V x. The next step is to find I x and then R O = V x I x. Note that v gs = V x and KCL at the drain gives I x + g m V x + V x r o = 0 V x I x = R O = When r O is large, r O g m 1 and R O 1 g m. r o = r 1 + r o g o 1 m g m 11

Problem 10 Using the results from the previous problem, determine R O for the circuits below if I D = 0.5 ma, and λ = 0.02 V 1 and K n = 0.1 ma/v 2 and K p = 0.06 ma/v 2, and R g = 1M. (6 points) (a) (b) (c) The two NMOS circuits, namely (a) and (b) have identical output resistances no current flows through R G so in both cases v G = v D. Further, g m = 2 K n I D = 0.447 ma V and r O = 1 (λi D ) = 100K. Thus R O = 1 g m r O = 2.24K 100K = 2.19K For the PMOS device Further, g m = 2 K p I D = 0.346 ma V and r O = 1 (λi D ) = 100K. Thus R O = 1 g m r O = 2.89K 100K = 2.81K 12

Question 11 A MOEFET amplifier along with the FET and circuit parameters are shown below. C C1, C C2 are coupling capacitors. Determine R 1, R 2 such that R in = 200K, and I DQ = 3 ma. (10 points) K n = 2 ma V 2 V TN = 2 V λ = 0 V DD = 15 V R S = 0.5K R D = 2K R in = 200K R 1 =? R 2 =? R L = 5K I DQ = 3 ma I DQ = K n (V GS V TN ) 2 3 10 3 = 2 10 3 (V GS 2) 2 Solving yields V GS = 3.225 V. Further, V S = I DQ R S = (3 10 3 )(0.5 10 3 ) = 1.5 V. Thus, V G = V GS + V S = 4.725 V. Resistors R 1, R 2 form a voltage divider and the task is to select value such that and R 2 15 R 1 + R2 = 4.725 V R 1 R 2 = R 1R 2 R 1 + R 2 = 200K Solving these two equations (with two unknowns), yields R 1 = 635K, and R 2 = 292K 13

Question 12 The parameters of the transistor are K n = 0.5 ma V 2, V TN = 1.2 V and λ = 0. Further, the bias current is I Q = 50 μa. Determine v GS (5 points) and v DS (2 points) for the circuit. For I D = 50 μa: I D = K n (v GS V TN ) 2 50 10 6 = (500 10 6 )(v GS 1.2) 2 v GS = 1.2 ± 50 500 v GS = 1.2 ± 0.316 v GS = 1.516 V or v GS = 0.884 V The solution v GS = 1.516 V is the proper solution since v GS = 0.884 V would imply that the FET is off, because this is less than V TN. v DS = 5 ( 1.516) = 6.516 V 14

Question 13 An op-amp has a voltage gain of 100 db at dc and a unity-gain frequency of 5 MHz. (a) What is f B, the low frequency 3-dB cutoff frequency? (2 points) (b) Write an expression for the transfer function A(f) for the open loop gain of the op amp (2 points) (c) The op-amp is used in a non-inverting configuration with a gain of 40 db. What is the bandwidth of the feedback amplifier? (2 points) (d) Write an expression for the transfer function A(f) for the feedback gain of the op amp. (2 points) (e) By how much (i.e., how many microseconds) does the amplifier delay a 10 khz sine wave? (3 points) Assume that the op-amp has a single-pole frequency response. (a) 100 db of voltage gain is equivalent to a voltage gain of 10 5 and the GBW is 5 MHz. Thus, the low frequency 3-dB point is 5 10 6 10 5 = 50 Hz. (b) The transfer function for the open loop amplifier is A(f) = 105 1 + j f. 50 (c) The GBP is 5 MHz, so that an amplifier with gain 100 ( 40 db) will have a bandwidth of 5 10 6 100 = 50 khz. (d) The transfer function for the feedback amplifier is (e) The phase at 10-kHz is 100 A(f) =. f 1 + j 50 10 3 θ = tan 1 10 103 50 103 = 11.31. The period of a 10-kHz sine wave is 100 μs so that 11.31 corresponds to a delay of Δt = 11.3 100 μs = 3.14 μs. 360 15

Question 14 Consider the amplifier shown. The transistor has an Early voltage V A = 50 V. A dc analysis reveals that I D = 1.06 ma, and g m = 0.725 ma V. Assume that the coupling capacitors are large enough so that they are shorts at the operating frequency. Draw the corresponding small-signal circuit. Incorporate the MOSFETs output resistance r o. Next, determine the amplifier s voltage gain. Finally, determine the amplifier s input and output resistances. (25 points) C C = Coupling Capacitors R G = 10M R D = 10K R L = 10K The small-signal model for the amplifier is shown right. The numerical values for all components are known, except for r o. However, we can calculate that from r o = V A I D = 47K. We can lump r o, R D, and R L together as R L = r o R D R L = 4.52K. Next, write a KCL equation at the output node v o R L + g mv gs + v o v i R G = 0 From the small-signal model it is clear that v gs = v i so that the equation above becomes Some algebraic manipulation yields v o R L + g mv i + v o v i R G = 0 A v = v o = g v m R 1 (1 g mr G ) L i 1 + (R L R G ) Substituting R L = 4.52K, g m = 0.725 ma V and R G = 10M yields A V = 3.28 3.3 16

Determine the input resistance using the standard procedure: turn off independent sources, drive the circuit with a test source V x and determine the current I x that flows. Then, R i = V x I x. Referring to the small signal model given above, we can simply replace v i with V x and then I x = V x v o R G However, we already determined that A v = 3.3 so we can write v o = 3.3V x so that I x = V x + 3.3V x R G R i = V x = R G I X 1 + 3.3 = 2.33M Determine the output resistance using the standard procedure: turn off independent sources, drive the circuit at the output with a test source V x and determine the current I x that flows. Then, R o = V x I x. If we turn off the independent source, namely v i and add a test source, the model below results. Clearly the control voltage v gs = 0 and the current source is off, so KCL at the drain gives I x + V x r o + V x R D + V x R G = 0 R o = V x I x = r o R D R G Substituting the numerical values give R o = 8.4K. 17