HCNW5/ HCPL-5/5/5/5 Single Channel, High Speed Optocouplers Data Sheet Lead (Pb) Free RoHS fully compliant RoHS fully compliant options available; -xxxe denotes a lead-free product Description These diode-transistor opto coup lers use an insulating layer between a LED and an integrated photodetector to provide elec trical in su lation between input and out put. Separate connections for the photodiode bias and output-transistor collector increase the speed up to a hundred times that of a conven tional phototransistor coupler by reduc ing the base-collector capacitance. These single channel optocoup lers are available in -Pin DIP, SO- and Widebody package configurations. The HCPL-5/5 and HCNW5/5 are designed for high speed TTL/TTL applications. A standard ma TTL sink current through the input LED will provide enough output current for TTL load and a 5. kω pull-up resistor. CTR for these devices is 9% minimum at I F = ma. Functional Diagram NC ANODE CATHODE NC 7 5 A. µf bypass capacitor must be connected between pins 5 and. V CC NC V o GND TRUTH TABLE (POSITIVE LOGIC) LED V o ON LOW OFF HIGH Features 5 kv/µs minimum common mode transient immunity at V CM = 5 V High speed: Mb/s TTL compatible Available in -Pin DIP, SO-, widebody packages Open collector output Guaranteed performance from temperature: C to 7 C Safety approval UL Recognized 75 V rms for minute (5 V rms for minute for HCNW and Option devices) per UL577 CSA Approved IEC/EN/DIN EN 77-5-5 Approved V IORM = V peak for HCPL-5# V IORM = V peak for HCNW devices Dual channel version available (5/5) MIL-PRF-5 hermetic version available (55XX/5XX/N55) Applications High voltage insulation Video signal isolation Power transistor isolation in motor drives Line receivers Feedback element in switched mode power supplies High speed logic ground isolation TTL/TTL, TTL/CMOS, TTL/LSTTL Replaces pulse transformers Replaces slow phototransistor isolators Analog signal ground isolation CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.
The HCPL-5, HCPL-5, and HCNW5 provide the electrical and switching performance of the N, HCPL- 5, and HCNW with increased ESD protection. The HCPL-5, HCPL-5, and HCNW5 are similar to the HCPL-5, HCPL-5, and HCNW5 optocouplers but have increased common mode transient immunity of 5 kv/µs minimum at V CM = 5 V guaranteed. Schematic ANODE + V F CATHODE I F I CC I O V CC V O SHIELD HCPL-5/5 HCNW5 5 GND Selection Guide Widebody Minimum CMR -Pin DIP ( Mil) Small-Outline SO- ( Mil) Hermetic Current Single Dual Single Dual Single Single and dv/dt V CM Transfer Channel Channel Channel Channel Channel Dual Channel (V/µs) (V) Ratio (%) Package Package* Package Package* Package Packages* 9 HCPL-5 HCPL-5 HCNW5 5, 5 9 HCPL-5 HCPL-5 HCPL-5 HCPL-5 HCNW5, 9 HCPL-55XX HCPL-5XX N55 *Technical data for these products are on separate Avago publications.
Ordering Information HCPL-5 and HCPL-5, HCPL-5, HCPL-5 are UL Recognized with 75 V rms for minute per UL577. HCNW5 and HCNW5 are UL Recognized with 5 V rms for minute per UL577. All devices isted above are approved under CSA Component Acceptance Notice #5, File CA. Part number HCPL-5 HCPL-5 HCPL-5 HCPL-5 HCNW5 HCNW5 RoHS Compliant Option Non RoHS Compliant -E No option Package Surface Mount Gull Wing Tape & Reel UL 5 V rms / Minute rating IEC/EN/DIN EN 77-5-5 Quantity 5 per tube -E # X X 5 per tube -5E #5 X X X per reel -E # X 5 per tube -E # mil DIP- X X X 5 per tube -5E #5 X X X X per reel -E # X 5 per tube -E # X X X 5 per tube -5E #5 X X X X per reel -E No option per tube -5E #5 X X X 5 per reel SO- -E # X per tube -5E #5 X X X X 5 per reel -E No option mil X X per tube -E # Widebody X X X X per tube -5E #5 DIP- X X X X X 75 per reel To order, choose a part number from the part number column and combine with the desired option from the option column to form an order entry. Example : HCPL-5-5E to order product of mil DIP Gull Wing Surface Mount package in Tape and Reel packaging with IEC/EN/DIN EN 77-5-5 Safety Approval in RoHS compliant. Example : HCPL-5 to order product of mil DIP package in tube packaging and non RoHS compliant. Option datasheets are available. Contact your Avago sales representative or authorized distributor for information. Remarks: The notation #XXX is used for existing products, while (new) products launched since 5th July and RoHS compliant option will use -XXXE.
Package Outline Drawings -Pin DIP Package (HCPL-5/) Avago Lead Free Pin Dot Date Code.9 (.7) MAX..5 ±. (. ±.5) 9.5 ±.5 (. ±.) Device Part Number 7 A NNNN YYWW EEE Lot ID Z P 5 Test Rating Code UL Logo Special Program Code.7 (.7) MAX..7 (.5) MAX. 7. ±.5 (. ±.).5 ±.5 (.5 ±.) 5 TYP..5 +.7 -.5 (. +.) -.). ±. (. ±.).5 (.) MIN..9 (.5) MIN..5 (.5) MAX..5 ±.5 (. ±.) Dimensions in millimeters and (inches). *marking code letter for option numbers "L" = option "V" = option Option numbers and 5 not marked. Note: Floating lead protrusion is.5 mm ( mils) max. -Pin DIP Package with Gull Wing Surface Mount Option (HCPL-5/) Avago Lead Free.5 ±.5 (.5 ±.) Pin Dot Date Code 9.5 ±.5 (. ±.) Device Part Number 7 A NNNN YYWW EEE Lot ID Z P 5 Test Rating Code UL Logo Special Program Code LAND PATTERN RECOMMENDATION.7 (.5). (.).9 (.). (.).9 (.7) MAX..7 (.7) MAX..5 ±. (. ±.5) 9.5 ±.5 (. ±.) 7. ±.5 (. ±.).5 +.7 -.5 (. +.) -.). ±. (. ±.).5 (.) BSC.5 ±. (.5 ±.5).5 ±.5 (.5 ±.) NOM. Dimensions in millimeters (inches). Lead coplanarity =. mm (. inches). Note: Floating lead protrusion is.5 mm ( mils) max.
Small Outline SO- Package (HCPL-5/) LAND PATTERN RECOMMENDATION.97 ±.7 (.55 ±.5) Device Part Number Lead Free Pin Dot 7. ±.7 (. ±.).7 (.5) BSC 5 NNNN Z YYWW EEE Test Rating Code Date Code Lot ID 5.99 ±. (. ±.). (.5).9 (.75) 7.9 (.95) * 5. ±.7 (. ±.5) 7 5 X. (.7).75 ±.7 (.5 ±.5).5 (.) ~ 7. ±.5 (.9 ±.) * Total package length (inclusive of mold flash) 5.7 ±.5 (.5 ±.) Dimensions in millimeters (inches). Lead coplanarity =. mm (. inches) max..5 (.) MIN.. ±. (. ±.) -Pin Widebody DIP Package (HCNW5/) Device Part Number Lead Free.5 ±.5 (. ±.) 7 A NNNNNNNN YYWW EEE Z 5 Avago Test Rating Code Date Code Lot ID. MAX. (.) 9. ±.5 (.5 ±.) Pin Dot.55 (.) MAX. 5. (.) MAX.. (.) TYP. 7 TYP..5 +.7 -.5 (. +.) -.).5 (.) TYP..7 ±.5 (.7 ±.). (.).9 (.5). (.).5 (.).5 (.) MIN. Dimensions in millimeters (inches). Note: Floating lead protrusion is.5 mm ( mils) max. 5
-Pin Widebody DIP Package with Gull Wing Surface Mount Option (HCNW5/).5 ±.5 (. ±.) LAND PATTERN RECOMMENDATION Device Part Number Lead Free Pin Dot 7 A NNNNNNNN YYWW EEE Z 5 Avago Test Rating Code Date Code Lot ID 9. ±.5 (.5 ±.).5 (.5).55 (.) MAX.. (.5) MAX.. (.5). ±. (. ±.). MAX. (.).9 (.9).7 ±.5 (.7 ±.).5 (.) BSC.75 ±.5 (. ±.) Dimensions in millimeters (inches). Lead coplanarity =. mm (. inches). Note: Floating lead protrusion is.5 mm ( mils) max.. ±.5 (.9 ±.) 7 NOM..5 +.7 -.5 (. +.) -.)
Solder Reflow Profile Recommended reflow condition as per JEDEC Standard, J-STD- (latest revision). Non-Halide Flux should be used. Regulatory Information The devices contained in this data sheet have been approved by the following organizations: UL Recognized under UL 577, Component Recognition Program, File E55. CSA Approved under CSA Component Acceptance Notice #5, File CA. IEC/EN/DIN EN 77-5-5 (HCNW and option only) Approved with Maximum Working Insulation Voltage V iorm =5V peak for HCPL-5/5, V iorm = V peak for HCPL-5/5, and V iorm = V peak for HCNW5/5. Insulation and Safety Related Specifications -Pin DIP Widebody ( Mil) SO- ( Mil) Parameter Symbol Value Value Value Unit Conditions Minimum External L() 7..9 9. mm Measured from input terminals Air Gap (External to output terminals, shortest Clearance) distance through air. Minimum External L() 7... mm Measured from input terminals Tracking (External to output terminals, shortest Creepage) distance path along body. Minimum Internal... mm Through insulation distance, Plastic Gap conductor to conductor, usually (Internal Clearance) the direct distance between the photoemitter and photodetector inside the optocoupler cavity. Minimum Internal NA NA. mm Measured from input terminals Tracking (Internal to output terminals, along Creepage) internal cavity. Tracking Resistance CTI > 75 > 75 > 75 V DIN IEC /VDE Part (Comparative Tracking Index) Isolation Group IIIa IIIa IIIa Material Group (DIN VDE, /9, Table ) Option - surface mount classification is Class A in accordance with CECC. 7
IEC/EN/DIN EN 77-5-5 Insulation Related Characteristics (OPTION ONLY) Characteristic Description Symbol HCPL-5/5 HCPL-5/5 Units Installation classification per DIN VDE /9, Table for rated mains voltage V rms I-IV I-IV for rated mains voltage V rms I-IV I-I I I Climatic Classification 55// 55// Pollution Degree (DIN VDE /9) Maximum Working Insulation Voltage V IORM 5 V peak Input to Output Test Voltage, Method b* V IORM x.75 = V PR, % Production Test with t m = sec, V PR 5 V peak Partial Discharge < 5 pc Input to Output Test Voltage, Method a* V IORM x. = V PR, Type and sample test, V PR 9 V peak t m = sec, Partial Discharge < 5 pc Highest Allowable Overvoltage* (Transient Overvoltage, t ini = sec) V IOTM V peak Safety Limiting Values (Maximum values allowed in the event of a failure, also see Figure 9, Thermal Derating curve.) Case Temperature T S 75 75 C Input Current I S,INPUT 5 ma Output Power P S,OUTPUT mw Insulation Resistance at T S, V IO = 5 V R S 9 9 Ω IEC/EN/DIN EN 77-5-5 Insulation Related Characteristics (HCNW5/ ONLY) Installation classification per DIN VDE /9, Table for rated mains voltage V rms for rated mains voltage V rms Description Symbol Characteristic Units Climatic Classification 55/5/ Pollution Degree (DIN VDE /9) Maximum Working Insulation Voltage V IORM V peak Input to Output Test Voltage, Method b* V IORM x.75 = V PR, % Production Test with t m = sec, V PR 5 V peak Partial Discharge < 5 pc Input to Output Test Voltage, Method a* V IORM x. = V PR, Type and sample test, V PR V peak t m = sec, Partial Discharge < 5 pc Highest Allowable Overvoltage* (Transient Overvoltage, t ini = sec) V IOTM V peak Safety Limiting Values (Maximum values allowed in the event of a failure, also see Figure 9, Thermal Derating curve.) Case Temperature T S 5 C Input Current I S,INPUT ma Output Power P S,OUTPUT 7 mw Insulation Resistance at T S, V IO = 5 V R S 9 Ω I-IV I-III *Refer to the front of the optocoupler section of the current catalog, under Product Safety Regulations section IEC/EN/DIN EN 77-5-5, for a detailed description. Note: Isolation characteristics are guaranteed only within the safety maximum ratings which must be ensured by protective circuits in application.
Absolute Maximum Ratings Parameter Symbol Device Min. Max. Units Note Storage Temperature T S -55 5 C Operating Temperature T A -Pin DIP -55 C SO- Widebody -55 5 Average Forward Input Current I F(AVG) 5 ma Peak Forward Input Current I F(PEAK) -Pin DIP (5% duty cycle, ms pulse width) SO- 5 ma (5% duty cycle, ms pulse width) Widebody Peak Transient Input Current I F(TRANS) -Pin DIP A ( µs pulse width, pps) SO- Widebody. Reverse LED Input Voltage (Pin -) V R -Pin DIP 5 V SO- Widebody Input Power Dissipation P IN -Pin DIP 5 mw SO- Widebody Average Output Current (Pin ) I O(AVG) ma Peak Output Current I O(PEAK) ma Emitter-Base Reverse Voltage V EBR 5 V (Pin 5-7, except 5/, 5/) Supply Voltage (Pin -5) V CC -.5 V Output Voltage (Pin -5) V O -.5 V Base Current (Pin 7, except 5/, 5/) I B 5 ma Output Power Dissipation P O mw Lead Solder Temperature (Through-Hole Parts Only). mm below seating plane, seconds T LS -Pin DIP C up to seating plane, seconds Widebody C Reflow Temperature Profile T RP SO- and Option See Package Outline Drawings section 9
Electrical Specifications (DC) Over recommended temperature (T A = C to 7 C) unless otherwise specified. See note. Parameter Symbol Device Min. Typ.* Max. Units Test Conditions Fig. Note Current CTR HCPL-5/ 9 5 % T A = 5 C V O =. V I F = ma,,, 5 Transfer Ratio HCPL-5/ 5 V O =.5 V V CC =.5 V HCNW5/ Logic Low Output Voltage Logic High Output Current Logic Low Supply Current Logic High Supply Current Input Forward Input Reverse Breakdown Voltage Temperature Coefficient of Forward Voltage Input Capacitance Transistor DC Current Gain V OL HCPL-5/ HCPL-5/ HCNW5/....5 V T A = 5 C I O =. ma I O =. ma I F = ma, V CC =.5 V I OH..5 µa T A = 5 C V O = V CC = 5.5 V I F = ma 7. T A = 5 C V O = V CC = 5 V 5 V O = V CC = 5 V I CCL 5 µa I F = ma, V O = Open, V CC = 5 V I CCH. µa T A = 5 C I F = ma, V O = Open, V CC = 5 V V F -Pin DIP Voltage SO- BV R V F / T A C IN h FE *All typicals at T A = 5 C..5.7 V T A = 5 C I F = ma. Widebody.5..5 T A = 5 C I F = ma.5.95 -Pin DIP 5 V I R = µa SO- Widebody I R = µa -Pin DIP -. mv/ C I F = ma SO- Widebody -.9 -Pin DIP pf f = MHz, V F = V SO- Widebody 9 -Pin DIP SO- 5 V O = 5 V, I O = ma V O =. V, I B = µa Widebody V O =. V, I B = µa V O = 5 V, I O = ma
Switching Specifications (AC) Over recommended temperature (T A = C to 7 C), V CC = 5 V, I F = ma unless otherwise specified. Parameter Sym. Device Min. Typ.* Max. Units Test Conditions Fig. Note Propagation t PHL HCPL-5/.. µs T A = 5 C R L =.9 kω 5,, Delay Time to HCPL-5/. Logic Low at HCNW5/ Output Propagation t PLH HCPL-5/.. µs T A = 5 C R L =.9 kω 5,, Delay Time to HCPL-5/. Logic High at HCNW5/ Output Common Mode CM H HCPL-5 kv/µs R L =.9 kω I F = ma, T A = 5 C, 7, Transient Immunity at Logic p-p HCPL-5 V CM = V HCNW5 C L = 5 pf High Level Output HCPL-5 5 R L =.9 kω I F = ma, T A = 5 C, HCPL-5 V CM = 5 V p-p, HCNW5 C L = 5 pf Common Mode CM L HCPL-5 kv/µs R L =.9 kω I F = ma, T A = 5 C, 7, Transient Immunity at Logic HCPL-5 V CM = V p-p HCNW5 C L = 5 pf Low Level Output HCPL-5 5 R L =.9 kω I F = ma, T A = 5 C, HCPL-5 V CM = 5 V p-p, HCNW5 C L = 5 pf *All typicals at T A = 5 C.
Package Characteristics Over recommended temperature (T A = C to 7 C) unless otherwise specified. Parameter Sym. Device Min. Typ.* Max. Units Test Conditions Fig. Note Input-Output V ISO -Pin DIP 75 V rms RH < 5%,, Momentary SO- t = min., Withstand Voltage** Widebody 5 T A = 5 C, -Pin DIP 5, 9, (Option ) I I-O -Pin DIP µa 5% RH, t = 5 s,, V I-O = kvdc, T A = 5 C Input-Output R I-O -Pin DIP Ω V I-O = 5 Vdc Resistance SO- Widebody T A = 5 C T A = C Input-Output C I-O -Pin DIP. pf f = MHz Capacitance SO- Widebody.5. *All typicals at T A = 5 C. **The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage rating. For the continuous voltage rating refer to the IEC/EN/DIN EN 77-5-5 Insulation Related Characteristics Table (if applicable), your equipment level safety specification or Avago Application Note 7 entitled Optocoupler Input-Output Endurance Voltage, publication number 59-E. Notes:. Derate linearly above 7 C free-air temperature at a rate of. ma/ C (-Pin DIP). Derate linearly above 5 C free-air temperature at a rate of.5 ma/ C (SO-).. Derate linearly above 7 C free-air temperature at a rate of. ma/ C (-Pin DIP). Derate linearly above 5 C free-air temperature at a rate of. ma/ C (SO-).. Derate linearly above 7 C free-air temperature at a rate of.9 mw/ C (-Pin DIP). Derate linearly above 5 C free-air temperature at a rate of. mw/ C (SO-).. Derate linearly above 7 C free-air temperature at a rate of. mw/ C (-Pin DIP). Derate linearly above 5 C free-air temperature at a rate of. mw/ C (SO-). 5. CURRENT TRANSFER RATIO in percent is defined as the ratio of output collector current, I O, to the forward LED input current, I F, times.. Device considered a two-terminal device: Pins,,, and shorted together and Pins 5,, 7, and shorted together. 7. Common mode transient immunity in a Logic High level is the maximum tolerable (positive) dv CM /dt on the leading edge of the common mode pulse signal, V CM, to assure that the output will remain in a Logic High state (i.e., V O >. V). Common mode transient immunity in a Logic Low level is the maximum tolerable (negative) dv CM /dt on the trailing edge of the common mode pulse signal, V CM, to assure that the output will remain in a Logic Low state (i.e., V O <. V).. The.9 kω load represents TTL unit load of. ma and the 5. kω pull-up resistor. 9. See Option data sheet for more information.. Use of a. µf bypass capacitor connected between pins 5 and is recommended.. In accordance with UL 577, each optocoupler is proof tested by applying an insulation test voltage 5 V rms for second (leakage detection current limit, I I-O 5 µa). This test is performed before the % Production test shown in the IEC/EN/DIN EN 77-5-5 Insulation Related Characteristics Table if applicable.. In accordance with UL 577, each optocoupler is proof tested by applying an insulation test voltage V rms for second (leakage detection current limit, I I-O 5 µa). This test is performed before the % Production test shown in the IEC/EN/DIN EN 77-5-5 Insulation Related Characteristics Table if applicable.. This rating is equally validated by an equivalent ac proof test.
IO - D OUTPUT CURRENT - ma 5 T A = 5 C V CC = 5. V PIN DIP, SO- ma 5 ma ma 5 ma ma 5 ma ma I F = 5 ma V O - OUTPUT VOLTAGE - V Figure. DC and pulsed transfer characteristics. IO - D OUTPUT CURRENT - ma T A = 5 C V CC = 5. V WIDEBODY ma 5 ma ma 5 ma ma 5 ma ma I F = 5 ma V O - OUTPUT VOLTAGE - V NORMALIZED CURRENT TRANSFER RATIO.5. HCPL-5/, HCPL-5/5 PIN DIP, SO- NORMALIZED.5 I F = ma V O =. V V CC = 5 V T A = 5 C. I F - INPUT CURRENT - ma Figure. Current transfer ratio vs. input current. NORMALIZED CURRENT TRANSFER RATIO.5..5 WIDEBODY HCNW5/ NORMALIZED I F = ma V O =. V V CC =.5 V T A = 5 C I F - INPUT CURRENT - ma IF - FORWARD CURRENT - ma PIN DIP, SO- WIDEBODY T A = 5 C I F T A = 5 C + V F. -.........5. V F - FORWARD VOLTAGE - VOLTS Figure. Input current vs. forward voltage. IF - FORWARD CURRENT - ma.......5. I F + V F -.7. V F - FORWARD VOLTAGE - VOLTS
NORMALIZED CURRENT TRANSFER RATIO...9. NORMALIZED I F = ma V O =. V V CC = 5 V T A = 5 C PIN DIP, SO-.7 HCPL-5/, HCPL-5/5. - - - T A - TEMPERATURE - C Figure. Current transfer ratio vs. temperature. NORMALIZED CURRENT TRANSFER RATIO...9. WIDEBODY HCNW5/.7 NORMALIZED. I F = ma V O =. V.5 V CC = 5 V T A = 5 C. - - - T A - TEMPERATURE - C tp - PROPAGATION DELAY - ns 5 5 t PLH PIN DIP, SO- t PHL - - T A - TEMPERATURE - C Figure 5. Propagation delay vs. temperature. tp - PROPAGATION DELAY - µs....... I F = ma, V CC = 5. V HCPL-5/ (R L =.9kΩ) HCPL-5/ V CC = 5. V T A = 5 C I F = ma I F = ma PIN DIP, SO- t PHL t PLH. 59 7 R L - LOAD RESISTANCE - (kω) Figure. Propagation delay time vs. load resistance. tp - PROPAGATION DELAY - µs tp - PROPAGATION DELAY - ns........ I F = ma, V CC = 5. V (R L =.9kΩ) HCNW5/ t PLH WIDEBODY - - - T A - TEMPERATURE - C V CC = 5. V T A = 5 C I F = ma I F = ma WIDEBODY t PLH t PHL t PHL R L - LOAD RESISTANCE - (kω)
IOH - LOGIC HIGH OUTPUT CURRENT - na + + + + - I F = V O = V CC = 5. V PIN DIP, SO- - -75-5 -5 +5 +5 +75 + - - - T A - TEMPERATURE - C T A - TEMPERATURE - C Figure 7. Logic high output current vs. temperature. IOH - LOGIC HIGH OUTPUT CURRENT - na + + + I F = V O = V CC = 5 V WIDEBODY - SMALL SIGNAL CURRENT TRANSFER RATIO IO IF... PIN DIP, SO- T A = 5 C, R L = Ω, V CC = 5 V 5 I F - QUIESCENT INPUT CURRENT - ma Figure. Small-signal current transfer ratio vs. quiescent input current. - SMALL SIGNAL CURRENT TRANSFER RATIO IO IF.5.... WIDEBODY T A = 5 C, R L = Ω, V CC = 5 V 5 I F - QUIESCENT INPUT CURRENT - ma OUTPUT POWER - PS, INPUT CURRENT - IS 7 5 HCPL-5/5/5/5 OPTION P S (mw) I S (ma) For HCPL-5/5 I S (ma) For HCPL-5/5 5 5 75 5 5 T s - CASE TEMPERATURE - C 75 OUTPUT POWER - PS, INPUT CURRENT - IS HCNW5/ 9 P S (mw) I S (ma) 7 5 5 5 75 5 5 T s - CASE TEMPERATURE - C Figure 9. Thermal derating curve, dependence of safety limiting value with case temperature per IEC/EN/DIN EN 77-5-5. 75 5
I F V O t PHL.5 V 5 V.5 V V OL t PLH PULSE GEN. Z O = 5Ω t r = 5 ns % DUTY CYCLE /f < µs I F MONITOR I F R M 7 5 R L.µF +5 V V O C L = 5pF Figure. Switching test circuit. V CM V % 9% 9% % tr tf V O 5 V SWITCH AT A: I F = ma I F V FF B A 5 7 R L. µf +5 V V O V O V OL SWITCH AT B: I F = ma V CM + - PULSE GEN. Figure. Test circuit for transient immunity and typical waveforms. For product information and a complete list of distributors, please go to our web site: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright 5- Avago Technologies. All rights reserved. AV-9EN - December 9,