Short Range UWB Radio Systems Finding the power/area limits of CMOS Bob Brodersen Ian O Donnell Mike Chen Stanley Wang
Integrated Impulse Transceiver RF Front-End LNA Pulser Amp Analog CLK GEN PMF Digital CONTROL Data Recovery Synch., Detect and Tracking All-CMOS integrated UWB transceiver for comm. and ranging/locationing Aggressive low-power design Mostly-digital approach, simplify analog front-end Specifications: 100kbps over 10m with 10-3 BER 1mW total (TX+RX) power consumption 0-1GHz bandwidth
Integrated Impulse Transceiver RF Front-End LNA Pulser Amp Analog CLK GEN PMF Digital CONTROL Data Recovery Synch., Detect and Tracking All-CMOS integrated UWB transceiver for comm. and ranging/locationing Aggressive low-power design Mostly-digital approach, simplify analog front-end Specifications: 100kbps over 10m with 10-3 BER 1mW total (TX+RX) power consumption 0-1GHz bandwidth
3-10 GHz UWB CMOS LNA (Stanley Wang) Common-gate input stage with input matching Inter-stage matching network also provides current gain due to the impedance mismatch All inductors are pattern ground shielded, except L load. Increases SRF and decreases Q (increasing BW)..13 micron technology 14 mw, 1 mm 2
Layout sensitivity 3-stage input matching Conservative layout strategy Keep distance between L s Single-turn inductors 2-stage input matching Aggressive layout strategy 1.13mm 0.83mm 1mm 1.54mm
Measurement Results Magnitude (db) 15 3-stage 10 5 0-5 -10-15 2-stage Magnitude (db) 0-10 -20-30 -40 2-stage 3-stage -20 0 5 10 15 Frequency (GHz) -50 0 5 10 15 Frequency (GHz) 0-10 S22 11 10 Magnitude (db) -20-30 -40-50 -60 S12 NF (db) 9 8 7 6 5 4 3-stage 2-stage -70 0 5 10 15 Frequency (GHz) 3 2 4 6 8 10 12 Frequency (GHz)
Integrated Impulse Transceiver RF Front-End LNA Pulser Amp Analog CLK GEN PMF Digital CONTROL Data Recovery Synch., Detect and Tracking All-CMOS integrated UWB transceiver for comm. and ranging/locationing Aggressive low-power design Mostly-digital approach, simplify analog front-end Specifications: 100kbps over 10m with 10-3 BER 1mW total (TX+RX) power consumption 0-1GHz bandwidth
UWB Transceiver Prototype Based on Digital Sampling/Acquisition Oscilloscopes TIA GAIN ADC ADC Analog Front-End BIAS OSC ADC Control Logic and Interface Digital Interface CLKGEN DLL Pulser (by Stanley Wang) PULSE
The Integrated implementation 2.8 x 4.7 mm 2 (13.2 mm 2 ) Digital Interface Logic Variable Gain Stages Control Transmitter CLK Bias TIA Test Output Buffer ADC DLL Oscillator
Pulse Transmission & Reception
Variable pulse rate power consumption (2 Gsample/sec sample rate) Our goal 1mW 1 Mpulse/sec
Integrated Impulse Transceiver RF Front-End LNA Pulser Amp Analog CLK GEN PMF Digital CONTROL Data Recovery Synch., Detect and Tracking All-CMOS integrated UWB transceiver for comm. and ranging/locationing Aggressive low-power design Mostly-digital approach, simplify analog front-end Specifications: 100kbps over 10m with 10-3 BER 1mW total (TX+RX) power consumption 0-1GHz bandwidth
Digital Baseband CLKpn CLKcoef PN Gen Coef 128 PMF 1 PN correlator 1 D E C Control logic 32 S / P 160 PMF 2 Matched Filter Bank PN correlator 2 Correlation_Block Abs Peak Det PCI PMF 32 PN correlator 32 CLKwin CLK Symbol Strobe Data PN Correlator Data Recover (soft/hard) Data_out
UWB Baseband Chip Process: 0.13um (ST Microelectronics) Size: 3.6mm x 3.3mm Standard Cells: 530,000 MOPS/mW: 1,500 Power: Acquisition 12 mw Tracking 1.5 mw @ 1.08 V, 10 MHz clk
3-10 GHz Transceiver Analytic and Sub-sampling for Impulse Processing (Mike Chen) Sample at below Nyquist Analytic signaling reduces the sensitivity to timing offsets Provides fine timing resolution Mostly digital solution A/D is critical component
Asynchronous ADC prototype Highlights: Asynchronous SAR ADC architecture to meet speed requirement 600 Msamples/Sec, 6 bits 5 mw,.12 mm 2!! Input 3dB bandwidth > 4GHz Sub-sampling RF 8 Gigasamples/sec < 100mW
Time-interleaved 2X Async. ADC No clock higher than the sampling frequency
A/D Performance
Demonstrated.13 Micron CMOS capabilities 10 GHz LNA - at 10 mw and 1mm 2 Impulse transceiver at 1 Megapulse/mW DSP baseband at 1.5 GigaOps/mW A/D at 600 Msamples/sec, 6 bit @ 5mW,.12mm 2 Even more important is that these numbers will improve with scaling of the technology.