Power Conversion. Application Note. CoolMOS Selection Guide. Version 1.1, April AN-CoolMOS-02. Ilia Zverev, Jon Hancock, Marco Pürschel

Version 1.1, April 2002 Application Note AN-CoolMOS-02 CoolMOS Selection Guide Author: Ilia Zverev, Jon Hancock, Marco Pürschel Published by Infineon Technologies AG http://www.infineon.com/coolmos Power Conversion Never stop thinking

This selection guide shows the main application fields of CoolMOS transistors, answers frequently asked questions concerning CoolMOS and can be used to select the right CoolMOS type for particular application. Contains 1 Main application fields...3 2 Product family of 600V CoolMOS...4 3 Product family of 800V CoolMOS...6 4 Frequently Asked Questions...7 5 Main competitors for CoolMOS 600V...18 6 SMPS topologies overview...19 6.1 Flyback Converter...19 6.2 Boost Converter (PFC)...20 6.3 Single Transistor Forward Converter...21 6.4 Half Bridge Forward Converter...22 6.5 Two Transistor Forward Converter...23 6.6 Full H Bridge Converter...24 6.7 Full Bridge ZVT Converter...25 7 How to select the right CoolMOS type...26 7.1 Flyback Converter...26 7.1.1 No external cooling...26 7.1.2 SMD cooling...27 7.1.3 External heat sink...27 7.2 Boost Converter (PFC)...28 7.3 Single Transistor Forward Converter...28 7.4 Two Transistor Forward Converter...28 7.4.1 No external cooling...29 7.4.2 SMD cooling...29 7.4.3 External heat sink...30 7.5 Full H Bridge Converter...30 7.6 Full Bridge ZVT Converter...30 8 List of related application notes...31 2 of 33 AN-CoolMOS-02

1 Main application fields The main application field for the CoolMOS 600V & 800V transistors is the Switch Mode Power Supply (SMPS). These are power supplies used in telecommunications equipment, consumer electronics, battery chargers, notebook PC s, and computers of all types. V in 240V AC PFC optional D 1 V o T 1 T 2 Figure 1: General topology of SMPS Figure 2: Computer SMPS Another focus application for the CoolMOS 600V & 500V transistors is the lamp ballast. V in 85...240V~ PFC optional D 1 HV-IC T 2a T 1 V o T 2b Figure 3: General topology of a lamp ballast Figure 4: Lamp ballast It is also possible to use CoolMOS transistors in other switching and pulse width control applications, e. g. welding equipment, electrical motor drives like Switch Reluctance Motor and Permanent DC-Motor. We do not recommend to use CoolMOS in a hard switching full bridge topologies utilizing recirculating current without external free-wheeling diode, e.g. electrical motor drive circuits for synchronous and asynchronous motors. 3 of 33 AN-CoolMOS-02

2 Product family of 500V CoolMOS 3.0 Ω 2.0 A TO-252 (D- PAK) SPD02N50C3 TO-263 (D 2 PAK ) TO-220 TO- 220 Fullpa k TO-262 I²-PAK TO-247 1.4 Ω 3.0 A SPD03N50C3 0.95 Ω 4.0 A SPD04N50C3 SPB04N50C3 SPP04N50C3 SPA04N50C3 0.6 Ω 8.0 A SPD08N50C3 SPP08N50C3 SPA08N50C3 SPI08N50C3 0.38 Ω 12 A SPP12N50C3 SPA12N50C3 SPI12N50C3 SPW12N50C3 0.28 Ω 16 A SPP16N50C3 SPA16N50C3 SPI16N50C3 SPW16N50C3 0.19 Ω 21 A SPB21N50C3 SPP21N50C3 SPA21N50C3 SPI21N50C3 SPW21N50C3 0.11 Ω 32 A SPW32N50C3 1) 0.07 Ω 52 A SPW52N50C3 1) 1) PR: 07/2003 DR: 08/2003 4 of 33 AN-CoolMOS-02

3 Product family of 600V CoolMOS 6.0 Ω 0.8 A SOT22 3 SPN01N60C3 TO-252 (D- PAK) SPD01N60C3 TO-251 (I-PAK) SPU01N60C3 TO-263 (D 2 - PAK) TO-220 TO- 220 Fullpa k TO-262 I²-PAK TO-247 3.0 Ω 1.9 A SPN02N60S5 SPN02N60C3 1 SPD02N60S5 SPD02N60C3 SPU02N60S5 SPU02N60C3 1 SPB02N60S5 SPB02N60C3 SPP02N60S5 SPP02N60C3 1.4 Ω 3.2 A SPN03N60S5 SPN03N60C3 1 SPD03N60S5 SPD03N60C3 SPU03N60S5 SPU03N60C3 1 SPB03N60S5 SPB03N60C3 SPP03N60S5 SPP03N60C3 SPA03N60C3 0.95 Ω 4.5 A SPN04N60S5 SPD04N60S5 SPD04N60C3 SPU04N60S5 SPU04N60C3 1 SPB04N60S5 SPB04N60C3 SPP04N60S5 SPP04N60C3 SPA04N60C3 0.75 Ω 6.0 A 0.6 Ω 7.3 A 0.38 Ω 11 A SPD06N60C3 SPD07N60S5 SPD07N60C3 SPU06N60C3 1 SPU07N60S5 SPU07N60C3 1 SPB06N60C3 1 SPB07N60S5 SPB07N60C3 SPB11N60S5 SPB11N60C3 SPP06N60C3 SPP07N60S5 SPP07N60C3 SPP11N60S5 SPP11N60C3 SPA06N60C3 SPA07N60C3 SPA11N60C3 SPI06N60C3 1 SPI07N60S5 SPI07N60C3 SPI11N60S5 SPI11N60C3 SPW11N60S5 SPW11N60C3 0.28 Ω 15 A 0.19 Ω 20 A SPB20N60S5 SPB20N60C3 SPP15N60C3 SPP20N60S5 SPP20N60C3 SPA15N60C3 SPA20N60C3 SPI15N60C3 SPI20N60C3 SPW15N60C3 SPW20N60S5 SPW20N60C3 SPW24N60C3 0.16 Ω 24 A SPB24N60C3 1 SPP24N60C3 SPI24N60C3 1 SPW47N60C3 0.07 Ω 47 A 5 of 33 AN-CoolMOS-02

4 Product family of 800V CoolMOS TO-252 (D-PAK) TO-263 (D 2 -PAK) TO-220 TO-220 Fullpak TO-247 2.7 Ω 2 A SPP02N80C3 1.3 Ω 4 A NEW! SPD04N80C3 SPP04N80C3 SPA04N80C3 0.90 Ω 6 A SPD06N80C3 SPP06N80C3 SPA06N80C3 0.65 Ω 8 A SPP08N80C3 SPA08N80C3 0.45 Ω 11 A SPP11N80C3 SPA11N80C3 SPW11N80C3 0.29 Ω 17 A SPB17N80C3 SPP17N80C3 SPA17N80C3 SPW17N80C3 6 of 33 AN-CoolMOS-02

5 Frequently Asked Questions Q: What is CoolMOS? S G S G A: CoolMOS is a new revolutionary technology for high voltage power MOSFETs. It implements a compensation structure in the vertical drift region of a MOSFET in order to improve the on state resistance. n p + p - p n + sub - - - n epi - - - p + n p n + sub n epi D D Conducting state Blocking state Higher doped columns act like a short across the drift region With applied V DS, the space charge region extends across the entire epi-layer no free carrier high breakdown voltage Q: What is the main advantage of CoolMOS? A: CoolMOS makes it possible to reduce the on-state resistance R DS(on) of a 600V transistor by factor of 5 for the same chip area. It literally breaks the rules for the R DS(on) limitations of standard MOSFET technologies. Q: Does CoolMOS have lower on-state resistance for the same package compared to other MOSFETs? A: Yes, CoolMOS has a much lower on-state resistance in the same package. R on x A [Ωmm 2 ] 20 16 14 12 8 4 0 3 2.5 2 R DS(on) [Ω] 1.5 1 0.5 0 Standard MOSFET 600V x Physical limit for conventional silicon 2.3 x State-of-the-art Power MOSFET x x 1978 1988 1998 7.0 0.8 0.6 0.9 0.75 1.6 Power-MOSFET CoolMOS TM breaks the limit Standard MOSFET CoolMOS follower CoolMOS 0.65 0.29 0.2 0.29 0.19 0.25 0.29 0.07 D-PAK TO-220 TO-247 800V 600V 7 of 33 AN-CoolMOS-02

Q: What advantage does CoolMOS low on-state resistance bring to the designer? CoolMOS TM - More Power in Same Package - Less Package for Same Power A: The conduction based power losses can be reduced dramatically, and therefore the heat generation. The efficiency of the power system increases. CoolMOS is capable to handle two to three times more output power depending on a converter type as a standard MOSFET in the same package. On the other hand smaller packages can be used for the same output power of a converter. CoolMOS TM 100% 46% More More Power Power in in Same Same Package Package Standard MOSFET Less Less Package Package for for Same Same Power Power CoolMOS TM Standard MOSFET Q: What is the lowest on-state resistance in standard packages? TO-252 (D-PAK) TO-263 (D 2 PAK) TO-220 TO-220 Fullpak TO-262 I²-PAK TO-247 A: Best of class 500V CoolMOS parts have 600mOhm in D-Pak, 190mOhm in TO-220, 70mOhm in TO-247; 3.0 Ω 2.0 A 1.4 Ω 3.0 A 0.95 Ω 4.0 A 0.6 Ω 8.0 A SPD02N50C3 SPD03N50C3 SPD04N50C3 SPD08N50C3 SPB04N50C3 SPP04N50C3 SPP08N50C3 SPA04N50C3 SPA08N50C3 SPI08N50C3 0.38 Ω 12 A SPP12N50C3 SPA12N50C3 SPI12N50C3 SPW12N50C3 0.28 Ω 16 A SPP16N50C3 SPA16N50C3 SPI16N50C3 SPW16N50C3 0.19 Ω 21 A SPB21N50C3 SPP21N50C3 SPA21N50C3 SPI21N50C3 SPW21N50C3 0.11 Ω 32 A SPW32N50C3 1) 0.07 Ω 52 A SPW52N50C3 1) 1) PR: 07/2003 DR: 08/2003 8 of 33 AN-CoolMOS-02

600V CoolMOS transistors have SOT223 TO-252 (D-PAK) TO-251 (I-PAK) TO-263 (D 2 -PAK) TO-220 TO-220 Fullpak TO-262 I²-PAK TO-247 600mOhm in D-Pak, 190mOhm in TO-220, 70mOhm in TO-247; 6.0 Ω 0.8 A 3.0 Ω 1.9 A 1.4 Ω 3.2 A SPN01N60C3 SPN02N60S5 SPN02N60C3 1 SPN03N60S5 SPN03N60C3 1 SPD01N60C3 SPD02N60S5 SPD02N60C3 SPD03N60S5 SPD03N60C3 SPU01N60C3 SPU02N60S5 SPU02N60C3 1 SPU03N60S5 SPU03N60C3 1 SPB02N60S5 SPB02N60C3 SPB03N60S5 SPB03N60C3 SPP02N60S5 SPP02N60C3 SPP03N60S5 SPP03N60C3 SPA03N60C3 0.95 Ω 4.5 A SPN04N60S5 SPD04N60S5 SPD04N60C3 SPU04N60S5 SPU04N60C3 1 SPB04N60S5 SPB04N60C3 SPP04N60S5 SPP04N60C3 SPA04N60C3 0.75 Ω 6.0 A SPD06N60C3 SPU06N60C3 1 SPB06N60C3 1 SPP06N60C3 SPA06N60C3 SPI06N60C3 1 0.6 Ω 7.3 A SPD07N60S5 SPD07N60C3 SPU07N60S5 SPU07N60C3 1 SPB07N60S5 SPB07N60C3 SPP07N60S5 SPP07N60C3 SPA07N60C3 SPI07N60S5 SPI07N60C3 0.38 Ω 11 A SPB11N60S5 SPB11N60C3 SPP11N60S5 SPP11N60C3 SPA11N60C3 SPI11N60S5 SPI11N60C3 SPW11N60S5 SPW11N60C3 0.28 Ω 15 A SPP15N60C3 SPA15N60C3 SPI15N60C3 SPW15N60C3 0.19 Ω 20 A SPB20N60S5 SPB20N60C3 SPP20N60S5 SPP20N60C3 SPA20N60C3 SPI20N60C3 SPW20N60S5 SPW20N60C3 0.16 Ω 24 A SPB24N60C3 1 SPP24N60C3 SPI24N60C3 1 SPW24N60C3 0.07 Ω 47 A SPW47N60C3 800V CoolMOS transistors have 900mOhm in D-Pak, 290mOhm in TO-220 and in TO-247. 2.7 Ω 2 A 1.3 Ω 4 A TO-252 (D- PAK) NEW! SPD04N80C3 TO-263 (D 2 - PAK) TO-220 SPP02N80C3 SPP04N80C3 TO- 220 Fullpa k SPA04N80C3 TO-247 0.90 Ω 6 A SPD06N80C3 SPP06N80C3 SPA06N80C3 0.65 Ω 8 A SPP08N80C3 SPA08N80C3 0.45 Ω 11 A SPP11N80C3 SPA11N80C3 SPW11N80C3 0.29 Ω 17 A SPB17N80C3 SPP17N80C3 SPA17N80C3 SPW17N80C3 9 of 33 AN-CoolMOS-02

Q: Is the chip area of CoolMOS for the same on-state resistance R DS(on) smaller than in case of standard highvoltage MOSFET technology? A: Yes, due to its main advantage the active chip area of CoolMOS is approximately 5 times smaller then that of standard MOSFET. Q: Does CoolMOS have the smaller packages for the same on-state resistance as standard MOSFET? A: Yes, for the same on-state resistance CoolMOS allows a smaller package. As an example, 600V CoolMOS offers 600mOhm in D-Pak, but the standard MOSFET technology has 750mOhm in TO-220. Q: How can designer use this advantage of CoolMOS smaller packages? A: The volume of an SMPS or lamp ballast can be reduced, as well as the clearance between the MOSFET package and the case of SMPS or lamp ballast. It helps to improve the isolation strength and to save costs, e.g. less glue compound is needed to secure the components within the device s case. A full SMT design is possible now in many cases where in past expensive mixed mounting (SMT and trough-hole) was necessary. Q: Does CoolMOS have also 5 times higher thermal resistance due to smaller chip size as the standard MOSFET for the same R DS(on)? A: No, due to a thinner chip and the heat-spreading effect of the internal leadframe the thermal resistance of CoolMOS is only slightly higher then in case of standard MOSFET for a similar current rating. For the same R DS(on), thermal impedance chip to case may be 2X (datasheet s values), but this will often be only a small part (less than 10%) of the total thermal impedance R th(j-a) (junction to ambient), not having a significant affect in major applications. Total thermal resistance in SMPS Parameter mould die solder Heat sink CoolMOS* Standard MOSFET* RthJC, [K/W] 1 0.45 iso-pad, [K/W] 1 1 heat sink, [K/W] 7.5 7.5 RthJA, [K/W] 9.5 8.95 P TOT lead frame T JUNCTION iso-pad R thjc T CASE R thiso R thheatsink T ambient Only Only 6% 6% higher higher total total thermal thermal resistance resistance junction junction to to ambient! ambient! * same R DS(on). 10 of 33 AN-CoolMOS-02

Q: Does CoolMOS have a lower DC current rating compared to standard MOSFET for the same R DS(on)? A: Yes, due to higher thermal resistance of CoolMOS the maximum DC current rating for 25 C is lower according to the formal definition in the datasheet (see the table below). Device selection should be made based on actual overall power dissipation (which may be lower due to improved switching losses) and system thermal requirements. CoolMOS and competitors overview. Datasheet values VDS RDSon ID ID IDpuls Rth jc RG Package 25 C Tc=25 C Tc=100 C K/W rated SPP03N60S5/C3 600 1.4 Ohm 3.2 (25 C) 2 (100 C) 5.7 (25 C) 3.3 20 Ohm TO220 IRF820 500 3.0 Ohm 2.5 (25 C) 1.6 (100 C) 8 (25 C) 2.5 18 Ohm TO220 SPP04N60S5/C2/C3 600 0.95 Ohm 4.5 (25 C) 2.8 (100 C) 7.7 (25 C) 2.5 18 Ohm TO220 IRF830 500 1.5 Ohm 4.5 (25 C) 2.9 (100 C) 18 (25 C) 1.7 12 Ohm TO220 IRFBC30 600 2.2 Ohm 3.6 (25 C) 2.3 (100 C) 14 (25 C) 1.7 12 Ohm TO220 SPP07N60S5/C2/C3 600 0.6 Ohm 7.3 (25 C) 4.6 (100 C) 14.6 (25 C) 1.5 12 Ohm TO220 IRFBC40 600 1.2 Ohm 6.2 (25 C) 3.9 (100 C) 25 (25 C) 1 9.1 Ohm TO220 IRFBC40LC 600 1.2 Ohm 6.2 (25 C) 3.9 (100 C) 25 (25 C) 1 9.1 Ohm TO220 IRF840 500 0.85 Ohm 8.0 (25 C) 5.1 (100 C) 32 (25 C) 1 9.1 Ohm TO220 SPP11N60S5/C2/C3 600 0.38 Ohm 11 (25 C) 7 (100 C) 22 (25 C) 1 6.8 Ohm TO220 IRFP450 500 0.40 Ohm 14 (25 C) 8.7 (100 C) 56 (25 C) 0.65 6.2 Ohm TO247 IRFPC60 600 0.40 Ohm 16 (25 C) 10 (100 C) 64 (25 C) 0.45 4.5 Ohm TO247 2SK2889 600 0.75 Ohm 10 (25 C) 40 (25 C) 1.25 k.a. (TO220) SGP06N60 IGBT 600 2V@6A 14 (25 C) 6 (100 C) 28 (25 C) 50 Ohm TO220 SPP20N60S5/C2/C3 600 0.19 Ohm 20 (25 C) 13 (100 C) 40 (25 C) 0.6 3.6 Ohm TO220 IRFP460 500 0.27 Ohm 20 (25 C) 13 (100 C) 80 (25 C) 0.45 4.3 Ohm TO247 STW20NB50 500 0.27 Ohm 20 (25 C) 12.7 (100 C) 80 (25 C) 0.5 4.7 Ohm TO247 IXFH20N60 600 0.35 Ohm 20 (25 C) 12.5 (100 C) 80 (25 C) 0.42 2 Ohm TO247 MTW20N50E 500 0.24 Ohm 20 (25 C) 14.1 (100 C) 60 (25 C) 0.5 9.1 Ohm TO247 SPW47N60S5/C2/C3 600 0.07 Ohm 47 (25 C) 30 (100 C) 94 (25 C) 0.3 TO247 IXFX44N60 600 0.13 Ohm 44 (25 C) 27.5 (100 C) 176 (25 C) 0.22 1 Ohm TO247 STY34NB50 500 0.13 Ohm 34 (25 C) 21.4 (100 C) 136 (25 C) 0.277 4.7 Ohm TO247 Q: Does CoolMOS have a lower pulse current rating compared to standard MOSFET for the same R DS(on)? A: Yes, due to higher gate-source threshold voltage and very high current density in the compensation structure of CoolMOS the pulse current rating is lower. The new CoolMOS C3 offers a lower gate source threshold votage resulting in higher pulse current rating compared to the former families S5 and C2. This new familiy is comparible in these parameters with a standard MOSFET. Q: Does the lower pulse current rating of CoolMOS affect the power handling capability in the focus applications? A: No, in the majority of focus applications (SMPS, lamp ballast) it does not affect the power handling capability because the transistors operating conditions are characterized by external cooling and currents are far below the MOSFET s rated currents. Tables below demonstrate the peak and r.m.s. currents in frequently used topologies. Flyback converter (discountinuous current mode) Pout [W] 19 30 50 75 100 150 200 250 300 400 Ip_max [A] 0.6 1.0 1.6 2.4 3.2 4.7 6.3 7.9 9.4 12.6 Ip_rms [A] 0.16 0.25 0.42 0.62 0.83 1.25 1.66 2.08 2.50 3.32 Forward converter (countinuous current mode) Pout [W] 50 75 100 150 200 300 400 500 Ip_max [A] 0.3 0.5 0.7 1.0 1.3 2.0 2.6 3.2 Ip_rms [A] 0.31 0.46 0.62 0.93 1.23 1.9 2.5 3.08 11 of 33 AN-CoolMOS-02

On the contrary, due to the very low total power losses, CoolMOS yields a superior system efficiency and allows to increase output power in most focus applications (see the chart below). Due to its superior switching characteristic third generation of CoolMOS can handle up to 30% more output power of a converter as the standard MOSFET with same R DS(on). Just compare the 0.4Ω/600V standard MOSFET curve with 0.38Ω/600V CoolMOS C3 curve in the chart. In the same package (e.g. TO- 220) CoolMOS C3 makes it possible to triple the output power of a converter compared to conventional MOSFET under the same operating conditions. CoolMOS TM C3: Superior Power Handling Capability Pout [W] 1200 1000 800 600 400 200 Same R DS(on) Flyback converter T J=110 C, T A=60 C, R th Heatsink=10K/W, V BUS=380V, D=17% Same Package SPP20N60C3: 0.19Ω, 600V, TO-220 SPP11N60C3: 0.38Ω, 600V, TO-220 0.75Ω, 600V Best Standard MOSFET in TO-220 0.4Ω, 600V Standard MOSFET in TO-247 0 50 100 150 200 250 300 f [khz] Q: Does CoolMOS have a lower gate charge compared to standard MOSFET for the same R DS(on)? CoolMOS TM Low Gate Charge Technology is a Benchmark A: Yes, the CoolMOS has almost 2 times lower gate charge as the standard MOSFET for the same R DS(on). 70 60 Q g 50 [nc] 40 1.2Ω / 600V Gate Drive Power P = Q V G g GS f sw 30 20 CoolMOS TM 10 0 A B C D D* E F G Cool competitor devices MOS TM * ) ultra low charge technology Low-cost gate driver Lower switching losses Higher switching frequencies Q: How can designer use this advantage of CoolMOS lower gate charge? A: The gate drive power rating as well as the switching power losses can be significantly reduced. 12 of 33 AN-CoolMOS-02

Q: Does CoolMOS have lower capacitance s than a standard MOSFET of the same R DS(on)? Comparison of capacitance of 600V / 190mΩ MOSFETs 10000 A: Yes, the input and reverse capacitance s of CoolMOS transistors are considerably lower. Chart on the right demonstrates the capacitance s vs. drain-source voltage curves. The output capacitance of CoolMOS has a very interesting behavior. It has a higher value at low drain-source voltage up to 50 V and a very low value at higher voltages. The effective value of output capacitance of CoolMOS is lower then in case of standard MOSFET. That leads to lower switching losses. Capacitance [pf] C gs 1000 100 C gd C ds 10 0 50 100 150 200 V ds [V] 300 Standard-MOS CoolMOS TM Q: What is the reason for the highly non-linear output capacitance of CoolMOS? A: The usual voltage dependent capacitance characteristic of power MOSFETs is determined by the expansion of the space charge layer (depletion region) between the p-wells and n- drift region. This behavior can be visualized like a plate capacitance, for which the distance between the two plates increases as a function of voltage. CoolMOS is additionally characterized by a 3D-folded surface of the p-column and their adjacent n-regions, which is depleted at a voltage around 50 volts. In other words - and to stay within the picture of the plate capacitance - the distance of the plates increases as well as the surface of the plates decreases as a function of voltage. Therefore a double nonlinear behavior is observed. Q: How can designer benefit from output capacitance behavior of CoolMOS? A: The lower effective value of output capacitance of CoolMOS means that there is less energy stored in the output capacitance. This leads to reduction of switching losses stemming from charging and discharging the output capacitance. E oss [µj] Comparison of E oss of 600V / 190mΩ MOSFETs 25 20 15 10 5 0 0 100 200 300 V 500 ds [V] Standard-MOS technology device A Standard-MOS technology device B Standard-MOS technology device C CoolMOS TM 13 of 33 AN-CoolMOS-02

Q: Do the CoolMOS devices have avalanche ruggedness? A: Yes, CoolMOS transistors have single pulse and repetitive avalanche ratings. The area specific amount of avalanche energy is a benchmark value. Due to smaller chip area for the same on-state resistance the absolute value of avalanche energy is lower then in case of standard MOSFET of the same R DS(on). CoolMOS introduces a new specification for repetitive avalanche, where the greatest application need arises. Please refer to Application Note 1 for more information. Q: How can designer benefit from the new avalanche specification of CoolMOS? A: Many of the focus applications have a triangle waveform for the drain current, e.g. the Flyback converter. This current waveform leads to very high crest factor, i.e. the peak to r.m.s. ratio of drain current, and potentially high peak avalanche current. For these applications it is advantageous to have a specification that describes the avalanche current waveforms. The new avalanche specification for CoolMOS was developed to meet these requirements. Diagram on the right shows the new avalanche Safe Operating Area. The color lines correspond to the drain current during the avalanche in Flyback designs from 50 to 250 watts. They are well inside the Safe Operating Area. Please refer to Application Note 1 for more information. I AV Flyback drain current in avalanche (Vds=500V, f=60khz, Pout<250W) 20A 15A 10A 5A T J(start) =149 C 0A 1ns 10ns 100ns 1µs 10µs 100µs 1ms t AV CoolMOS can handle repetitive avalanche in in all all Flyback designs!! TJ(start) =125 C TJ(start) =25 C SPP20N60C3, T J(max) < 150 C Q: Does CoolMOS have an internal anti-parallel diode like a standard MOSFET? A: Yes, CoolMOS transistors have an internal anti-parallel diode (body diode). The performance of this diode is similar to that of standard MOSFETs. We do not recommend using CoolMOS in topologies that have freewheeling load current conducted in the body diode, and which switch the opposite transistor in the bridge leg on the conducting body diode. The recovered charge and overall characteristics of the body diode are comparable or superior to many standard MOSFETs, but current commutation is very snappy, resulting in high di/dt at the completion of commutation, and the likelihood of severe over-voltage transients due to the resulting high dv/dt. 14 of 33 AN-CoolMOS-02

Q: Does CoolMOS have a different gate-source threshold voltage and transconductance than a standard MOSFET? A: The first two generations offer a higher threshold volder compared to a standard MOSFET. The transconductance is lower and comparable to other compensation devices available on the market. The CoolMOS C3 offers the same threshold voltage as well as the transconductance than a standard MOSFET with an outsatnding peak current capability. IDS [A] 40 35 30 25 20 15 10 5 Standard MOS CoolMOS C3 CoolMOS follower CoolMOS S5 0 0 2 4 6 8 10 12 V GS [V] CoolMOS C3: C3: standard transconductance -- highest highest pulse pulse drain drain current! current! Q: What is the production yield for CoolMOS? A: Despite the fact that CoolMOS has advanced vertical structure, the production yield is high. It corresponds to our high manufacturing standards and experience in VLSI design and manufacturing. Q: Does CoolMOS have high quality and reliability standards? A: The CoolMOS transistors have the same high quality and reliability standards as our automotive devices. Please refer to www.infineon.com for more information regarding quality and reliability. Qualification packages are also available there. 15 of 33 AN-CoolMOS-02

Q: What is the difference between the S5 and C2/C3 types of CoolMOS regarding switching speed? Steps from S5 to C2 and C3: Internal gate resistance reduction for ultra fast switching speed A: The S5 types are the first generation of CoolMOS. These devices have relatively high internal gate resistance and moderate switching speed. The C2 and C3 types form the second generation of CoolMOS utilize an ultra-fast switching technology due to different gate structure. This technology makes it possible to realize very low internal gate resistance and very fast switching transitions. CoolMOS S5 Type Rgate(internal), typical [Ohm] SPD01N60S5 19.01 SPP02N60S5 7.7 SPP03N60S5 9.8 SPP04N60S5 19.74 SPP07N60S5 19.09 SPP11N60S5 28.52 SPP20N60S5 12.14 SPW47N60S5 8.7 CoolMOS C2 / C3 Type Rgate(internal), typical [Ohm] SPP04N60C2 0.95 SPP07N60C2 0.8 SPP11N60C2 0.86 SPP20N60C2 0.54 SPW 47N60C2 0.62 Q: How can the designer benefit from the ultra-fast switching technology of CoolMOS C2 and C3? 50% 50% ratio ratio in in switching losses losses compared to to standard MOSFET A: Due to very fast switching transitions (turn on and turn off) the switching losses can be dramatically reduced. In combination with low gate charge and lower effective output capacitance, it makes CoolMOS C2 and C3 the fastest high voltage power MOSFETs available on the market. The superior switching performance of CoolMOS C2 and C3 makes it possible to increase the operating frequency in order to reduce the volume and weight of passive components such as transformers, inductors, and capacitors. I D 12 10 8 6 4 2 0 Standard MOSFET / CoolMOS TM S5 CoolMOS TM C2 / C3 0 25 50 75 100 125 500 400 300 200 100 0 t [ns] V DS 16 of 33 AN-CoolMOS-02

Q: Can the designer adjust the switching speed of CoolMOS C2 and C3 by an external gate resistor? A: Yes, simply changing the value of external gate resistor designer can control both the voltage and current slope during turn on and turn off transients in a very wide range. Current and and voltage voltage slopes slopes can can be be controlled over over an an extreme wide wide range range 2000 1600 1200 800 Turn ON di/dt dv/dt 25000 20000 15000 10000 2000 1600 1200 800 Turn OFF di/dt dv/dt 100000 80000 60000 40000 400 5000 400 20000 0 0 20 40 60 Rgate, [Ohm] 0 0 0 20 40 60 Rgate, [Ohm] 0 Q: Does fast switching cause additional EMI noise? A: The theory says in general faster switching causes more noise. The EMI noise can be influenced by many issues, including the switching speed of transistors, PCB layout, geometrical positioning of components, case construction, materials for thermal insulators, use of shield insulators, etc. The designer has a lot of possibilities for optimizing the EMI behavior. If the layout is well done the switching speed of transistor can be increased. Another possibility can be to slow down the switching speed of transistor, what can be easily done by adjusting the external gate resistor. Please refer to Application Note 3 for more information. dbµv 100 90 80 70 60 50 40 30 20 10 0 EMI spectrum of DCM converter as a function of Rgate with SPP11N60C3 @ f=100khz 10000 100000 1000000 10000000 100000000 f [Hz] @ R gate =3.6Ω @ R gate =6.8Ω @ R gate =68Ω @ R gate =150Ω External gate gate resistance of of CoolMOS C3 C3 influences the the EMI EMI spectrum of of the the application Q: Can designer use CoolMOS in their simulation tools? A: Yes, the simulation models for CoolMOS can be downloaded at www.infineon.com Q: Where can I get more information about CoolMOS? A: Please refer to our Web site www.infineon.com/coolmos 17 of 33 AN-CoolMOS-02

6 Main competitors for CoolMOS 600V The next table shows the main industry standard MOSFET parts from other manufactures (information based on published datasheets). The CoolMOS types are also shown. Please do not use it as a replacement chart, because the real application operating conditions can have a great impact on the selection of right CoolMOS type. Please refer to the section 8 in order to find the right CoolMOS type for a particular design. Device V DS R DS(on) I D I D I Dpuls Package [V] [Ohm] [A] [A] [A] T J =25 C T C =25 C T C =100 C T C =25 C SPP03N60S5/C3 600 1.4 3.2 2 5.7 DPAK IRF820 500 3.0 2.5 1.6 8 TO-220 SPP04N60S5/C2/C3 600 0.95 4.5 2.8 7.7 DPAK IRF830 500 1.5 4.5 2.9 18 TO-220 IRFBC30 600 2.2 3.6 2.3 14 TO-220 SPP07N60S5/C2/C3 600 0.6 7.3 4.6 14.6 DPAK IRFBC40 600 1.2 6.2 3.9 25 TO-220 IRFBC40LC 600 1.2 6.2 3.9 25 TO-220 IRF840 500 0.85 8.0 5.1 32 TO-220 SPP11N60S5/C2/C3 600 0.38 11 7 22 TO-220 IRFP450 500 0.40 14 8.7 56 TO-247 IRFPC60 600 0.40 16 10 64 TO-247 2SK2889 600 0.75 10-40 (TO-220) SPP20N60S5/C2/C3 600 0.19 20 13 40 TO-220 IRFP460 500 0.27 20 13 80 TO-247 STW20NB50 500 0.27 20 12.7 80 TO-247 IXFH20N60 600 0.35 20 12.5 80 TO-247 MTW20N50E 500 0.24 20 14.1 60 TO-247 SPW47N60S5/C2/C3 600 0.07 47 30 94 TO-247 IXFX44N60 600 0.13 44 27.5 176 TO-247 STY34NB50 500 0.13 34 21.4 136 TO-247 IRFBA35N60C 600 0.08 35 22 140 Super-220 TM IRFPS59N60C 600 0.045 59 37 240 Super-247 TM 18 of 33 AN-CoolMOS-02

7 SMPS topologies overview A variety of converter topologies are used in switch mode power supplies employing pulse width modulation to regulate an output voltage. Table 1 shows the basic topologies in widespread use. Note that though the classic description of these topologies specifies only hard PWM as a switching mode, there are resonant variations of many of these with similar characteristics. Also there are specialized converters such as the Cúk and SEPIC using multiple reactive components for energy transfer, but with operating characteristics for the power switch which are similar to the basic topologies described below, though often with increased V DS requirements. Topology CoolMOS generation Voltage rating PFC Boost Converter S5, C3 500V, 600V Flyback Converter S5, C3 600V, 800V Forward Converter C3 800V Single Transistor Half-Bridge Converter -Symmetrical PWM -Symmetrical resonant -Asymmetrical S5, C3 S5, C3 S5, C3 500V, 600V 500V, 600V 500V, 600V (2 Transistor Forward) Center Tap Single C3 800V Push-Pull Converter Full Bridge PWM C3 500V, 600V Full Bridge ZVT-Phase controlled C3 500V, 600V Table 1: SMPS Topologies & Transistor Selection 7.1 Flyback Converter The Flyback converter is one of the simplest and most economical SMPS power supply topology, suited best to lower power levels, because the triangular current waveforms incur high peak losses in the primary side switch, and relatively high output ripple current and ripple voltage on the output side. The flyback transformer is designed as an energy storage and transfer inductor, sized to store the energy required at the peak of the primary current during the first switching state. This maximum energy storage is irrespective of the input line voltage; variations in line voltage merely change the duty cycle required to charge the flyback transformer to the programmed current level. The transformer turns ratio is selected based on the allowable reflected flyback voltage as well as the desired output voltage. During the second switching state, the power switch must block the bus voltage +V In plus the reflected reset voltage determined by the regulated V Out and the transformer turns ratio. Uncoupled inductance from the primary to secondary (leakage inductance) will also store energy, and since this energy is not clamped by the output winding, it will cause an avalanche on the primary unless clamped by an RCD snubber network. Energy transfer occurs by charging a current into the flyback inductor/transformer primary by turning on the power transistor. When the transistor turns off, the inductor reset on the secondary side conducts through CR1 to the output capacitor. Leakage inductance on the primary must be clamped on primary side. Figure 5: Flyback Converter 19 of 33 AN-CoolMOS-02

7.2 Boost Converter (PFC) The boost converter as shown (Figure 6) is not an isolated output SMPS converter. It is used to raise an unregulated input voltage to a higher level, and is commonly employed in active Power Factor Correction circuits. The boost inductor is the primary energy storage and transfer element, storing energy when the switching transistor Q1 is turned on, and delivering it to an output capacitor through CR1 when the switching transistor turns off. If the high frequency power loop formed by Q1, CR1, and C Out is reasonably small, with low stray inductance, CR1 will clamp the drain voltage of Q1, and avalanche conduction is unlikely. If there is considerable stray inductance in this loop, then at high di/dt for Q1 turn off there may be a possibility of brief avalanche events. Energy transfer occurs by charging a current into the boost inductor by turning on the power transistor. When the transistor turns off, the inductor reset transfers energy to the output capacitor through the boost diode. Output voltage is higher than input, because the inductor reference is at the input voltage. Figure 6: Boost Converter 20 of 33 AN-CoolMOS-02

7.3 Single Transistor Forward Converter The single transistor forward converter (Figure 7) offers some significant performance advantages over the flyback SMPS converter, but at the cost of many additional components. Instead of combining energy storage and voltage isolation/conversion in one magnetic component, a separate transformer and output filter inductor are used, permitting more favorable trapezoidal current waveforms and lower output current and voltage ripple, thus reducing noise and decreasing stress on semiconductors and capacitors. In a conventional single transistor forward converter, the transformer reset occurs after the power transfer cycle, and requires that the input transistor block a minimum of twice the input voltage. In practice, the coupling between the reset clamp winding and the primary power winding may not be ideal, and leakage inductance on the primary winding can store energy which can cause avalanche voltage overshoots unless clamped by an RCD snubber network across the power transistor Q1. For a maximum rectified bus voltage of 360V, a VDS rating of 800V is required for the power transistor Q1, unless alterations to the maximum duty cycle, and special clamp winding arrangements are made to lower the reflected voltage on Q1. Energy transfer occurs across the isolation transformer, when the power transistor Q1 turns on the primary voltage is reflected across the output windings, and rectified by CR1, charging the output inductor. When the primary switch turns off, the bifilar primary clamp winding conducts through the clamp diode, clamping the drain voltage of Q1 at twice the input voltage, and returning the energy from the magnetizing inductance of the transformer to the primary power bus (C In). The driven side of the output inductor is clamped at 0.7 volts below ground by the recirculating diode, and the output inductor and output capacitor store energy and integrate the duty cycle so that the output voltage is proportional to the product of the rectified output voltage and duty cycle. If the primary winding is not bifilar (wound at the same time) with the clamp winding, there will be a substantial unclamped leakage inductance on the primary. This leakage inductance and any additional stray inductance stores energy which will not be clamped by clamp winding, and must be dissipated on the primary side by the power transistor in avalanche, or by additional protective snubber networks. Figure 7: Single Transistor Forward Converter 21 of 33 AN-CoolMOS-02

7.4 Half Bridge Forward Converter This converter design offers the possibility of reducing the size of the transformer by nearly 1/2 compared with the single transistor forward converter, because it s single ended push-pull configuration uses the transformer flux in both directions. It doesn t require a clamp winding, but does require two output windings, to support both polarities of output drive from the transformer. By replacing the small flux balance cap with a resonant network, it is possible to easily make a resonant mode converter, with very low switching losses because the voltage turn-on and turn-off occurs at very low current. The body diodes of the switching transistors Q1 and Q2 provide clamping of turn-off transients due to leakage inductance, so avalanche is not normally an issue with this topology. Because of the primary side capacitors and their affect on the source voltage driving the transformer and output inductor, this topology cannot be used readily with current mode control, which is a significant disadvantage from the points of control loop dynamics, audio susceptibility, line regulation, and transistor protection. For this reason this topology has fallen in popularity for midrange sized power supplies, though it may commonly be found in direct coupled lighting applications when used with resonant components. Energy transfer occurs across the isolation transformer, in single ended push-pull. First, when the power transistor Q1 turns on the primary voltage is reflected across the output windings, and rectified by CR1, charging the output inductor. When Q1 turns off, the voltage drive across the transformer primary drops to zero, and energy stored in the leakage inductance and magnetizing inductance causes a turn-off overshoot, which is clamped by the body diode of Q2. In the second stage, Q2 turns on, and the transformer is driven in the opposite direction, resetting the flux balance in the transformer core. The output of the transformer is made with two windings and connected to a half wave rectifier, so the alternating polarity pulse train is rectified into a unidirectional pulse train of twice the frequency. The output inductor and output capacitor store energy and integrate the duty cycle so that the output voltage is proportional to the product of the rectified output voltage and duty cycle. Figure 8: Half Bridge Forward Converter 22 of 33 AN-CoolMOS-02

7.5 Two Transistor Forward Converter This SMPS topology (Figure 9) has been widely used because of it s robustness, simplicity, and moderately high performance. It is similar in performance characteristics to the single transistor forward converter, excepting that the two-transistor topology is inherently self-clamping for the magnetizing current reset of the power transformer, making avalanche operation unlikely. Additionally, this topology requires power transistors with only 1/2 the VDS blocking capability of the single transistor version. This reduction in voltage requirements dramatically reduces the R DS[on] for silicon area in the case of conventional MOSFET transistors, with the result that the two smaller transistors usually cost less than the single larger transistor, with lower total losses. The two transistor forward converter is compatible with current mode control, and with the improved operating conditions for the transistor switches due to the lower operating voltage requirements, gives good performance in midrange power applications. It s main drawback compared with the Half Bridge converter is the necessity for a larger power transformer because the flux swing can only operate in one direction, but this also eliminates the necessity for any flux balancing methods in the control circuits. Energy transfer occurs across the isolation transformer, when the power transistors Q1 and Q2 turn on, and the primary voltage is reflected across the output windings, and rectified by CR1, charging the output inductor. When the primary switch turns off, the flyback from the leakage inductance and magnetizing inductance flows through the clamp diodes D1 and D2, clamping the flyback of the primary and returning the energy from the magnetizing inductance of the transformer to the primary power bus (C1 In). The output inductor and output capacitor store energy and integrate the duty cycle so that the output voltage is proportional to the product of the rectified output voltage and duty cycle. Figure 9: Two Transistor Forward Converter 23 of 33 AN-CoolMOS-02

7.6 Full H Bridge Converter The H Bridge converter (Figure 10) draws its name from the four switching legs and their common connection to the load or output transformer. It combines some of the best features of the Two Transistor Forward converter and the Half Bridge converter. These include low input voltage requirements for the power switches, smaller transformer size from utilizing both polarities of BH loop excitation, inherent clamping of magnetizing current and leakage inductance transients, and compatibility with current mode control. The latter also provides inherent flux balancing of the power transformer, insuring equal volt seconds across the transformer primary in both directions. Because the H-Bridge topology is capable of operating at effective inductor PWM duty cycles greater than 50%, stable operation in current mode control avoiding sub harmonic oscillation requires slope compensation of the inner control loop, unless a rectifier output topology such as a current doubler is used, which cuts in half the effective duty cycle on the output inductors. The rectified output pulse train is at twice the switching frequency of the primary transistors, which may also allow a reduction in the size of the inductor magnetics for a given output ripple voltage requirement. Energy transfer occurs across the isolation transformer in balanced push-pull. First, when the power transistors Q1 and Q4 are turned on, the full bus voltage is applied across the primary winding, and the primary voltage is reflected across the output windings, and rectified by CR1, charging the output inductor. When Q1 and Q4 turn off, the voltage drive across the transformer primary drops to zero, and energy stored in the leakage inductance and magnetizing inductance causes a turn-off overshoot, which is clamped by the body diodes of Q2 and Q3. In the second stage, Q2 and Q3 turn on, and the transformer is driven in the opposite direction, resetting the flux balance in the transformer core. The output of the transformer is made with two windings and connected to a half wave rectifier, so the alternating polarity pulse train is rectified into a unidirectional pulse train of twice the frequency. The output inductor and output capacitor store energy and integrate the duty cycle so that the output voltage is proportional to the product of the rectified output voltage and duty cycle. Figure 10: Full Bridge Converter with Conventional PWM 24 of 33 AN-CoolMOS-02

7.7 Full Bridge ZVT Converter This topology (Figure 11) is similar in physical and electrical layout to the conventional H Bridge topology, but it s operation and control circuits are in some regards radically different, and significantly more complicated. Like the conventional H Bridge, advantages include small magnetics, low voltage requirements for the power transistors, reduced likelihood of avalanche, and compatibility with current mode control. The complexity comes into play with the control scheme necessary to achieve Zero Voltage Transitions and essentially eliminate switching losses in the power transistors. Instead of using the conventional H Bridge s simple anti-phase PWM modulation scheme where switches Q1 and Q4 are driven from the same control signal (Figure 10) and switches Q2 and Q3 are likewise driven, unique timing signals are generated for each switching transistor, so that each side of the H bridge switches roughly in a square wave fashion at drive points A and B (Figure 11), and the displacement in phase between the square wave drives produces an effective PWM across the transformer primary. The key advantage to this scheme lies in the fact that the drain to source transitions of each transistor are powered by the energy stored in the leakage inductance, or when necessary, a primary resonant inductor. Each transistor turns on with essentially zero volts drain to source over a wide load range. This requires careful timing of control signals, and adjustable delays between the turn off of one bridge transistor and the turn on the next. The benefit lies in eliminating almost all of the switching losses of the power MOSFET transistors, making possible increases in the operating frequency of the power supply, with attendant reductions in the size and weight of the power transformer and inductors. Energy transfer occurs across the isolation transformer in balanced pushpull, as for the conventional Full Bridge. Key to the operation with no switching losses is the use of a phase shifted modulation scheme, using square waves on both sides of the transformer primary, and controlling the duty cycle across the transformer primary by changing the effective phase between the two square waves. To achieve near lossless switching operation, drain to source transitions occur when one transistor in a leg turns off, and the magnetizing or resonant inductance slews the drain to source voltage to the opposite potential, after which the other transistor is turned on. This requires the delays in switching control shown in Delay 1/2 and Delay 3/4, which shows in an exaggerated manner for clarity the timing delays required. In some implementations this delay is made variable as a function of load current, to optimize the drain to source resonant timing for both light loads and heavy loads. Figure 11: Full Bridge Converter with phase shifted ZVT 25 of 33 AN-CoolMOS-02

8 How to select the right CoolMOS type The selection of a right CoolMOS type for the particular design is a very complicated issue, that requires a multiple iteration approach. You can find detailed guidelines for this process in the Application Note 2. These estimations were done on the basis of numerous measurements and theoretical analysis. The common design parameters for all topologies are: Junction temperature of CoolMOS is 110 C, Ambient temperature is 60 C. The estimation includes three cooling conditions: 1. CoolMOS is operated without any external cooling. The heat dissipates only through the package itself. 2. CoolMOS SMD version device is on 50mm 50mm 1.5mm epoxy PCB FR4 with 6 cm 2 (one layer, 70um thick) copper area for drain connection. PCB is vertical without blown air. 3. CoolMOS is operated on an external heat sink with thermal resistance of 10K/W. The information presented here can help to make the pre-selection of the CoolMOS type and should not be considered as final design optimization. 8.1 Flyback Converter The design parameters for the discontinuous current mode flyback converter are: Input DC voltage is 380 volts, output voltage of the converter is 12 volts, reflected flyback voltage is 100 volts, ambient temperature is 60 C and junction temperature of CoolMOS is 110 C. 8.1.1 No external cooling f [khz] Pout [W] 30 50 75 100 60 SPU03N60C3 SPP07N60C3 SPP11N60C3 75 SPU03N60C3 SPP07N60C3 100 SPU03N60C3 SPP07N60C3 125 SPU04N60C3 150 SPP07N60C3 175 SPP07N60C3 200 Table 2: Recommended CoolMOS types (CoolMOS is operated with no external heat sink, just stand-alone package. The thermal resistance is specified in the datasheet.) 26 of 33 AN-CoolMOS-02

8.1.2 SMD cooling Pout [W] f [khz] 30 50 75 100 125 150 60 SPD03N60C3 SPD03N60C3 SPB07N60C3 SPB11N60C3 SPB20N60C3 75 SPD03N60C3 SPD03N60C3 SPB07N60C3 SPB11N60C3 SPB20N60C3 100 SPD03N60C3 SPD04N60C3 SPB07N60C3 SPB20N60C3 125 SPD03N60C3 SPB07N60C3 SPB07N60C3 150 SPD03N60C3 SPB07N60C3 SPB11N60C3 175 SPD03N60C3 SPB07N60C3 200 SPD04N60C3 SPB07N60C3 Table 3: Recommended CoolMOS types (CoolMOS SMD version device uses the PCB copper area as heat sink. Thermal resistance is specified in the datasheet.) 8.1.3 External heat sink f [khz] Pout [W] 30 50 75 100 125 150 175 200 225 250 60 SPP02N60C3 SPP02N60C3 SPP03N60C3 SPP03N60C3 SPP04N60C3 SPP07N60C3 SPP11N60C3 SPP11N60C3 SPP20N60C3 SPP20N60C3 75 SPP02N60C3 SPP03N60C3 SPP03N60C3 SPP04N60C3 SPP07N60C3 SPP07N60C3 SPP11N60C3 SPP20N60C3 SPP20N60C3 SPP20N60C3 100 SPP02N60C3 SPP03N60C3 SPP03N60C3 SPP04N60C3 SPP07N60C3 SPP11N60C3 SPP11N60C3 SPP20N60C3 SPP20N60C3 SPP20N60C3 125 SPP02N60C3 SPP03N60C3 SPP03N60C3 SPP04N60C3 SPP07N60C3 SPP11N60C3 SPP20N60C3 SPP20N60C3 SPP20N60C3 150 SPP03N60C3 SPP03N60C3 SPP03N60C3 SPP07N60C3 SPP07N60C3 SPP11N60C3 SPP20N60C3 SPP20N60C3 175 SPP03N60C3 SPP03N60C3 SPP03N60C3 SPP07N60C3 SPP11N60C3 SPP11N60C3 SPP20N60C3 200 SPP03N60C3 SPP03N60C3 SPP03N60C3 SPP07N60C3 SPP11N60C3 SPP11N60C3 Table 4: Recommended CoolMOS types (CoolMOS is mounted on the external heat sink with the thermal resistance of 10K/W.) 27 of 33 AN-CoolMOS-02

8.2 Boost Converter (PFC) The design parameters for the continuous-current mode boost converter (PFC) are: Low AC input voltage is 100 volts, output DC voltage of the converter is 380 volts, ambient temperature is 60 C and junction temperature of CoolMOS is 110 C. Please note, that the total power losses in the MOSFET depend very strongly on the boost diode which is used. Due to this fact, this recommendation has been made using the assumption that the boost diode power losses are 50% of the conduction power losses of MOSFET. Pout, [W] Recommended Device SMD cooling External heat sink 50 SPD04N60C3 SPP02N60C3 100 SPB20N60C3 SPP04N60C3 150 SPP11N60C3 200 SPP20N60C3 250 SPP20N60C3 300 SPW47N60C3 Table 5: Recommended CoolMOS types 8.3 Single Transistor Forward Converter The design parameters for the continuous-current mode single transistor forward converter are: Input DC voltage is 380 volts, output voltage of the converter is 12 volts, ambient temperature is 60 C and junction temperature of CoolMOS is 110 C. Pout, [W] Recommended Device SMD cooling External heat sink 70 SPD06N80C3 SPP06N80C3 100 SPB17N80C3 SPP06N80C3 200 SPP06N80C3 300 SPP17N80C3 Table 6: Recommended CoolMOS types 28 of 33 AN-CoolMOS-02

8.4 Two Transistor Forward Converter The design parameters for the continuous-current mode two transistor forward converter are: Input DC voltage is 380 volts, output voltage of the converter is 12 volts, ambient temperature is 60 C and junction temperature of CoolMOS is 110 C. 8.4.1 No external cooling f [khz] Pout [W] 30 50 75 100 60 SPU03N60C3 SPU03N60C3 SPP07N60C3 75 SPU03N60C3 SPU04N60C3 SPP07N60C3 100 SPU03N60C3 SPP07N60C3 125 SPU03N60C3 SPP07N60C3 150 SPU04N60C3 175 SPP07N60C3 200 Table 7: Recommended CoolMOS types (CoolMOS is operated with no external heat sink, just stand alone package. The thermal resistance is specified in the datasheet.) 8.4.2 SMD cooling f [khz] Pout [W] 30 50 75 100 125 150 175 60 SPD03N60C3 SPD03N60C3 SPD04N60C3 SPB07N60C3 SPB07N60C3 SPB11N60C3 75 SPD03N60C3 SPD03N60C3 SPD04N60C3 SPB07N60C3 SPB07N60C3 100 SPD03N60C3 SPD03N60C3 SPB07N60C3 SPB07N60C3 125 SPD03N60C3 SPD04N60C3 SPB07N60C3 150 SPD03N60C3 SPD04N60C3 SPB07N60C3 175 SPD03N60C3 SPB07N60C3 SPB07N60C3 200 SPD03N60C3 SPB07N60C3 Table 8: Recommended CoolMOS types (CoolMOS SMD version device uses the PCB copper area as heat sink. Thermal resistance is specified in the datasheet.) 29 of 33 AN-CoolMOS-02

8.4.3 External heat sink f [khz] Pout [W] 30 50 75 100 125 150 175 200 225 250 60 SPP02N60C3 SPP02N60C3 SPP02N60C3 SPP02N60C3 SPP03N60C3 SPP03N60C3 SPP04N60C3 SPP07N60C3 SPP07N60C3 SPP07N60C3 75 SPP02N60C3 SPP02N60C3 SPP02N60C3 SPP02N60C3 SPP03N60C3 SPP04N60C3 SPP04N60C3 SPP07N60C3 SPP07N60C3 SPP11N60C3 100 SPP02N60C3 SPP02N60C3 SPP02N60C3 SPP03N60C3 SPP03N60C3 SPP04N60C3 SPP07N60C3 SPP07N60C3 SPP11N60C3 SPP11N60C3 125 SPP02N60C3 SPP02N60C3 SPP03N60C3 SPP03N60C3 SPP04N60C3 SPP04N60C3 SPP07N60C3 SPP07N60C3 SPP11N60C3 SPP11N60C3 150 SPP02N60C3 SPP02N60C3 SPP03N60C3 SPP03N60C3 SPP04N60C3 SPP04N60C3 SPP07N60C3 SPP11N60C3 SPP11N60C3 SPP11N60C3 175 SPP02N60C3 SPP02N60C3 SPP03N60C3 SPP03N60C3 SPP04N60C3 SPP07N60C3 SPP11N60C3 SPP11N60C3 SPP11N60C3 200 SPP02N60C3 SPP02N60C3 SPP03N60C3 SPP04N60C3 SPP04N60C3 SPP07N60C3 SPP11N60C3 SPP11N60C3 SPP11N60C3 Table 9: Recommended CoolMOS types (CoolMOS is mounted on the external heat sink with the thermal resistance of 10K/W.) 8.5 Full H Bridge Converter We do not recommend to use CoolMOS transistors in hard switching PWM full bridge converter with re-circulating current (such as motor drives) without additional freewheeling diodes. The poor switching behavior of the MOSFETs body diode can lead to high power losses in this circuit. In conventional H-Bridge power supplies, where the body diode only clamps leakage inductance energy, performance will be satisfactory, and selection similar as for the Full Bridge ZVT converter. For new designs, the ZVT converter is recommended. 8.6 Full Bridge ZVT Converter CoolMOS is very attractive device for full bridge Zero Voltage Transition topology due to its very low on-state resistance and strongly non linear output capacitance. Table 10 shows the CoolMOS recommended devices to be used in this complicated topology with external heat sink. Pout, [W] Recommended Device External heat sink 500...1000 SPP11N60C3 1000...2000 SPP20N60C3 2000...3000 SPW47N60C3 Table 10: Recommended CoolMOS devices 30 of 33 AN-CoolMOS-02