Description Absolute Maximum Ratings Parameter Max. Units Thermal Resistance Parameter Typ. Max. Units

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l l l l l Advanced Process Technology Optimized for 4.5V-7.0V Gate Drive Ideal for CPU Core DC-DC Converters Fast Switching Lead-Free Description These HEXFET Power MOSFETs were designed specifically to meet the demands of CPU core DC-DC converters in the PC environment. Advanced processing techniques combined with an optimized gate oxide design results in a die sized specifically to offer maximum efficiency at minimum cost. G PD - 94879 IRL3502PbF HEXFET Power MOSFET D S V DSS = 20V R DS(on) = 0.007Ω I D = 1A The TO-220 package is universally preferred for all commercial-industrial applications at power dissipation levels to approximately 50 watts. The low thermal resistance and low package cost of the TO-220 contribute to its wide acceptance throughout the industry. Absolute Maximum Ratings Parameter Max. Units I D @ T C = 25 C Continuous Drain Current, V GS @ 5.0V 1 I D @ T C = C Continuous Drain Current, V GS @ 5.0V 67 A I DM Pulsed Drain Current 420 P D @T C = 25 C Power Dissipation 140 W Linear Derating Factor 1.1 W/ C V GS Gate-to-Source Voltage ± V V GSM Gate-to-Source Voltage 14 V (Start Up Transient, tp = µs) E AS Single Pulse Avalanche Energy 390 mj I AR Avalanche Current 64 A E AR Repetitive Avalanche Energy 14 mj dv/dt Peak Diode Recovery dv/dt ƒ 5.0 V/ns T J Operating Junction and -55 to + 150 T STG Storage Temperature Range Soldering Temperature, for seconds 300 (1.6mm from case ) C Mounting torque, 6-32 or M3 srew lbf in (1.1N m) Thermal Resistance TO-220AB Parameter Typ. Max. Units R θjc Junction-to-Case 0.89 R θcs Case-to-Sink, Flat, Greased Surface 0.50 C/W R θja Junction-to-Ambient 62 12/9/03

Electrical Characteristics @ T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units Conditions V (BR)DSS Drain-to-Source Breakdown Voltage 20 V V GS = 0V, I D = 250µA V (BR)DSS/ T J Breakdown Voltage Temp. Coefficient 0.019 V/ C Reference to 25 C, I D = 1mA R DS(on) Static Drain-to-Source On-Resistance 0.008 V GS = 4.5V, I D = 64A Ω 0.007 V GS = 7.0V, I D = 64A V GS(th) Gate Threshold Voltage 0.70 V V DS = V GS, I D = 250µA g fs Forward Transconductance 77 S V DS = V, I D = 64A I DSS Drain-to-Source Leakage Current 25 V DS = 20V, V GS = 0V µa 250 V DS = V, V GS = 0V, T J = 150 C I GSS Gate-to-Source Forward Leakage V GS = -V na Gate-to-Source Reverse Leakage - V GS = V Q g Total Gate Charge 1 I D = 64A Q gs Gate-to-Source Charge 27 nc V DS = 16V Q gd Gate-to-Drain ("Miller") Charge 39 V GS = 4.5V, See Fig. 6 t d(on) Turn-On Delay Time V DD = V t r Rise Time 140 I ns D = 64A t d(off) Turn-Off Delay Time 96 R G = 3.8Ω, V GS = 4.5V t f Fall Time 130 R D = 0.15Ω, Between lead, L D Internal Drain Inductance 4.5 6mm (0.25in.) nh G from package L S Internal Source Inductance 7.5 and center of die contact C iss Input Capacitance 4700 V GS = 0V C oss Output Capacitance 1900 pf V DS = 15V C rss Reverse Transfer Capacitance 640 ƒ = 1.0MHz, See Fig. 5 D S Source-Drain Ratings and Characteristics Parameter Min. Typ. Max. Units Conditions D I S Continuous Source Current MOSFET symbol 1 (Body Diode) showing the A G I SM Pulsed Source Current integral reverse 420 (Body Diode) p-n junction diode. S V SD Diode Forward Voltage 1.3 V T J = 25 C, I S = 64A, V GS = 0V t rr Reverse Recovery Time 87 130 ns T J = 25 C, I F = 64A Q rr Reverse RecoveryCharge 200 3 nc di/dt = A/µs t on Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by L S +L D ) Notes: Repetitive rating; pulse width limited by max. junction temperature. Starting T J = 25 C, L = 190µH R G = 25Ω, I AS = 64A. ƒ I SD 64A, di/dt 86A/µs, V DD V (BR)DSS, T J 150 C Pulse width 300µs; duty cycle 2%. Calculated continuous current based on maximum allowable junction temperature; for recommended current-handling of the package refer to Design Tip # 93-4

I D, Drain-to-Source Current (A) 0 VGS TOP 7.00V 5.00V 4.50V 3.50V 3.00V 2.70V 2.50V BOTTOM 2.25V 2.25V I D, Drain-to-Source Current (A) 0 VGS TOP 7.00V 5.00V 4.50V 3.50V 3.00V 2.70V 2.50V BOTTOM 2.25V 2.25V 20µs PULSE WIDTH T J = 25 C 0.1 1 V DS, Drain-to-Source Voltage (V) 20µs PULSE WIDTH T J = 150 C 0.1 1 V DS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics I D, Drain-to-Source Current (A) 0 T J = 25 C T J = 150 C V DS= 15V 20µs PULSE WIDTH 2 3 4 5 6 V GS, Gate-to-Source Voltage (V) R DS(on), Drain-to-Source On Resistance (Normalized) 2.0 I D = 1A 1.5 1.0 0.5 V GS = 4.5V 0.0-60 -40-20 0 20 40 60 80 120 140 160 T J, Junction Temperature ( C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature

C, Capacitance (pf) 8000 6000 4000 2000 VGS = 0V, f = 1MHz Ciss = Cgs + Cgd, C ds Crss = Cgd Coss = Cds + Cgd C iss C oss C rss SHORTED V GS, Gate-to-Source Voltage (V) 15 12 9 6 3 I D = 64A V DS = 16V 0 1 V DS, Drain-to-Source Voltage (V) 0 0 40 80 120 160 Q G, Total Gate Charge (nc) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage I SD, Reverse Drain Current (A) 0 T J = 150 C T J = 25 C V GS = 0 V 0.5 1.0 1.5 2.0 2.5 V SD,Source-to-Drain Voltage (V) I D, Drain Current (A) 0 OPERATION IN THIS AREA LIMITED BY R DS(on) us us 1ms TC = 25 C TJ = 150 C Single Pulse ms 1 V DS, Drain-to-Source Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area

I D, Drain Current (A) 120 80 60 40 20 LIMITED BY PACKAGE 0 25 50 75 125 150 T C, Case Temperature ( C) E AS, Single Pulse Avalanche Energy (mj) 800 600 400 200 TOP BOTTOM I D 29A 40A 64A 0 25 50 75 125 150 Starting T, Junction Temperature ( J C) Fig 9. Maximum Drain Current Vs. Case Temperature Fig. Maximum Avalanche Energy Vs. Drain Current 1 Thermal Response (Z thjc ) 0.1 D = 0.50 0.20 0. 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thjc + TC 0.01 0.00001 0.0001 0.001 0.01 0.1 1 t 1, Rectangular Pulse Duration (sec) PDM t1 t2 Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

R DS (on) Drain-to-Source On Resistance ( Ω ) 0.014 0.012 0.0 0.008 0.006 V GS = 4.5V V GS = 7.0V 0.004 A 0 200 300 400 I, Drain Current (A) D R DS (on) Drain-to-Source On Resistance ( Ω ) 0.0 0.008 0.006 0.004 A 2.0 3.0 4.0 5.0 6.0 7.0 8.0 V GS I D = 64A, Gate-to-Source Voltage (V) Fig 12. On-Resistance Vs. Drain Current Fig 13. On-Resistance Vs. Gate Voltage

TO-220AB Package Outline Dimensions are shown in millimeters (inches) 2.87 (.113) 2.62 (.3).54 (.415).29 (.405) 3.78 (.149) 3.54 (.139) - A - 4.69 (.185) 4.20 (.165) - B - 1.32 (.052) 1.22 (.048) 15.24 (.600) 14.84 (.584) 14.09 (.555) 13.47 (.530) 1 2 3 4 6.47 (.255) 6. (.240) 1.15 (.045) MIN 4.06 (.160) 3.55 (.140) LEAD ASSIGNMENTS LEAD ASSIGNMENTS HEXFET IGBTs, CoPACK 1 - GATE 1- GATE 2 - DRAIN 1- GATE 2- DRAIN 3 - SOURCE 2- COLLECTOR 3- SOURCE 4 - DRAIN 3- EMITTER 4- DRAIN 4- COLLECTOR 3X 1.40 (.055) 1.15 (.045) 2.54 (.) 2X NOTES: 3X 0.93 (.037) 0.69 (.027) 0.36 (.014) M B A M 0.55 (.022) 3X 0.46 (.018) 2.92 (.115) 2.64 (.4) 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB. 2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS. TO-220AB Part Marking Information EXAMPLE: T HIS IS AN IRF LOT CODE 1789 AS S EMBLED ON WW 19, 1997 IN THE ASSEMBLY LINE "C" Note: "P" in assembly line position indicates "Lead-Free" INT ERNAT IONAL RE CT IFIER LOGO AS S E MB L Y LOT CODE PART NUMBER DATE CODE YEAR 7 = 1997 WEEK 19 LINE C Data and specifications subject to change without notice. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (3) 252-75 TAC Fax: (3) 252-7903 Visit us at www.irf.com for sales contact information.12/03

Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/