Preliminary Data Sheet No.PD 65-G IPSL FULLY PROTECTED POWER MOSFET SWITCH Features Over temperature shutdown Over current shutdown Active clamp Low current & logic level input E.S.D protection Description The IPSL is a fully protected three terminal SMART POWER MOSFET that features over-current, overtemperature, ESD protection and drain to source active clamp.this device combines a HEXFET POWER MOSFET and a gate driver. It offers full protection and high reliability required in harsh environments. The driver allows short switching times and provides efficient protection by turning OFF the power MOSFET when the temperature exceeds 65 o C or when the drain current reaches 5A. The device restarts once the input is cycled. The avalanche capability is significantly enhanced by the active clamp and covers most inductive load demagnetizations. Product Summary R ds(on) 5mΩ (max) V clamp I shutdown Tshutdown T on/ T off Available Package 5V 5A 65 o C.5µs 3 Lead SOT3 Typical Connection Load R in series (if needed) IN control ƒ D S Logic signal
IPSL Absolute Maximum Ratings Absolute maximum ratings indicates sustained limits beyond which damage to the device may occur. All voltage parameters are referenced to SOURCE lead. (TAmbient = 5 o C unless otherwise specified). PCB mounting uses the standard footprint with 7 µm copper thickness. Symbol Parameter Min. Max. Units Test Conditions V ds Maximum drain to source voltage 7 V in Maximum Input voltage -.3 7 V Iin, max Maximum IN current - + ma Isd cont. Diode max. continuous current () (rth=5 o C/W). Isd pulsed Diode max. pulsed current () Pd Maximum power dissipation () (rth=5 o C/W) W ESD Electrostatic discharge voltage (Human Body) tbd C=pF, R=5Ω, ESD Electrostatic discharge voltage (Machine Model) tbd V C=pF, R=Ω, Tj max. Max. storage & operating junction temp. - +5 o C A Thermal Characteristics Symbol Parameter Min. Typ. Max. Units Test Conditions Rth Thermal resistance with standard footprint 5 o C/W Rth Thermal resistance with " square footprint 5 6 Recommended Operating Conditions These values are given for a quick design. For operation outside these conditions, please consult the application notes. Symbol Parameter Min. Max. Units Vds (max) Continuous drain to source voltage 35 VIH High level input voltage 6 V VIL Low level input voltage.5 Ids Continuous drain current Tamb=85 o C (TAmbient = 85 o C, IN = 5V, rth = o C/W, Tj = 5 o C). A Rin Recommended resistor in series with IN pin.5 5 kω Tr-in (max) Max recommended rise time for IN signal (see fig. ) µs Fr-Isc () Max. frequency in short circuit condition (Vcc = V) khz () Limited by junction temperature (pulsed current limited also by internal wiring) () Operations at higher switching frequencies is possible. See Appl. notes.
IPSL Static Electrical Characteristics (Tj = 5 o C unless otherwise specified.) Standard footprint 7 µm copper thickness. Symbol Parameter Min. Typ. Max. Units Test Conditions Rds(on) ON state resistance Tj = 5 o C 5 @Tj=5 o C Rds(on) ON state resistance Tj = 5 o C 9 6 mω Vin = 5V, Ids = A @Tj=5 o C Idss Drain to source leakage current.5 5 µa Vcc = V, Tj = 5 o C @Tj=5 o C V clamp Drain to source clamp voltage 7 5 Id = ma (see Fig.3 & ) V clamp Drain to source clamp voltage 5 6 Id=Ishutdown (see Fig.3 & ) Vsd Body diode forward voltage.85 V Id = A, Vin = V Vin clamp IN to source clamp voltage 7 8. 9.5 Iin = ma Vth IN threshold voltage.6 Id = 5mA Iin, on Input supply current (normal operation) 5 8 Vin = 5V Iin, off Input supply current (protection mode) 5 3 5 µa Vin = 5V over-current triggered Switching Electrical Characteristics Vcc = V, Resistive Load = Ω, Rinput = 5Ω, µsec pulse, T j = 5 o C, (unless otherwise specified). Symbol Parameter Min. Typ. Max. Units Test Conditions Ton Turn-on delay time.5 Tr Rise time See figure Trf Time to 3% final Rds(on) 6 µsec Toff Turn-off delay time See figure Tf Fall time.3 Qin Total gate charge 3.3 nc Vin = 5V Protection Characteristics Symbol Parameter Min. Typ. Max. Units Test Conditions Tsd Over temperature threshold 65 o C See fig. Isd Over current threshold 5 A See fig. V in,min,prot Minimum IN voltage for protection 3 V Treset Minimum time for protection reset µs Vin = V EOI_OT Short circuit energy (cf application note) µj Vcc = V 3
IPSL Functional Block Diagram All values are typical DRAIN 7 V Ω kω IN S Q 7.5 V 8 µa R Q T > 65 c I sense I > Isd SOURCE Lead Assignments () D 3 In D S Tape & Reel - SOT3-8 5 / -8
IPSL Case Outline - 3 Lead SOT-3-5
IPSL Vin 5 V V Vin 9 % % Ids Isd I shutdown t < T reset t > T reset Ids Tr-in 9 % % T Tsd (65 c) T shutdown Vds Td on tr Td off tf Figure - Timing diagram Figure - IN rise time & switching time definitions T clamp Vin L V load Ids Vds Vds clamp ( Vcc ) ( see Appl. Notes to evaluate power dissipation ) Rem : V load is negative during demagnetization 5 v v Vin IN R D S Vds Ids + V - Figure 3 - Active clamp waveforms Figure - Active clamp test circuit 6
IPSL All curves are typical values with standard footprints. Operating in the shaded area is not recommended. 3 5 5 5 Tj = 5 o C Tj = 5 o C 3 5 6 7 8 6 5 3 9 8 7 6-5 -5 5 5 75 5 5 Figure 5 - Rds ON (mω) Vs Input Voltage (V) Figure 6 - Normalised Rds ON (%) Vs Tj ( o C) 9 8 7 6 5 3 ton delay rise time 3% rdson 3 5 6 7 8 toff delay fall time 3 3 5 6 7 8 Figure 7 - Turn-ON Delay Time, Rise Time & Time to 3% final Rds(on) Vs Input Voltage (V) Figure 8 - Turn-OFF Delay Time & Fall Time (us) Vs Input Voltage (V) 7
IPSL delay on rise time 3% rdson delay off fall time. Figure 9 - Turn-ON Delay Time, Rise Time & Time to 3% final Rds(on) Vs IN Resistor (Ω). Figure - Turn-OFF Delay Time & Fall Time (us) Vs IN Resistor (Ω) 8 6 Isd 5 C Ilim 5 C 3 5 6 7 8 6 5 3-5 -5 5 5 75 5 5 Figure - Current Iim. & Ishutdown (A) Vs Vin (V) Figure - Over-current (A) Vs Temperature ( o C) 8
IPSL 5 3 " footprint 55 C/W std. footprint C/W T=5 C Std. footprint T= C Std footprint Current path capability should be above this curve Load characteristic should be below this curve -5 5 5 Figure 3 - Max.Cont. Ids (A) Vs Amb. Temperature ( o C) Figure - Ids (A) Vs Protection Resp. Time (s) single pulse Hz rth= C/W dt=5 C khz rth= C/W dt=5 C. Single pulse Vbat = V Tjini = T sd all curves for mosfet active.... Figure 5 - Iclamp (A) Vs Inductive Load (mh) Figure 6 - Transient Thermal Imped. ( o C/W) Vs Time (s) 9
IPSL WORLD HEADQUARTERS: 33 Kansas St., El Segundo, California 95 Tel: (3) 3 333 IR GREAT BRITAIN: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 883 73 IR CANADA: 5 Lincoln Court, Brampton, Ontario L6T 3Z Tel: (95) 53- IR GERMANY: Saalburgstrasse 57, 635 Bad Homburg Tel: ++ 9 67 9659 IR ITALY: Via Liguria 9, 7 Borgaro, Torino Tel: ++ 39 5 IR FAR EAST: K&H Bldg., F, 3- Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo, Japan 7 Tel: 8 3 3983 86 IR SOUTHEAST ASIA: Kim Seng Promenade, Great World City West Tower, 3-, Singapore 3799 Tel: 65 838 63 IR TAIWAN: 6 Fl. Suite D..7, Sec., Tun Haw South Road, Taipei, 673, Taiwan Tel: 886--377-9936 http://www.irf.com/ Data and specifications subject to change without notice. 9/5/98