Growing the Semiconductor Industry in New York: Challenges and Opportunities

Similar documents
Lithography Industry Collaborations

The SEMATECH Model: Potential Applications to PV

G450C. Global 450mm Consortium at CNSE. Michael Liehr, General Manager G450C, Vice President for Research

ISMI Industry Productivity Driver

SUNY Poly in a New Era

Photoresists & Ancillaries. Materials for Semiconductor Manufacturing A TECHCET Critical Materials Report

Intel Technology Journal

ISMI 450mm Transition Program

ISMI 450mm Transition Program

A Presentation to the National Academies July 29, Larry W. Sumney President/CEO Semiconductor Research Corporation1

The Center for Emerging and Innovative Sciences University of Rochester September 5, 2013

Scaling of Semiconductor Integrated Circuits and EUV Lithography

Accelerating the next technology revolution

Changing the Approach to High Mask Costs

450mm silicon wafers specification challenges. Mike Goldstein Intel Corp.

Public. Introduction to ASML. Ron Kool. SVP Corporate Strategy and Marketing. March-2015 Veldhoven

State of the art EUV mask blank inspection with a Lasertec M7360 at the SEMATECH MBDC

R&D Status and Key Technical and Implementation Challenges for EUV HVM

Lithography. International SEMATECH: A Focus on the Photomask Industry

Status of Panel Level Packaging & Manufacturing

It s Time for 300mm Prime

A New Era in Nanotechnology Research: The Industry-University-Government Cooperative Model

IMI Labs Semiconductor Applications. June 20, 2016

Beyond Moore the challenge for Europe

Beyond Immersion Patterning Enablers for the Next Decade

Collaboration: The Semiconductor Industry s Path to Survival and Growth

EUV Lithography Transition from Research to Commercialization

HOW TO CONTINUE COST SCALING. Hans Lebon

EUVL getting ready for volume introduction

Enabling Semiconductor Innovation and Growth

Commercializing Innovation:

CMP: Where have we been and where are we headed next? Robert L. Rhoades, Ph.D. NCCAVS CMPUG Meeting at Semicon West San Francisco, July 10, 2013

DUV. Matthew McLaren Vice President Program Management, DUV. 24 November 2014

26 June 2013 copyright 2013 G450C

Shooting for the 22nm Lithography Goal with the. Coat/Develop Track. SOKUDO Lithography Breakfast Forum 2010 July 14 (L1)

A Perspective on Semiconductor Equipment. R. B. Herring March 4, 2004

co-located with SPIE Scanning Microscopies

450mm and Moore s Law Advanced Packaging Challenges and the Impact of 3D

The Development of the Semiconductor CVD and ALD Requirement

Progress due to: Feature size reduction - 0.7X/3 years (Moore s Law). Increasing chip size - 16% per year. Creativity in implementing functions.

Semiconductor Technology Academic Research Center copyright STARC,2004

Intel's 65 nm Logic Technology Demonstrated on 0.57 µm 2 SRAM Cells

EUV Supporting Moore s Law

Advancing Industry Productivity

Accelerating Growth and Cost Reduction in the PV Industry

Computational Lithography Requirements & Challenges for Mask Making. Naoya Hayashi, Dai Nippon Printing Co., Ltd

GSEF 2019 Advisory Board

SEMATECH Defect Printability Studies

Imec pushes the limits of EUV lithography single exposure for future logic and memory

Principles of Innovation

National Projects on Semiconductor in NEDO

Glass Substrates for Semiconductor Manufacturing

W ith development risk fully borne by the equipment industry and a two-year delay in the main

«Single European Semiconductor Strategy: Industry s Vision for Europe»

Lithography Roadmap. without immersion lithography. Node Half pitch. 248nm. 193nm. 157nm EUVL. 3-year cycle: 2-year cycle: imec 2005

Wafer-Edge Challenges

MEDIA RELEASE FOR IMMEDIATE RELEASE. 8 November 2017

Proceedings. BiTS Shanghai October 21, Archive - Session BiTS Workshop Image: Zhu Difeng/Dollar Photo Club

Common Development Topics for Semiconductor Manufacturers and their Suppliers in Germany

Manufacturing Case Studies: Copy Exactly (CE!) and the two-year cycle at Intel

Technology Transfers Opportunities, Process and Risk Mitigation. Radhika Srinivasan, Ph.D. IBM

Economic Impact of the Albany Cluster. Kenneth Adams President & CEO, Commissioner Empire State Development

CLSA Investors Forum 2017

(Complementary E-Beam Lithography)

Nanomanufacturing and Fabrication By Matthew Margolis

Mask Technology Development in Extreme-Ultraviolet Lithography

TWINSCAN XT:1950i Water-based immersion taken to the max Enabling fast, single-exposure lithography at sub 40 nm

Day One 13 March Day Two 14 March 2019

Lithography on the Edge

GIGAPHOTON INTRODUCTION

PUSHING LITHOGRAPHY TO ENABLE ULTIMATE NANO-ELECTRONICS. LUC VAN DEN HOVE President & CEO imec

UV Nanoimprint Stepper Technology: Status and Roadmap. S.V. Sreenivasan Sematech Litho Forum May 14 th, 2008

The Collaboration Engine: Enabling Innovation in Microelectronics

Technology & Manufacturing Readiness RMS

ASML Market dynamics. Dave Chavoustie EVP Sales Analyst Day, September 30, 2004

Optics for EUV Lithography

ICT Man Final Meeting

IMEC update. A.M. Goethals. IMEC, Leuven, Belgium

Doug Dunn ASML President and Chief Executive Officer Deutsche Bank Conference London, England September 19, / Slide 1

Status and Perspectives of the European Semiconductor Industry. Andreas Wild

Towards an affordable Cost of Ownership for EUVL. Melissa Shell Principal Engineer & Program Manager, EUVL Research Components Research October 2006

Comparison of actinic and non-actinic inspection of programmed defect masks

MEDIA RELEASE INSTITUTE OF MICROELECTRONICS KICKS OFF COPPER WIRE BONDING CONSORTIUM II TO TACKLE COPPER INTERCONNECTS RELIABILITY ISSUES

Research Consortia as Knowledge Brokers: Insights from Sematech

Mask magnification at the 45-nm node and beyond

IMPACT OF 450MM ON CMP

MAPPER: High throughput Maskless Lithography

45nm Foundry CMOS with Mask-Lite Reduced Mask Costs

Lithography in our Connected World

Market and technology trends in advanced packaging

Noel Technologies. Provider of Advanced Lithography and Semiconductor Thin Film Services

TSMC Property. EUV Lithography. The March toward HVM. Anthony Yen. 9 September TSMC, Ltd

» Facing the Smart Future «

Core Business: Semiconductor-related Inspection Equipment

DoD Electronics Priorities

Facing Moore s Law with Model-Driven R&D

Climate Change Innovation and Technology Framework 2017

Spring of EUVL: SPIE 2012 AL EUVL Conference Review

Holistic Lithography. Christophe Fouquet. Executive Vice President, Applications. 24 November 2014

SEMI Connects: An Overview of SEMI Worldwide. Theresia Fasinski - Manager Membership Relations, SEMI Europe

Transcription:

Accelerating the next technology revolution The SEMATECH New York Experience Growing the Semiconductor Industry in New York: Challenges and Opportunities Dan Armbrust President and CEO, SEMATECH April 4, 2013 Copyright 2013 SEMATECH, Inc. SEMATECH, and the SEMATECH logo are registered servicemarks of SEMATECH, Inc. International SEMATECH Manufacturing Initiative and ISMI are servicemarks of SEMATECH, Inc. All other servicemarks and trademarks are the property of their respective owners.

Semiconductor Industry Virtuous cycle More R&D (innovation) Lower cost/function $ s Increasing semiconductor revenue Expanding applications (more silicon) www.sematech.org 2

Moore s Law Microprocessor Transistor Counts 1971-2011 & Moore s Law 26 April 2013 3

Semiconductor Industry Virtuous cycle More R&D (innovation) Lower cost/function $ s Increasing semiconductor revenue Expanding applications (more silicon) www.sematech.org 4

SEMATECH Context Semiconductor supply chain Industry structure: then and now System Integrated Device Manufacturer (IDM) Systems Design Packaging and Assembly Chip Technology EDA Tools Memory Logic IDM Fabless Fablite Foundries Package and Assembly Equipment and Materials EDA Equipment Materials www.sematech.org 5

Industry Challenges Key stakeholders www.sematech.org 6

Too Many Challenges to Solve Alone Success in semiconductors is driven by technology innovation and advances in manufacturing Success depends on comprehensive industry-wide collaboration Challenges are global, and cut across industry ecosystem Solutions require significant investment, leveraged funding www.sematech.org 7

SEMATECH Overview History SEMATECH created Entered alliance with New York State (Phase I) Expanded membership to include industry supply chain companies Continued alliance with New York State (Phase II) SEMATECH and CNSE launch PVMC 1987 1995 2000 2003 2007 2008 2010 2011 Formed subsidiary for 300 mm wafer conversion Expanded membership to international companies Created subsidiary for manufacturing 450 mm wafer conversion G450C www.sematech.org 8

Bridging Research, Development, and Manufacturing A membership-driven global consortium Driving technical consensus for the industry Pulling research into the industry mainstream Leading major programs to address critical industry transitions Focus on manufacturability www.sematech.org 9

SEMATECH Members www.sematech.org 10

Membership Agreements SEMATECH Programs Attract Growth 2007 2008 2009 2010 2011 2012 2013 (YTD) TEL (3D) Accretech (3D) NEXX (3D) TEL (Litho) TSMC Invensas (3D) Advantest (Met) Rudolph (Met) Asahi Glass (Litho) Atotech (3D) Dow (Litho) Qualcomm Inpria (Litho) Air Products (FEP) Rudolph (3D) AMAT (ESH) Altera (3D) Centrotherm (FEP) Araca (ISMI) TEL (FEP) ASML (Litho) ON Semiconductor (3D) SSEC (3D) Morgan Ceramics (ISMI) Metrosol (FEP) JSR (Litho) LSI (3D, ISMI) Kumho (Litho) Poongsan (FEP) 90 80 70 60 50 New members since 2007 Canon-Anelva (FEP) AZ Electric (Litho) SK Hynix (3D) Vishay (ISMI) TOK (Litho) Qualcomm (3D) Fujifilm (3D) SK Hynix (Litho) Shin-Etsu (Litho) Edwards (ESH) ADI (3D) Winbond (ISMI) FEI Company (Met) Lasertec (3D) ASE (3D) LinTec (3D) Core Wafer Sys. (FEP) DNP (Litho) 4DS (FEP) Hewlett-Packard (ISMI) SUSS (FEP) Panasonic (ISMI) Matheson (ESH) Pall (ISMI) ASML (FEP) Nanosys (FEP) NIST (3D) Renesas (ISMI) AMD (ISMI) Sumitomo (Litho) SRC (3D) Spansion (ISMI) 40 30 20 10 0 2007 2008 2009 2010 2011 2012 2013 Nissan Chem (Litho) KLA-Tencor (Litho) Cabot (FEP) Freescale (ISMI) Applied Seals (Litho) Infineon (ISMI) Infineon (ISMI) Micronix (ISMI) Micron (ISMI) NXP (ISMI) Aixtron (FEP) STMicro (ISMI) Soitec (FEP,Met) Dai Nippon Screen (FEP) Hoya (Litho) Texas Instruments (ESH) www.sematech.org

Consortium Success Factors A clear industry-led model and mission Leadership from industry champions Industry with adequate revenue and maturity Ideally, a crisis Leveraging of government and industry funds Member engagement Agility to adapt to changing needs www.sematech.org 12

Industry/University/Government Collaboration in Albany www.sematech.org 13

R&D Costs www.sematech.org 14

Trends & Challenges Rising R&D costs; fewer funders Consolidation device makers, supply chain Supply chain challenges Insufficient early feedback Affordable infrastructure Broken business models Greater share of the R&D burden Increasing need/pressure to collaborate A growing and compelling collaborative model in Albany and clear pathway to 450 mm activities www.sematech.org 15

MEMORY LOGIC SEMATECH Focused on Materials & Nanostructures Advanced Materials Advanced Structures Beyond CMOS Materials/Structures 2009 2011 2013 2015 2017 2019 www.sematech.org 16

Technology Gap Early learning and infrastructure development Solution SEMATECH Center for Next-Generation Devices Applied Research Development Manufacturing Systems & Design IDMs & Foundries Equipment & Materials Atomic-level chemistries <10 nm advanced structures Simulation Fabrication flows Nanoscale equipment R&D center that champions and enables next-generation technologies Participation from universities, equipment and materials makers, and chip manufacturers Establishes complete pilot line for research, development, manufacturing enablement www.sematech.org 17

Lithography Scaling www.sematech.org 18

EUV Progress Critical enablers First EUV tools installed in Albany & Belgium EUV is REAL Bacus/EUV Symposium EUV Mask Consortium EMI 3100 s in the Field EUV in Dev @ IDMS 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 Source power Defect-free mask Resist resolution Reticle protection Optics quality Overcome 30 nm resolution brick wall Integrated reticle handling 0 defects <4% flare optics ~10-20 W @IF >100 W @ IF reliable source required ~10-50X defect reduction required for HVM LWR needs 2X improvement for MPU (OK for Memory) Commercial reticle handling solution available 3300 optics complete www.sematech.org 19

Technology Gap Underinvestment in EUV mask metrology equipment Solution SEMATECH EUV Equipment Manufacturing Initiative (EMI) Applied Research Development Manufacturing Systems & Design IDMs & Foundries Equipment & Materials Advanced defect metrology for EUV Large prototype investment Uncertainty in timing Common infrastructure Connects multiple segments of the EUV supply chain in a partnership to collectively fund the development of needed metrology tools by equipment suppliers www.sematech.org 20

Technology Gap Lack of affordable early access to EUV imaging Solution SEMATECH Resist and Materials Development Center (RMDC) Applied Research Development Manufacturing Systems & Design IDMs & Foundries Equipment & Materials Limited access to EUV tools for research Need for early full-field exposures 5000 4000 3000 2000 1000 0 Materials Processed by RMDC 2008 2009 2010 2011 2012 www.sematech.org 21

Technology Gap Insufficient defect identification and mitigation Solution SEMATECH Nanodefect Center Applied Research Development Manufacturing Systems & Design IDMs & Foundries Equipment & Materials As defect requirements become more stringent, interdisciplinary knowledge is needed to understand defect generation processes Characterizing small-sized defects is costly and time consuming Centralized facility providing a critical mass of expensive infrastructure with extensive forensics and analytical capabilities www.sematech.org 22

New Solar Consortium U.S. PVMC Launched the U.S. Photovoltaic Manufacturing Consortium (PVMC) in September 2011 with CNSE Public/private investment of ~$300M over 5 years from U.S. Department of Energy ($62M from SunShot Initiative), industry, New York State Partnership with ~40 companies and organizations throughout the industry supply chain Facilities and Equipment Scale-Up Strategy R&D Pilot Prototyping Manufacturing Development Manufacturing Lab Scale & Testing 100 kw 10 MW >100 MW NREL, Sandia, CNSE, Industry, University PVMC, Halfmoon, NY PVMC, NY Industry Sites www.sematech.org 23

Lessons Learned from SEMATECH s Proven Consortium Model Need an ambitious national and regional strategy to drive broad collaboration at sufficient scale to: Build R&D and manufacturing infrastructure Provide access to pilot facilities to demonstrate innovations at manufacturing scale Create technology roadmaps and standards Conduct both collaborative and proprietary technology programs SEMATECH has benefited enormously from the shared capabilities at CNSE in Albany, with consistent NY State government support Industry participation in NY will continue to expand across the semiconductor industry s supply chain and into adjacent industries It s all about shared public and private investments in infrastructure and ecosystems www.sematech.org 24