GENERAL DECRIPTION The GM7228 is a high-speed, low-power double-pole/ double-throw (DPDT) analog switch that operates from a single 1.8V to 4.3V power supply. GM7228 is designed for the switching of high-speed UB 2.0 signals in handset and consumer applications, such as cell phones, digital cameras, and notebooks with hubs or controllers with limited UB I/Os. The GM7228 has low bit-to-bit skew and high channel-to-channel noise isolation, and is compatible with various standards, such as high-speed UB 2.0 (480 Mbps). Each switch is bidirectional and offers little or no attenuation of the high-speed signals at the outputs. Its bandwidth is wide enough to pass high-speed UB 2.0 differential signals (480 Mb/s) with good signal integrity. The GM7228 contains special circuitry on the D+/Dpins which allows the device to withstand a V BU short to D+ or D- when the UB devices are either powered off or powered on. FEATURE Low Cost R ON is Typically 6Ω at 3.0V Low Bit-to-Bit kew: 50ps (TYP) Voltage Operation: 1.8V to 4.3V Fast witching Times: t ON 10ns t OFF 22ns Low Crosstalk: -40dB at 250MHz Power-Off Protection when V+ = 0V, D+/D- Pins can Tolerate up to 5.25V High Off-Isolation: -35dB at 250MHz Rail-to-Rail Input and Output Operation Break-Before-Make witching Extended Industrial Temperature Range: -40 to +85 mall Package: WQFN-10 BLOCK DIAGRAM GM7228 is available WQFN-10 package. It operates over an ambient temperature range of -40 to +85. D+ HD1+ HD2+ APPLICATION Route ignals for UB 2.0 MP3 and Other Personal Media Players Digital Cameras and Camcorders Portable Instrumentation et-top Box PDAs D- OE LOGIC HD2- HD1-1
ORDERING INFORMATION MODEL PIN- PACKAGE PECIFIED TEMPERATURE RANGE ORDERING NUMBER PACKAGE MARKING PACKAGE OPTION GM7228 WQFN-10-40 to +85 GM7228YWQ10G/TR 7228 Tape and Reel, 3000 ABOLUTE MAXIMUM RATING to... 0V to 4.6V Analog, Digital voltage range...-0.3v to () + 0.3V Continuous Current H or...±100ma Peak Current H or...±150ma Operating Temperature Range...-40 to +85 Junction Temperature... 150 torage Temperature...-65 to +150 Lead Temperature (soldering, 10s)...260 ED usceptibility HBM...4000V MM...400V tresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. CAUTION This integrated circuit can be damaged by ED if you don t pay attention to ED protection. GMICRO recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ED damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. GMICRO reserves the right to make any change in circuit design, specification or other related things if necessary without notice at any time. Please contact GMICRO sales office to get the last datasheet. 2
PIN CONFIGURATION (TOP VIEW) HD2- HD1- OE 8 7 6 5 D- 9 4 10 3 D + 1 2 HD1 + HD2 + WQFN-10 PIN DECRIPTION PIN NAME FUNCTION 9 Power upply 4 Ground 10 elect Input 8 OE Output Enable 1, 2 HD1+, HD2+ 7, 6 HD1-, HD2- Data Ports 3, 5 D+, D- FUNCTION TABLE OE HD1+ HD1- HD2+ HD2-0 0 ON OFF 0 1 OFF ON 1 OFF OFF witches hown For Logic 0 Input 3
ELECTRICAL CHARACTERITIC ( = +1.8V to +4.3V, = 0V, V IH = +1.6V, V IL = +0.5V, T A = -40 to + 85. Typical values are at = +3.3V, T A = +25, unless otherwise noted.) PARAMETER YMBOL CONDITION TEMP MIN TYP MAX UNIT ANALOG WITCH Analog I/O Voltage (HD1+, HD1-, HD2+, HD2-) V I -40 to +85 0 V On-Resistance On-Resistance Match Between Channels On-Resistance Flatness R ON R ON R FLAT(ON) = 3.0V, V I = 0V to 0.4V, I D = 8mA, +25 6 10 Test Circuit 1-40 to +85 10.5 = 3.0V, V I = 0V to 0.4V, I D = 8mA, +25 0.15 0.6 Test Circuit 1-40 to +85 1.6 = 3.0V, V I = 0V to 1.0V, I D = 8mA, +25 1.5 2.0 Test Circuit 1-40 to +85 2.6 Ω Ω Ω Power Off Leakage Current (D+, D-) I OFF = 0V, V D = 0V to 3.6 V, V, V OE = 0V or 3.6 V -40 to +85 1 µa Increase in I + per Control Voltage I CCT = 3.6V, V or V OE = 2.6 V -40 to +85 5 µa ource Off Leakage Current I HD2(OFF) I HD1(OFF) = 3.6V, V I = 3.3V/ 0.3V, V D = 0.3V/ 3.3V -40 to +85 1 µa Channel On Leakage Current I HD2(ON), I HD1(ON) = 3.6V, V I = 3.3V/ 0.3V, V D = 3.3V/ 0.3V or floating -40 to +85 1 µa DIGITAL INPUT Input High Voltage V IH -40 to +85 1.6 V Input Low Voltage V IL -40 to +85 0.5 V Input Leakage Current I IN = 3.0V, V, V OE = 0V or -40 to +85 1 µa DYNAMIC CHARACTERITIC Turn-On Time t ON V I = 0.8V, = 50Ω, C L = 10pF, +25 10 ns Turn-Off Time Break-Before-Make Time Delay t OFF t D Test Circuit 2 +25 22 ns V I = 0.8V, = 50Ω, C L = 10pF, Test Circuit 3 +25 4 ns Propagation Delay t PD = 50Ω, C L = 10pF +25 0.3 ns Off Isolation Channel-to-Channel Crosstalk 3dB Bandwidth O IO X TALK ignal = 0dBm, = 50Ω, f = 250MHz, Test Circuit 4 +25-35 db ignal = 0dBm, = 50Ω, f = 250MHz, Test Circuit 5 +25-40 db ignal = 0dBm, = 50Ω, C L = 5pF BW +25 550 MHz Test Circuit 6 Channel-to-Channel kew t KEW = 50Ω, C L = 10pF +25 0.05 ns Charge Injection elect Input to V G =, C L = 1.0nF, R G = 0Ω, Q Common I/O Q = C L x, Test Circuit 7 +25 11 pc HD+, HD-, D+, D- ON Capacitance C ON +25 7 pf POWER REQUIREMENT Power upply Range -40 to +85 1.8 4.3 V Power upply Current I + = 3.0V, V, V OE = 0V or -40 to +85 1 µa 4
TET CIRCUIT 8mA V1 H R ON = V1/8mA Test Circuit 1. On Resistance 0.1µF V HD1n HD2n C L V OH 50% 50% 90% 90% V OL t ON t OFF Test Circuit 2. witching Times (t ON, t OFF ) HD1n 50% V 0.1µF HD2n 0 C L 90% of V OH V 0 t D Test Circuit 3. Break-Before-Make Time (t D ) 5
TET CIRCUIT (Cont.) 0.1µF HD1n HD2n ource ignal Test Circuit 4. Off Isolation 0.1µF H ource ignal N.C. H Channel To Channel Crosstalk = -20 log V H Test Circuit 5. Channel-to-Channel Crosstalk 6
TET CIRCUIT (Cont.) 0.1μF H ource ignal C L Test Circuit 6. -3dB Bandwidth HD1n 0 V G R G HD2n C L ΔOUT Q = Δ C L Test Circuit 7. Charge Injection (Q) 7
APPLICATION NOTE: Meeting UB 2.0 V BU hort Requirements In section 7.1.1 of the UB 2.0 specification, it notes that UB devices must be able to withstand a V BU short to D+ or D- when the UB devices is either powered off or powered on The GM7228 can be successfully configured to meet both these requirements. Power-Off Protection For a V BU short circuit the switch is expected to withstand such a condition for at least 24 hours. The GM7228 has specially designed circuitry which prevents unintended signal bleed through as well as guaranteed system reliability during a power-down, over-voltage condition. The protection has been added to the common pins (D+, D-). Power-On Protection The UB 2.0 specification also notes that the UB device should be capable of withstanding a V BU short during transmission of data. This modification works by limiting current flow back into the V+ rail during the over-voltage event so current remains within the safe operating range. In this application, the switch passes the full 5.25V input signal through to the selected output, while maintaining specified off isolation on the un-selected pins. 8
PACKAGE OUTLINE DIMENION WQFN-10 1.800± 0.050 0.500± 0.050 0.400± 0.050 ( 9) 0.400 TYP PIN #1 IDENTIFICATION CHAMFER 0.350 45 1.400± 0.050 0.800 REF PIN #1 DOT BY MARKING TOP VIEW 0.500± 0.050 0.200± 0.050 0.100± 0.050 BOTTOM VIEW 0.750± 0.050 IDE VIEW 0.203 REF 0.000-0.050 NOTE: All linear dimensions are in millimeters. 9