9-9; Rev ; /9 EVALUATION KIT MANUAL FOLLOWS DATA SHEET Two-Channel, Triple/Quad General Description The MAX MAX series of two-channel, triple/quad buffered video switches and video buffers combines high-accuracy, unity-gain-stable amplifiers with high-performance video switches. Fast switching time and low differential gain and phase error make this series of switches and buffers ideal for all video applications. The devices are all specified for ±V supply operation with inputs and outputs as high as ±.V when driving Ω loads ( back-terminated cable). Input capacitance is typically only pf, and channel-tochannel crosstalk is better than db, accomplished by surrounding all inputs with AC ground pins. The onboard amplifiers feature a V/µs slew rate (V/µs for A V = V/V amplifiers), and a bandwidth of MHz (9MHz for A V = V/V buffers). Channel selection is controlled by a single TTL-compatible input pin or by a microprocessor interface, and channel switch time is only ns. For design flexibility, devices are offered with bufferamplifier gains of V/V or V/V for back-terminated applications. Output amplifiers have a guaranteed output swing of ±V into. Devices offered in this series are as follows: PART DESCRIPTION VOLTAGE GAIN (V/V) MAX Triple RGB Switch & Buffer MAX Quad RGB Switch & Buffer MAX Triple RGB Switch & Buffer Quad RGB Switch & Buffer MAX Triple Video Buffer MAX Quad Video Buffer MAX9 Triple Video Buffer MAX Quad Video Buffer Features MHz Unity-Gain Bandwidth 9MHz Bandwidth with V/V Gain.%/. Differential Gain/Phase Error Drives Ω and Back-Terminated Cable Directly Wide Output Swing: ±V into ±.V into Ω V/µs Slew Rate (V/V gain) ns Channel Switching Time Logic Disable Mode: High-Z Outputs Reduced Power Consumption Outputs May Be Paralleled for Larger Networks pf Input Capacitance (channel on or off) Ordering Information PART TEMP. RANGE PIN-PACKAGE MAXCNG C to + C Narrow Plastic DIP MAXCWG C to + C Wide SO MAXC/D C to + C Dice* MAXG - C to + C Narrow Plastic DIP MAXEWG - C to + C Wide SO Ordering Information continued on last page. * Dice are specified at T A = + C, DC parameters only. Pin Configurations TOP VIEW INA INA MAX MAX A MAX MAX Applications Broadcast-Quality Color-Signal Multiplexing RGB Multiplexing RGB Color Video Overlay Editors RGB Color Video Security Systems INA V- V- INB INB 9 PT SWITCH CS 9 V- OUT OUT RGB Medical Imaging Coaxial-Cable Line Drivers INB OUT Typical Operating Circuit appears at end of data sheet. DIP/SO Pin Configurations continued at end of data sheet. Maxim Integrated Products Call toll free --99- for free samples or literature.
MAX MAX ABSOLUTE MAXIMUM RATINGS Power-Supply Ranges to V-...V Analog Input Voltage...(V- -.V) to ( +.V) Digital Input Voltage...-.V to ( +.V) Output Short-Circuit Duration (to )... Minute Input Current into Any Pin, Power On or Off...±mA Continuous Power Dissipation (T A = + C) -Pin Plastic DIP (derate.mw/ C above + C)...mW -Pin Wide SO (derate.mw/ C above + C)...mW ECTRICAL CHARACTERISTICS ( = V, V- = -V, -V V IN +V, R LOAD =, unless otherwise noted.) -Pin Narrow Plastic DIP (derate.mw/ C above + C)...mW -Pin Wide SO (derate 9.mW/ C above + C)...9mW -Pin Narrow Plastic DIP (derate.mw/ C above + C)...mW -Pin Wide SO (derate.mw/ C above + C)...mW Operating Temperature Ranges MAX C... C to + C MAX E...- C to + C Storage Temperature Range...- C to + C Lead Temperature (soldering, sec)...+ C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. PARAMETER SYMBOL CONDITIONS T A = + C T A = T MIN to T MAX MIN TYP MAX MIN MAX UNITS Operating Supply Voltage V S ±. ± ±. ±. ±. V Input Voltage Range V IN - - V Offset Voltage V OS ± ± ± mv Power-Supply Rejection Ratio PSRR db On Input Bias Current I BIAS ± ± ± µa On Input Resistance R IN kω Input Capacitance C IN Channel off or on pf Voltage-Gain Accuracy MAX/MAX, MAX/MAX (Note )... MAX/, MAX9/MAX, R LOAD = Ω, (Note )... % R LOAD = Ω ±. ±. Output Voltage Swing V OUT R LOAD = ±. ±. Output Impedance Output Resistance, Disabled Mode Output Capacitance, Disabled Mode R OUT Positive Supply Current I+ f IN = MHz f IN = DC MAX/MAX, MAX/MAX MAX/, MAX9/MAX MAX/MAX kω R OUTD MAX/.. kω C OUTD MAX pf MAX/MAX/MAX/MAX9, V IN = V MAX//MAX/MAX, V IN = V MAX/MAX, disabled mode MAX/, disabled mode.. ±. -./+ V Ω ma
ECTRICAL CHARACTERISTICS (continued) ( = V, V- = -V, -V V IN +V, R LOAD =, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS T A = + C MIN TYP MAX T A = T MIN to T MAX MIN MAX UNITS MAX/MAX/MAX/MAX9, V IN = V Negative Supply Current I- MAX//MAX/MAX, V IN = V 9 ma MAX/MAX, disabled mode MAX/, disabled mode Input Noise Density en f IN = khz nv/ H z Slew Rate SR MAX/MAX, MAX/MAX MAX/, MAX9/MAX V/µs -db Bandwidth BW MAX/MAX, MAX/MAX MAX/, MAX9/MAX 9 MHz Differential Gain Error MAX/MAX, MAX/MAX. DG (Note ) MAX/, MAX9/MAX. % Differential Phase Error MAX/MAX, MAX/MAX. DP (Note ) MAX/, MAX9/MAX. deg. Settling Time to.% t S V IN = V-to-V step ns MAX MAX Adjacent Channel Crosstalk (Note ) XTALK f IN = MHz db All-Hostile Crosstalk (Note ) XTALK f IN = MHz db All-Hostile Off Isolation (Note ) ISO f IN = MHz, MAX db Channel Switching Propagation Delay (Note ) t PD MAX ns Channel Switching Time (Note ) t SW MAX ns Switching Transient V INA = V INB = V, MAX mv P-P Amplifier Switching Off-Time (Note 9) Amplifier Switching On-Time (Note ) t OFF MAX ns t ON MAX ns Logic Input High Threshold V IH E N, A, C S, ; MAX V Logic Input Low Threshold V IL E N, A, C S, ; MAX.. V Logic Input Current High I INHI E N, A, C S, ; MAX µa Logic Input Current Low I INLO E N, A, C S, ; MAX µa
MAX MAX ECTRICAL CHARACTERISTICS (continued) ( = V, V- = -V, -V V IN +V, R LOAD =, unless otherwise noted.) T PARAMETER SYMBOL CONDITIONS A = + C T A = T MIN to T MAX UNITS MIN MAX Address Setup Time (Note ) t SU E N, A, C S MIN TYP MAX, ; MAX ns Address Hold Time (Note ) t H E N, A, C S, ; MAX ns C S Pulse Width Low (Note ) t CS E N, A, C S, ; MAX ns Note : Voltage gain accuracy for the unity-gain devices is defined as [(V OUT - V IN) at V IN = V - (V OUT - V IN) at V IN = -V]/. Note : Voltage gain accuracy for the gain-of-two devices is defined as [(V OUT/ - V IN) at V IN = V - (V OUT/ - V IN) at V IN = -V]/. Note : Tested with a.mhz sine wave of amplitude IRE superimposed on a linear ramp (IRE to IRE), R L = Ω to ground. Note : Tested with the selected input connected to ground through a resistor, and a V P-P sine wave at MHz driving adjacent input. Note : Tested in the same manner as described in Note, but with all other inputs driven. Note : Tested with = V, E N =, and all inputs driven with a V P-P, MHz sine wave. Note : Measured from a channel switch command to measurable activity at the output. Note : Measured from where the output begins to move to the point where it is well defined. Note 9: Measured from a disable command to amplifier in a non-driving state. Note : Measured from an enable command to the point where the output reaches 9% current out. Note : Guaranteed by design. Typical Operating Characteristics (T A = + C, unless otherwise noted.) GAIN (db) MAX GAIN AND PHASE RESPONSES PHASE GAIN MAX/ - PHASE (DEGREES) OUTPUT IMPEDANCE ( Ω ). MAX OUTPUT IMPEDANCE vs. FREQUCY MAX/ - PSRR (db) MAX POWER-SUPPLY REJECTION RATIO vs. FREQUCY MAX/ - k k M M FREQUCY (Hz) M. k k M M FREQUCY (Hz) M G k k k M FREQUCY (Hz) M M
Typical Operating Characteristics (continued) (T A = + C, unless otherwise noted.) PERCTAGE (%)...... VOLTAGE GAIN ACCURACY vs. TEMPERATURE MAX MAX TEMPERATURE ( C) MAX/ - OUTPUT RESISTANCE (kω) MAX DISABD OUTPUT RESISTANCE vs. TEMPERATURE TEMPERATURE ( C) MAX/ - OUTPUT RESISTANCE (kω)..... MAX DISABD OUTPUT RESISTANCE vs. TEMPERATURE TEMPERATURE ( C) MAX/ - MAX MAX SUPPLY CURRT PER AMPLIFIER (ma) SUPPLY CURRT PER AMPLIFIER vs. TEMPERATURE I+ I TEMPERATURE ( C) MAX/ -9 SUPPLY CURRT (ma) DISABD SUPPLY CURRT vs. TEMPERATURE I+ I TEMPERATURE ( C) MAX/ - OUTPUT VOLTAGE (V) OUTPUT VOLTAGE SWING vs. LOAD RESISTANCE MAX///:V IN = V MAX//9/:V IN = V LOAD RESISTANCE ( Ω) MAX/ -
MAX MAX Typical Operating Characteristics (continued) (T A = + C, unless otherwise noted.) MAX SMALL-SIGNAL STEP RESPONSE A: V IN, mv/div B: V OUT, mv/div SMALL-SIGNAL STEP RESPONSE A: V IN, mv/div B: V OUT, mv/div ns/div ns/div MAX LARGE-SIGNAL STEP RESPONSE LARGE-SIGNAL STEP RESPONSE A: V IN, V/div B: V OUT, V/div A: V IN, V/div B: V OUT, V/div ns/div ns/div MAX OUTPUT TRANSIT WH SWITCHING BETWE TWO GROUNDED INPUTS MAX RESPONSE TIME A: CS, V/div B: A, V/div C: OUT, mv/div A: CS, V/div B:, V/div C: OUT, V/div ns/div t OFF ton ns/div
Pin Descriptions MAX/MAX,, 9,,,,, 9, PIN MAX/ NAME FUNCTION INA Channel A, Analog Input,,,,, 9 Analog Ground INA Channel A, Analog Input INA Channel A, Analog Input INA Channel A, Analog Input, 9,, V- Negative Power-Supply Input. Connect to -V. Thermal path. INB Channel B, Analog Input INB Channel B, Analog Input INB Channel B, Analog Input INB Channel B, Analog Input OUT Buffered Analog Output OUT Buffered Analog Output, Positive Power-Supply Input. Connect to. OUT Buffered Analog Output OUT Buffered Analog Output A C S E N Chip-Select latch control for the digital inputs. When C S is low, A and E N input registers are transparent. When C S goes high, the A input register latches. If is high, the E N input register also latches when C S goes high (see ). Channel-Select Input. When C S is low, driving A low selects channel A and driving A high selects channel B. Buffer-Enable Input. When C S is low or is low, driving E N low enables all output buffers and driving E N high disables all output buffers. Digital Latch-Enable Input. When is low, the E N register is transparent; when is high, the E N register is transparent only when C S is low. Hardwire to or for best crosstalk performance. MAX MAX PIN MAX/MAX9 MAX/MAX NAME FUNCTION IN Analog Input,,, 9,,, Analog Ground IN Analog Input,,,,,, V- Negative Power-Supply Input. Connect to -V. Thermal path. IN Analog Input IN Analog Input 9 OUT Buffered Analog Output Positive Power-Supply Input. Connect to. OUT Buffered Analog Output OUT Buffered Analog Output OUT Buffered Analog Output
MAX MAX Detailed Description The MAX MAX have a bipolar construction, which results in a typical channel input capacitance of only pf, whether the channel is on or off. This low input capacitance allows the amplifiers to realize full AC performance, even with source impedances as great as Ω. It also minimizes switching transients because the driving source sees the same load whether the channel is on or off. Low input capacitance is critical, because it forms a single-pole RC lowpass filter with the output impedance of the signal source, and this filter can limit the system s signal bandwidth if the RC product becomes too large. The MAX//MAX9/MAX s amplifiers are internally configured for a gain of two, resulting in an overall gain of one at the cable output when driving back-terminated coaxial cable (see the section Driving Coaxial Cable). The MAX/MAX/MAX/MAX are internally configured for unity gain. Power-Supply Bypassing and Board Layout To realize the full AC performance of high-speed amplifiers, pay careful attention to power-supply bypassing and board layout, and use a large, low-impedance ground plane. With multi-layer boards, the ground plane should be located on the layer that is not dedicated to a specific signal trace. To prevent unwanted signal coupling, minimize the trace area at the circuit's critical high-impedance nodes, and surround the analog inputs with an AC ground trace (analog ground, bypassed DC power supply, etc). The analog input pins to the MAX MAX have been separated with AC ground pins (,, V-, or a hard-wired logic input) to minimize parasitic coupling, which can degrade crosstalk and/or stability of the amplifier. Keep signal paths as short as possible to minimize inductance, and ensure that all input channel traces are of equal length to maintain the phase relationship between the R, G, and B signals. Connect the coaxial-cable shield to the ground side of the terminating resistor at the ground plane to further reduce crosstalk (see Figure ). Bypass all power-supply pins directly to the ground plane with.µf ceramic capacitors, placed as close to the supply pins as possible. For high-current loads, it may be necessary to include µf tantalum or aluminum-electrolytic capacitors in parallel with the.µf ceramics. Keep capacitor lead lengths as short as possible to minimize series inductance; surface-mount (chip) capacitors are ideal. COAX COAX RETURN CURRT RETURN CURRT Figure. Low-Crosstalk Layout. Return current from the termination resistor does not flow through the ground plane. Connect all V- pins to a large power plane. The V- pins conduct heat away from the internal die, aiding thermal dissipation. Differential Gain and Phase Errors Differential gain and phase errors are critical specifications for an amplifier/buffer in color video applications, because these errors correspond directly to changes in the color of the displayed picture in composite video systems. The MAX MAX have low differential gain and phase errors, making them ideal in broadcastquality composite color applications, as well as in RGB video systems where these errors are less significant. The MAX MAX differential gain and phase errors are measured with the Tektronix VM Video Measurement Set, with the input test signal provided by the Tektronix 9 Digital Generator as shown in Figure. Measuring the differential gain and phase of the MAX9/MAX (Figure a) is straightforward because the output amplifiers are configured for a gain of two, allowing connection to the VM through a back-terminated coaxial cable. Since the MAX/MAX are unity-gain devices, driving a back-terminated coax would result in a gain of / at the VM. Figure b shows a test method to measure the differential gain and phase for the MAX/MAX. First, measure and store the video signal with the device under test (DUT) removed and replaced with a short circuit, and the Ω load resistor omitted. Then do another measurement with the DUT and load resistor in the circuit, and calculate the differential gain and phase errors by subtracting the results. RT RT GROUND PLANE
(a) (b) CAB SOURCE: TEKTRONIX 9 DIGITAL GERATOR CAB CAB MAX9/MAX DUT MAX/MAX DUT A V = CAB CAB MEASUREMT: TEKTRONIX VM VIDEO MEASUREMT SET MAX MAX Ω Figure. Differential Phase and Gain Error Test Circuits (a) for the MAX9/MAX Gain-of-Two Amplifiers, (b) for the MAX/MAX Unity-Gain Amplifiers Driving Coaxial Cable High-speed performance, excellent output current capability, and an internally fixed gain of two make the MAX//MAX9/MAX ideal for driving Ω or back-terminated coaxial cables. The MAX//MAX9/MAX will drive a Ω load ( back-terminated cable) to ±.V. The Typical Operating Circuit shows the MAX/ driving four back-terminated video cables. The back-termination resistor (at each amplifier output) provides impedance matching at the driven end of the cable to eliminate signal reflections. It forms a voltage divider with the load impedance, which attenuates the signal at the cable output by one-half. The amplifier operates with an internal V/V closed-loop gain to provide unity gain at the cable s output. Driving Capacitive Loads Driving large capacitive loads increases the likelihood of oscillation in most amplifier circuits. This is especially true for circuits with high loop-gains, like voltage followers. The amplifier s output impedance and the capacitive load form an RC filter that adds a pole to the loop response. If the pole frequency is low enough, as when driving a large capacitive load, the circuit phase margin is degraded and oscillation may occur. The MAX MAX phase margin and capacitiveload driving performance are optimized by internal compensation. When driving capacitive loads greater than pf, connect an isolation resistor between the amplifier output and the capacitive load, as shown in Figure. IN_ A V = MAX OUT_ Ω pf Figure a. Using an Isolation Resistor with a Capacitive Load 9
MAX MAX MAX (NO ISOLATION RESISTOR) C µs/div LOAD = pf A: V IN, mv/div B: V OUT, mv/div A B MAX (WITH ISOLATION RESISTOR) µs/div C LOAD = pf, R ISOLATION = Ω A: V IN, mv/div B: V OUT, mv/div A B Figure b. Step Response without an Isolation Resistor Figure c. Step Response with an Isolation Resistor Digital Interface The MAX multiplexer architecture provides an input transistor buffer, ensuring that no input channels are ever connected together. Select a channel by changing A's state (A = for channel A, and A = for channel B) and pulsing C S low (see Tables a, b). Figure shows the logic timing diagram. Output Disable (MAX ) When the enable input (E N ) is driven to a TTL low state, it enables the MAX amplifier outputs. When E N is driven high, it disables the amplifier outputs. The disabled MAX/MAX outputs exhibit a kω typical resistance. Because their internal feedback resistors are required to produce a gain of two, the MAX/ exhibit a kω disabled output resistance. determines whether E N is latched by C S or operates independently. When the latch-enable input () is connected to, C S becomes the latch control for the E N input register. If C S is low, both the E N and A registers are transparent; once C S returns high, both registers are latched. CS t CS t SU t H A t SU t H t OFF t ON OUTPUTS HIGH-Z = t PD t SW Figure. Logic Timing Diagram
Table a. Amplifier and Channel Selection with = C S E N X A X X FUNCTION Enables amplifier outputs. Selects channel A. Enables amplifier outputs. Selects channel B. Disables amplifiers. Outputs high-z. Latches all input registers. Changes nothing. Table b. Amplifier and Channel Selection with = C S E N A X X FUNCTION Enables amplifier outputs. Selects channel A. Enables amplifier outputs. Selects channel B. Disables amplifiers. Outputs high-z. A register = channel A Disables amplifiers. Outputs high-z. A register = channel B Enables amplifier outputs, latches A register, programs outputs to output A or B, according to the setting of A at C S 's last edge. Disables amplifiers. Outputs high-z. MAX MAX When is connected to ground, the E N register is transparent and independent of C S activity. This allows all MAX devices to be simultaneously shut down, regardless of the C S input state. Simply connect to ground and connect all E N inputs together (Figure a). For the MAX and, must be hardwired to either or ground (rather than driving with a gate) to prevent crosstalk from the digital inputs to INA. Another option for output disable is to connect to, parallel the outputs of several MAX-s, and use E N to individually disable all devices but the one in use (Figure b). When the outputs are disabled, the off isolation from the analog inputs to the amplifier outputs is typically db at MHz, all inputs driven with a VP-P sine wave and a Ω load impedance. Figure shows the test circuits used to measure isolation and crosstalk. SHUTDOWN MAX AO CS MAX NOTE: ISOLATION RESISTORS, IF REQUIRED, NOT SHOWN. MAX (a) AO CS MAX (b) Figure. (a) Simultaneous Shutdown of all MAX, (b) Enable ( E N ) Register Latched by C S
MAX MAX V IN = V P-P AT MHz, R S = MAX MAX Ω MAX MAX Ω * * (a) V IN = V P-P AT MHz, R S = (b) MAX MAX Ω Ω Ω Ω * Ω * Ω Ω Ω V IN = V P-P AT MHz, R S = (c) * MAX//MAX/MAX ONLY V IN = V P-P AT MHz, R S = (d) Figure. (a) MAX MAX Adjacent Channel Crosstalk, (b) MAX MAX All-Hostile Crosstalk, (c) MAX All-Hostile Off Isolation, (d) MAX All-Hostile Crosstalk
Figure. Higher-Order RGB + Sync Video Multiplexer MAX MAX Two-Channel, Triple/Quad MAX PT VIDEO SWITCH 9 9 INB INB INB INB INA INA INA CS A INA OUT OUT OUT OUT MAX PT VIDEO SWITCH 9 9 INB INB INB INB INA INA INA CS A INA OUT OUT OUT OUT MAX OUT OUT OUT OUT IN IN IN IN 9 FROM OTHER MAXs
MAX MAX 9 INA INA INA INB INB INB QUAD SPDT VIDEO SWITCH INA A CS OUT OUT OUT 9 Ω Ω Ω A A CS Ω Ω Ω INB OUT Ω Ω 9 INA INA INA INB INB INB QUAD SPDT VIDEO SWITCH INA A CS OUT OUT OUT 9 Ω Ω Ω INB OUT Ω Figure. -of- RGB + Sync Video Multiplexer
Applications Information Higher-Order RGB + Sync Video Multiplexing Higher-order RGB video multiplexers can be realized by paralleling several MAX/MAXs. Connect to and use C S and E N to disable all devices but the one in use. Since the disabled output resistance of the MAX/MAX is kω, several devices may be paralleled to form larger RGB video multiplexer arrays without signal degradation. Connect series resistors at each amplifier's output to isolate the disabled output capacitance of each paralleled device, and use a MAX9 or MAX to drive the output coaxial cables (see Figure ). Paralleling s to Switch -of- RGB + Sync Signal Inputs Figure shows a -of- RGB + sync video mux/amp circuit. The kω disabled output resistance limits the number of paralleled MAX/s to no more than two. The amplifier outputs are connected after a Ω isolation resistor and ahead of a Ω back-termination resistor, which isolates the active amplifier output from the capacitive load (pf typ) presented by the inactive output of the second. Impedance mismatching is minimal, and the signal gain at the cable end is near. This minimizes ringing in the output signals. For multiplexing more than two devices, see the section Higher Order RGB + Sync Video Multiplexing, above. MAX MAX Pin Configurations (continued) TOP VIEW INA IN OUT IN OUT INA MAX IN OUT IN OUT INA A V- V- V- V- CS V- V- V- V- INA V- INB V- INB 9 PT SWITCH V- OUT V- OUT 9 IN DIP/SO OUT 9 IN IN DIP/SO OUT 9 OUT INB INB OUT OUT MAX MAX9 TRIP (RGB) BUFFERS MAX MAX QUAD BUFFERS DIP/SO
MAX MAX Typical Operating Circuit µf.µf INA INB INA INB INA INB INA INB A -V LOGIC A V = A V = A V = A V = µf.µf MAX OUT OUT OUT OUT ONLY _Ordering Information (continued) PART TEMP. RANGE PIN-PACKAGE MAXCNI C to + C Narrow Plastic DIP MAXCWI C to + C Wide SO MAXC/D C to + C Dice* MAXI - C to + C Narrow Plastic DIP MAXEWI - C to + C Wide SO MAXCNG C to + C Narrow Plastic DIP MAXCWG C to + C Wide SO MAXC/D C to + C Dice* MAXG - C to + C Narrow Plastic DIP MAXEWG - C to + C Wide SO CNI C to + C Narrow Plastic DIP CWI C to + C Wide SO C/D C to + C Dice* I - C to + C Narrow Plastic DIP EWI - C to + C Wide SO MAXCPE C to + C Plastic DIP MAXCWE C to + C Wide SO MAXC/D C to + C Dice* MAXEPE - C to + C Plastic DIP MAXEWE - C to + C Wide SO MAXCPE C to + C Plastic DIP MAXCWE C to + C Wide SO MAXC/D C to + C Dice* MAXEPE - C to + C Plastic DIP MAXEWE - C to + C Wide SO MAX9CPE C to + C Plastic DIP MAX9CWE C to + C Wide SO MAX9C/D C to + C Dice* MAX9EPE - C to + C Plastic DIP MAX9EWE - C to + C Wide SO MAXCPE C to + C Plastic DIP MAXCWE C to + C Wide SO MAXC/D C to + C Dice* MAXEPE - C to + C Plastic DIP MAXEWE - C to + C Wide SO * Dice are specified at T A = + C, DC parameters only.