Supertex inc. HV Channel Serial To Parallel Converter With Open Drain Outputs. Features. General Description. Applications.

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Supertex inc. HV5523 32-Channel Serial To Parallel Converter With Open Drain Outputs Features Processed with HVCMOS technology Sink current minimum 00mA Shift register speed 6MHz Polarity and blanking inputs CMOS compatible inputs Applications Inkjet and Electrostatic Print Heads AC-Electroluminescent Displays MEMS Applications General Description The HV5523 is a low-voltage serial to high-voltage parallel converter with open drain outputs. This device has been designed for use as a driver for AC-electroluminescent displays. It can also be used in any application requiring multiple output high voltage current sinking capabilities, such as driving inkjet and electrostatic print heads, plasma panels, and vacuum fluorescent or large matrix LCD displays. This device consists of a 32-bit shift register, 32 latches, and control logic to perform the polarity selection and blanking of the outputs. Data are shifted through the shift register on the high to low transition of the clock. The HV5523 shifts in a counter-clockwise direction when viewed from the top of the package. A data output buffer is provided for cascading devices. This output reflects the current status of the last bit of the shift register. Operation of the shift register is not affected by the LE (latch enable), BL (blanking), or POL (polarity) inputs. Transfer of data from the shift register to the latch occurs when the LE (latch enable) input is high. The data in the latch is stored when LE is low. Block Diagram POL BL LE INPUT CLK 2 32-Bit Shift Register (Outputs 3 to 30 not shown) 3 OUTPUT 32 Supertex inc. 235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com

Ordering Information Device High Voltage Output (max V) 44-Lead QFN 7.00x7.00mm body, 0.80mm height (max), 0.50mm pitch Pin Configuration 44 HV5523 220 HV5523K7-G -G indicates package is RoHS compliant ( Green ) Absolute Maximum Ratings Parameter Value Supply voltage, V DD -0.5V to +7.0V Output voltage, -0.5V to +230V Logic input levels -0.5V to V DD +0.5V Ground current 2.5A Continuous total power dissipation 3 3.4W Operating temperature range -40 C to +85 C Storage temperature range -65 C to +50 C Maximum junction temperature +25 C Thermal resistance (θ ja ) 3 29 O C/W Product Marking HV5523K7 LLLLLLLLL YYWW AAA CCC 44-Lead QFN (K7) (top view) L = Lot Number YY = Year Sealed WW = Week Sealed A = Assembler ID C = Country of Origin = Green Packaging Package may or may not include the following marks: Si or 44-Lead QFN (K7). Voltages are referenced to V SS. 2. Duty cycle is limited by the total power dissipated in the package. 3..0oz 4-layer 3x4 PCB. Operating Supply Voltages and Conditions Sym Parameter Min Typ Max Units Conditions V DD Logic supply voltage 4.5-5.5 V --- High voltage output -0.3 - +220 V --- High-level input voltage 0.8V DD - V DD V --- Low-level input voltage 0-0.2V DD V --- f CLK Clock frequency - - 6 MHz --- T A Operating free-air temperature -40 - +85 C --- Power-up sequence should be the following:. Connect ground. 2. Apply V DD. 3. Set all inputs to a known state. Power-down sequence should be the reverse of the above. Supertex inc. 235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com 2

DC Electrical Characteristics (Over operating supply voltages and temperature, unless otherwise noted) Sym Parameter Min Typ Max Units Conditions I DD V DD supply current - - 25 ma f CLK = 6MHz, f = 8.0MHz I DDQ Quiescent V DD supply current - - 00 µa I O(OFF) Off state output current - - 0 µa I IH High-level logic input current - -.0 µa = V DD I IL Low-level logic input current - - -.0 µa = 0V D IN = 0V, all input logic pins = 0V, all outputs off All outputs high, all switches parallel High level output V DD -.0V - - V ID OUT = -0mA Low level output - - 5 V I = +00mA OUT - -.0 V ID OUT = +0mA V OC clamp voltage - - -.5 V I OL = -00mA AC Electrical Characteristics (V DD = 5.0V, T j = 25 O C) Sym Parameter Min Typ Max Units Conditions f CLK Clock frequency - - 6 MHz --- t W Clock high / low pulse width 3 - - ns --- t SU Data setup time before clock falls 25 - - ns --- t H Data hold time after clock falls 0 - - ns --- t ON Turn on time, from Enable - - 400 ns R L = 2.0kΩ to V PP max t DHL Delay time clock to data high to low - - 35 ns C L = 5pF t DLH Delay time clock to data low to high - - 35 ns C L = 5pF t DLE Delay time clock to LE low to high 20 - - ns --- t WLE Width of LE pulse 20 - - ns --- t SLE LE set-up time before clock falls 20 - - ns --- C IN Digital logic input capacitance - - 5 pf --- Input and Output Equivalent Circuits VDD VDD INPUT OUTPUT VSS VSS VSS Logic Inputs Logic Data Output High Voltage Outputs Supertex inc. 235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com 3

Switching Waveforms INPUT Data Valid t SU t H CLK t WH t WL OUTPUT t DLH t DHL LE t DLE t WLE t SLE w/ S/R HIGH 0% t ON Function Table Inputs Outputs Function Data CLK LE BL POL Shift Reg 2...32 HV Outputs 2...32 Data Out * All ON X X X L L * *...* On On...On * All Off X X X L H * *...* Off Off...Off * Invert mode X X L H L * *...* * *...* * Load S/R H or L L H H H or L *...* * *...* * Load latches Transparent latch mode X H or L H H * *...* * *...* * X H or L H L * *...* * *...* * L H H H L *...* Off *...* * H H H H H *...* On *...* * H = high level, L = low level, X = irrelevant, = high-to-low transition, = low-to-high transition * = dependent on previous stage s state before the last CLK or last LE high. Supertex inc. 235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com 4

Pin Description Pin # Function Description 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 0 20 2 2 22 3 23 4 24 5 25 6 26 7 27 8 28 9 29 20 30 2 3 22 32 High voltage outputs. 23 OUT Data output pin. 24 N/C 25 N/C 26 N/C No internal connection. 27 POL Inverts the polarity of the pins 28 CLK Clock pin, shift registers shifts data on falling edge of input clock. 29 VSS Reference voltage, usually ground. 30 VDD Logic supply voltage. 3 LE enable pin, data is shifted from shift register to latches on logic input high. 32 IN Data input pin. 33 BL Blanking pin sets all HV out pins ON or OFF depending upon state of polarity. See function table. 34 N/C No internal connection. 35 36 2 37 3 38 4 39 5 40 6 4 7 42 8 43 9 44 0 Center Tab High voltage outputs. Connect to VSS Supertex inc. 235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com 5

44-Lead QFN Package Outline (K7) 7.00x7.00mm body, 0.80mm height (max), 0.50mm pitch 44 D D2 44 Note (Index Area D/2 x E/2) Note (Index Area D/2 x E/2) E E2 Top View Bottom View View B Note 3 A. A Pin identifier must be located in the index area indicated. The Pin identifier can be: a molded mark/identifier; an embedded metal marker; or a printed indicator. 2. Depending on the method of manufacturing, a maximum of 0.5mm pullback (L) may be present. 3. The inner tip of the lead may be either rounded or square. Dimension (mm) A Side View Symbol A A A3 b D D2 E E2 e L L θ MIN 0.70 0.00 0.8 6.85* 5.00 6.85* 5.00 0.45 0.00 0 O NOM 0.75 0.02 0.20 0.50 0.25 7.00 5.5 REF 7.00 5.5 BSC 0.55 - - MAX 0.80 0.05 0.30 7.5* 5.25 7.5* 5.25 0.65 0.5 4 O JEDEC Registration MO-220, Variation WKKD-3, Issue K, June 2006 * This dimension is not specified in the JEDEC drawing. This dimension differs from the JEDEC drawing. Drawings not to scale. Supertex Doc. #: DSPD-44QFNK77X7P050, Version A22309. θx4 A3 Seating Plane Note 2 L e View B b L (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate product liability indemnification insurance agreement. Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com) 20 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Doc.# DSFP-HV5523 A045 6 Supertex inc. 235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com