Supertex inc. HV809. Off-Line, High Voltage EL Lamp Driver. Features. General Description. Applications. Block Diagram.
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1 Off-Line, High Voltage EL Lamp Driver Features Processed with HVCMOS technology Input voltage up to 200V DC 400V peak-to-peak output voltage Output load up to 30nF (00in 2 for 3.nF/in 2 lamp) djustable output lamp frequency djustable on/off pulsing frequency pplications Electronic organizers Handheld portable computers Display signs Portable instrumentation equipment General Description The Supertex is an off-line, high voltage, EL lamp driver integrated circuit designed for driving EL lamps of up to 30nF at 400Hz. The input supply voltage can be a rectified nominal 20V C source or any other DC source up to 200V. The will supply the EL lamp with an C square wave with a peak-to-peak voltage of two times the input DC voltage. The has two internal oscillators, a low voltage output linear regulator, and a high voltage output H-bridge. The high voltage output H-bridge frequency is set by an external resistor connected between the and pins. The EL lamp is connected between pins V and. For the in the -pin package, an external RC network can be connected between the oscillator s Osc and pins to pulse the EL lamp on and off. For detailed circuit and application information please refer to pplication Note N-H3. Block Diagram Linear Regulator V Osc Logic and Osc Doc.# DSFP-
2 Ordering Information Part Number Package Option Packing K2-G -Lead TO-220 0/Tube LG-G -Lead SOIC 200/Reel SG-G -Lead SOIC w/ heat slug 200/Reel -G denotes a lead (Pb)-free / RoHS compliant package bsolute Maximum Ratings Parameter Value, High voltage input +20V V DD, Internal supply voltage +V Operating temperature range Storage temperature range Power dissipation: -Lead SOIC -Lead SOIC w/ Heat Slug -Lead TO-220* -2 C to + C - C to +0 C 00mW. Watts Watts bsolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. ll voltages are referenced to device ground. * With external heat sink mounted, refer to pp Note N-H3. Product Marking K2 LLLLLLLLL YYWW YWW LLLL L = Lot Number YY = Year Sealed WW = Week Sealed = Green Packaging Package may or may not include the following marks: Si or -Lead TO-220 Y = Last Digit of Year Sealed WW = Week Sealed L = Lot Number = Green Packaging Pin Configuration Osc Osc 4 Heat Slug Pin : Osc Pin 2: Pin 3: Pin 4: Pin : Pin : V Pin : Tab: -Lead TO-220 (front view) -Lead SOIC (top view) V V -Lead SOIC w/ Heat Slug (top view) (Heat slug is at ground potential) Typical Thermal Resistance Package -Lead TO-220 -Lead SOIC -Lead SOIC w/ heat slug θ ja 29 O C/W 0 O C/W 4 O C/W Package may or may not include the following marks: Si or -Lead SOIC Recommended Operating Conditions Sym Parameter Min Typ Max Units Conditions High voltage input V --- C L nf R EL =.0MΩ, = 0V Load capacitance nf R EL = 390kΩ, = 0V T Operating temperature -2 - O C --- Doc.# DSFP- 2
3 Electrical Characteristics DC Characteristics (Over recommended operating conditions unless otherwise specified - T = 2 C) Sym Parameter Min Typ Max Units Conditions I IN High voltage supply current m m = 0V, R EL =.0MΩ, C L = 30nF = 0V, R EL =.0MΩ, C L = 0nF I IN HV μ IN = 0V, R EL =.0MΩ, Osc =, No Load uiescent supply current HV μ IN = 0V, R EL =.0MΩ, Osc = V DD, No Load I SINK sink current* μ V =.0V I SOURCE source current* μ V = V DD -.0V I Osc Osc logic input leakage current - ±0 - μ V Osc = and V DD V Osc(hyst) Osc hysteresis voltage V --- V -B Min differential output voltage across lamp V = 200V V DD Internal supply voltage V No load on V DD I DD (OUT) Output V DD current m For K2, ΔV DD =.0V * I SINK and I SOURCE are not valid for the TO-220 package. C Characteristics (Over recommended operating conditions unless otherwise specified - T = 2 C) Sym Parameter Min Typ Max Units Conditions f EL R Hz EL =.0MΩ, Osc =, C V -B output drive frequency L = 30nF R khz EL = 390kΩ, Osc =, C L = 0nF t r Output rise time μs C L = 0nF, = 0V t f Output fall time μs C L = 0nF, = 0V Function Table Input Outputs Osc V Enabled Enabled Disabled Disabled Doc.# DSFP- 3
4 Figure. C Off-Line EL Lamp Enable 20VC Disable C IN C DD R EL EL Lamp Figure 2. Pulsing EL Lamp 3.0 to 2VDC DC-DC Converter V BTT 0 to 200VDC C IN CDD R Osc V EL Lamp C R EL Figure 3. Push-Button, Delayed Turn Off 3.0 to 2VDC DC-DC Converter 0 to 200VDC 2 V EL Lamp V BTT C IN R 3 4 Osc C DD Push Button C R EL Doc.# DSFP- 4
5 Typical Waveform on V, V B, and Differential Waveform V - V B ( = 0V, R EL =.0MΩ, and C L = 30nF) V V B V - V B Function Table Pin Name Osc V Description The Output H-bridge can be enabled and disabled by connecting the Osc pin to the and pins. The output can be left enabled by connecting the Osc pin to. The RC network can be connected between the oscillator s Osc and pins to pulse the EL lamp on and off. Internal supply voltage. EL lamp frequency is controlled via an external R EL resistor connected between the and pins of the device. side of the EL lamp driver H-bridge. Connection for one of the EL lamp terminals. V side of the EL lamp driver H-bridge. Connection for one of the EL lamp terminals. High voltage input supply pin. Ground pin. Doc.# DSFP-
6 -Lead TO-220 Package Outline (K2) E ΦP E Thermal Pad H H D Chamfer Optional E L e C b Front View Side View View - Dimension (inches) Symbol 2 b c D E E e H L ΦP MIN NOM REF MX Drawings not to scale. Supertex Doc. #: DSPD-TO220K2, Version NR Doc.# DSFP-
7 -Lead SOIC (Narrow Body) Package Outline (LG) 4.90x3.90mm body,.mm height (max),.2mm pitch D θ Note (Index rea D/2 x E/2) E E L2 Gauge L L Top View 2 e b Side View θ View B View B Note h h View - Note:. This chamfer feature is optional. Pin identifier must be located in the index area indicated. The Pin identifier can be: a molded mark/identifier; an embedded metal marker; or a printed indicator. Dimension (mm) Symbol 2 b D E E e h L L L2 θ θ MIN.3* *.0* 3.0* O O NOM BSC REF BSC MX. 0.2.* 0..00*.20* 4.00* O O JEDEC Registration MS-02, Variation, Issue E, Sept * This dimension is not specified in the JEDEC drawing. Drawings are not to scale. Supertex Doc. #: DSPD-SOLGTG, Version I Doc.# DSFP-
8 -Lead SOIC (Narrow Body w/heat Slug) Package Outline (SG) 4.90x3.90mm body,.0mm height (max),.2mm pitch D D Exposed Thermal Pad Zone Note (Index rea D/2 x E/2) E E E2 Top View Bottom View View B θ h 2 h Note L2 Gauge e b L L θ Side View View - View B Note:. If optional chamfer feature is not present, a Pin identifier must be located in the index area indicated. The Pin identifier can be: a molded mark/ identifier; an embedded metal marker; or a printed indicator. Symbol 2 b D D E E E2 e h L L L2 θ θ.2* * * 3.0* O O MIN Dimension NOM (mm) BSC REF BSC - - MX.0 0..* 0..00* 3..20* 4.00* O O JEDEC Registration MS-02, Variation B, Issue E, Sept * This dimension is not specified in the JEDEC drawing. This dimension differs from the JEDEC drawing. Drawings not to scale. Supertex Doc. #: DSPD-SOSG, Version D (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate product liability indemnification insurance agreement. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the (website: http//) 203 ll rights reserved. Unauthorized use or reproduction is prohibited. Doc.# DSFP- 23 Bordeaux Drive, Sunnyvale, C 9409 Tel:
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