Santa Cruz Institute for Particle Physics Evaluation of the Radiation Tolerance of SiGe Heterojunction Bipolar Transistors Under 24GeV Proton Exposure, D.E. Dorfan, A. A. Grillo, M Rogers, H. F.-W. Sadrozinski, A. Seiden, E. Spencer, M. Wilder, University of California Santa Cruz, 95064, USA A. Sutton,G. Prakash, J.D. Cressler Georgia Tech, Atlanta, GA 30332-0250, USA
Why SiGe? Advantages of SiGe Bipolar Over CMOS for Silicon Strip Detectors A key element in the design of low noise, fast shaping, charge amplifiers is high transconductance in the first stage. With CMOS technologies, this requires relatively larger bias currents than with bipolar technologies. The changes that make SiGe Bipolar technology operate at 100 GHz for the wireless industry coincide with the features that enhance performance in high energy particle physics applications. Small feature size increases radiation tolerance. Extremely small base resistance (of order 10-100 Ω) affords low noise designs at very low bias currents. These design features are important for applications with: Large capacitive loads (e.g. 5-15 pf silicon strip detectors) Fast shaping times (e.g. accelerator experiments with beam crossing times of tens of nanoseconds in order to identify individual beam crossing events) 2
Challenges for ATLAS Upgrade Fluence [10 14 n eq /cm 2 ] 100 10 1 Fluence for 2,500 fb -1 Inner Pixel Mid-Radius Short Strips 0 20 40 60 80 100 Radius [cm] Outer-Radius SCT The LHC upgrade will increase the luminosity by a factor of 10! Fluences in the inner detector will reach as high as 10 16 n eq /cm 2! The challenge is to find front-end electronics resistant to radiation damage that will also reduce power consumption with acceptable noise. Our efforts focus on fluences achieved in the mid to outer radii of silicon strip detectors. 3
Silicon Germanium (SiGe) Heterojunction Bipolar Transistors (HBTs) (First Generation IBM Process) Origin of radiation tolerance: Small active volume of the transistor Thin emitter-base spacer oxide (weakest spot) Irradiation Procedure: Devices were sent to CERN and exposed to a 24GeV proton source with the highest fluence taking 5 days to accumulate. The leads were grounded during irradiation -- > worst case scenario. The transistors were annealed to improve performance. Special thanks to the RD50 collaboration, especially, Michael Moll and Maurice Glaser. Device Sizes: 0.5x1 µm 2 0.5x2.5 µm 2 0.5x10 µm 2 0.5x20 µm 2 4x5 µm 2 4
The Effects of Proton Irradiation Pre-rad ATLAS Upgrade Outer Radius 4.15 x 10 13 1.15 x 10 14 3.50 x 10 14 Mid Radius Inner Radius 1.34 x 10 15 3.58 x 10 15 1.05 x 10 16 5
Radiation Damage Mechanisms Radiation damage increases base current causing the gain of the device to degrade. Gain=I c /I b (collector current/base current) Plot for 0.5 mm x mm: Forward Gummel Plot for 0.5x2.5 µm 2 IC, IB vs. VB pre-rad and after 1*10 15 p/cm 2 + anneal I c,i b vs. V be Pre-rad and After 1x10 15 p/cm 2 & Anneal Steps I c, I b [A] 10-4 10-6 10-8 10-10 10-12 10-14 IC (pre-rad) IB (pre-rad) IC (1e15, anneal) IB (1e15, anneal) 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 V be VB [V] Collector current remains the same Base current increases after irradiation Ionization Damage (in the spacer oxide layers) The charged nature of the particle creates oxide trapped charges and interface states in the emitter-base spacer increasing the base current. Displacement Damage (in the oxide and bulk) The incident mass of the particle knocks out atoms in the lattice structure shortening hole lifetime, which is inversely proportional to the base current. 6
Annealing Effects Before Irradiation After Irradiation & Full Annealing Annealing of 0.5x2.5 µm 2 : Current Gain, β, vs. I c Annealing of 0.5 um x 2.5 um: Current Gain beta vs. Ic Pre-rad pre-rad and after After 1*10 1x10 15 p/cm 15 p/cm 2 and 2 & anneal Anneal steps Steps Current Gain, β 1000 100 10 1 0.1 10-10 10-9 10-8 10-7 10-6 10-5 10-4 10-3 IC [A] I c [A] After Irradiation pre-rad 1e15, no anneal 1e15, 5 days RT 1e15, +6 days RT+1 day 60deg C 1e15, +1 day 100deg C 1e15, +6 days 100deg C We studied the effects of annealing. The performance improves appreciably. In the case above, the gain is now over 50 at 10µA entering into the region where an efficient chip design may be implemented with this technology. The annealing effects are expected to be sensitive to the biasing conditions. We plan to study this in the future. 7
Initial Results: Before Irradiation Lowest Fluence Current Gain Gain, beta vs. β, vs. Ic for I c 0.5 for um 0.5x10 x 10um µm 2 Pre-rad pre-rad and and for All all Fluences including Including full Full annealing Annealing Current Gain, β 1000 100 10 1 Pre-rad 3e13 1e14 3e14 1e15 3e15 1e16 Increasing Fluence Highest Fluence 0.1 10-10 10-9 10-8 10-7 10-6 10-5 10-4 10-3 I IC c [A] After irradiation, the gain decreases as the fluence level increases. Performance is still very good at a fluence level of 1x10 15 p/cm 2. A typical I c for transistor operation might be around 10 µa where a β of around 50 is required for a chip design. At 3x10 15, operation is still acceptable for certain applications. 8
Universality of Results: 1/β(final) - 1/β(initial) Delta(1/beta) post-rad+anneal to pre-rad @ Jc = 10 ua 0.1 0.01 0.001 0.5 um x 1 um 0.5 um x 2.5 um 0.5 um x 10 um 0.5 um x 20 um 4 um x 5um (1/β) Post-rad & Anneal to Pre-rad @ J c =10µA Ratio β(final)/β(initial) Ratio of Current Gain beta post-rad+anneal to pre-rad @ Jc = 10 ua 1 0.8 0.6 0.4 0.2 Ratio of Current Gain, β Post-rad & Anneal to Pre-rad @ J c =10 µa 0.5 um x 1 um 0.5 um x 2.5 um 0.5 um x 10 um 0.5 um x 20 um 4 um x 5um 0.0001 10 13 10 14 10 15 10 16 Proton Fluence F [p/cm 2 ] ] 0 10 13 10 14 10 15 10 16 Proton Fluence F [p/cm 2 ] Proton Fluence [p/cm 2 ] Universal behavior independent of transistor geometry when compared at the same current density J c. For a given current density (1/β) scales linearly with the log of the fluence. This precise relation allows the gain after irradiation to be predicted for other SiGe HBTs. Note there is little dependence on the initial gain value. 9
Feasibility for ATLAS Inner Detector Upgrade Qualifications for a good transistor: A gain of 50 is a good figure of merit for a transistor to use in a front-end circuit design. Low currents translate into increased power savings. Fluence: 3.50E14 p/cm 2 (2.17x10 14 n eq /cm 2 ) β=50 Transistor Size µm 2 Ι c irrad I c anneal 0.5x1 2.E-06 0.5x2.5 4.E-06 5.E-08 0.5x10 3.E-05 8.E-07 0.5x20 5.E-05 2.E-06 4x5 9.E-06 5.E-07 At 3.5x10 14 in the outer region (60 cm), where long (10 cm) silicon strip detectors with capacitances around 15pF will be used, the collector current I c is low enough for substantial power savings over CMOS! Fluence: 1.34E15 p/cm 2 (8.32x10 14 n eq /cm 2 ) β=50 Transistor Size µm 2 Ι c irrad I c anneal 0.5x1 3.E-05 1.E-07 0.5x2.5 7.E-05 4.E-06 0.5x10 4.E-04 9.E-06 0.5x20 6.E-05 4x5 1.E-04 1.E-05 At 1.34x10 15 closer to the mid radius (20 cm), where short (3 cm) silicon strip detectors with capacitance around 5pF will be used, the collector current I c is still good for a front transistor, which requires a larger current while minimizing noise. We expect better results from 3rd generation IBM SiGe HBTs. 10
Conclusions We extended the radiation testing of SiGe Bipolar transistors by a factor 100 in fluence thanks to the RD50 radiation program. The 5HP technology we examined is far superior to that used for the current ATLAS silicon strip detectors. The 5HP demonstrates utility--power savings and low noise--for the entire analog front-end in the outer region and for the front transistor in the mid radius of ATLAS Upgrade. Future generations (smaller sizes) of SiGe HBTs show huge potential for power savings with low noise at extreme radiation levels. Investigation is currently under way to determine the benefits of the next generations of SiGe HBTs in future collider experiments (i.e. slhc). 11