MUN526DW, NSBC43TDXV6 Dual NPN Bias Resistor Transistors R = 4.7 k, R2 = k NPN Transistors with Monolithic Bias Resistor Network This series of digital transistors is designed to replace a single device and its external resistor bias network. The Bias Resistor Transistor (BRT) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base emitter resistor. The BRT eliminates these individual components by integrating them into a single device. The use of a BRT can reduce both system cost and board space. Features S and NSV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC-Q Qualified and PPAP Capable Simplifies Circuit Design Reduces Board Space Reduces Component Count These Devices are Pb Free, Halogen Free/BFR Free and are RoHS Compliant MAXIMUM RATINGS (T A =, common for Q and Q2, unless otherwise noted) Rating Symbol Max Unit Collector Base Voltage V CBO 5 Collector Emitter Voltage V CEO 5 Collector Current Continuous I C madc Input Forward Voltage V IN(fwd) 3 Input Reverse Voltage V IN(rev) 6 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. PIN CONNECTIONS (3) (2) () Q R 2 R R R2 MARKING DIAGRAMS Q 2 (4) (5) (6) 6 7F M 7F M SOT 363 CASE 49B SOT 563 CASE 463A 7F = Specific Device Code M = Date Code* = Pb Free Package (Note: Microdot may be in either location) *Date Code orientation may vary depending upon manufacturing location. ORDERING INFORMATION Device Package Shipping MUN526DWTG, SMUN526DWTG SOT 363 3, / Tape & Reel NSBC43TDXV6TG SOT 563 4, / Tape & Reel NSBC43TDXV6T5G SOT 563 8, / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8/D. Semiconductor Components Industries, LLC, 22 September, 22 Rev. Publication Order Number: DTC43TD/D
MUN526DW, NSBC43TDXV6 THERMAL CHARACTERISTICS Characteristic Symbol Max Unit MUN526DW (SOT 363) One Junction Heated T A = (Note ) Derate above (Note ) Thermal Resistance, (Note ) Junction to Ambient 87 256.5 2. R JA 67 49 MUN526DW (SOT 363) Both Junction Heated (Note 3) T A = (Note ) Derate above (Note ) Thermal Resistance, (Note ) Junction to Ambient Thermal Resistance, (Note ) Junction to Lead 25 385 2. 3. R JA 493 325 R JL 88 28 Junction and Storage Temperature Range T J, T stg 55 to +5 C NSBC43TDXV6 (SOT 563) One Junction Heated T A = (Note ) Derate above (Note ) Thermal Resistance, Junction to Ambient (Note ) NSBC43TDXV6 (SOT 563) Both Junction Heated (Note 3) T A = (Note ) Derate above (Note ) Thermal Resistance, Junction to Ambient (Note ) 357 2.9 R JA 35 5 4. R JA 25 Junction and Storage Temperature Range T J, T stg 55 to +5 C. FR 4 @ Minimum Pad. 2. FR 4 @. x. Inch Pad. 3. Both junction heated values assume total power is sum of two equally powered channels. 2
MUN526DW, NSBC43TDXV6 ELECTRICAL CHARACTERISTICS (T A =, common for Q and Q 2, unless otherwise noted) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS Collector Base Cutoff Current (V CB = 5 V, I E = ) I CBO nadc Collector Emitter Cutoff Current (V CE = 5 V, I B = ) Emitter Base Cutoff Current (V EB = 6. V, I C = ) Collector Base Breakdown Voltage (I C = A, I E = ) Collector Emitter Breakdown Voltage (Note 4) (I C = 2. ma, I B = ) ON CHARACTERISTICS DC Current Gain (Note 4) (I C = 5. ma, V CE = V) Collector Emitter Saturation Voltage (Note 4) (I C = ma, I B =. ma) Input Voltage (off) (V CE = 5. V, I C = A) Input Voltage (on) (V CE =.2 V, I C = ma) Output Voltage (on) (V CC = 5. V, V B = 2.5 V, R L =. k ) Output Voltage (off) (V CC = 5. V, V B =.25 V, R L =. k ) CEO 5 I EBO.9 V (BR)CBO 5 V (BR)CEO 5 h FE 6 35 V CE(sat).25 V i(off).6 V i(on).9 V OL.2 V OH 4.9 nadc madc Input Resistor R 3.3 4.7 6. k Resistor Ratio R /R 2 4. Pulsed Condition: Pulse Width = 3 msec, Duty Cycle 2%. 4, POWER DISSIPATION () 35 3 25 2 5 5 () (2) () SOT 363;. x. inch Pad (2) SOT 563; Minimum Pad 5 25 25 5 75 25 5 AMBIENT TEMPERATURE ( C) Figure. Derating Curve 3
MUN526DW, NSBC43TDXV6 TYPICAL CHARACTERISTICS MUN526DW, NSBC43TDXV6 V CE(sat), COLLECTOR EMITTER VOLTAGE (V). I C /I B = 5 C h FE, DC CURRENT GAIN 5 C V CE = V. 2 3 4 5 Figure 2. V CE(sat) vs. I C Figure 3. DC Current Gain C ob, OUTPUT CAPACITANCE (pf) 3.2 2.8 2.4 2..6.2.8.4 f = khz I E = A T A =. 5 C V O = 5 V 2 3 4 5. 2 3 4 V R, REVERSE VOLTAGE (V) V in, INPUT VOLTAGE (V) Figure 4. Output Capacitance Figure 5. Output Current vs. Input Voltage V in, INPUT VOLTAGE (V). 5 C 2 V O =.2 V 3 4 5 Figure 6. Input Voltage vs. Output Current 4
MUN526DW, NSBC43TDXV6 PACKAGE DIMENSIONS SC 88/SC7 6/SOT 363 CASE 49B 2 ISSUE W H E D e 6 5 4 2 3 E b 6 PL.2 (.8) M E M NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, 982. 2. CONTROLLING DIMENSION: INCH. 3. 49B OBSOLETE, NEW STANDARD 49B 2. MILLIMETERS DIM MIN NOM MAX A.8.95. A..5. A3 b..2.3 C..4.25 D.8 2. 2.2 E.5.25.35 e.65 BSC L..2.3 H E 2. 2. 2.2 INCHES MIN NOM MAX.3.37.43..2.4.2 REF.8 REF.4.8.2.4.5..7.78.86.45.49.53.26 BSC.4.8.2.78.82.86 A3 A C A L SOLDERING FOOTPRINT*.5.97.65.25.4.57.65.25.9.748 SCALE 2: SC 88/SC7 6/SOT 363 mm inches *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 5
MUN526DW, NSBC43TDXV6 PACKAGE DIMENSIONS SOT 563, 6 LEAD CASE 463A ISSUE F D X A L NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, 982. 2. CONTROLLING DIMENSION: MILLIMETERS 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 6 5 4 2 3 e E Y b 65 PL.8 (.3) M X Y H E C MILLIMETERS INCHES DIM MIN NOM MAX MIN NOM MAX A.5.55.6.2.2.23 b.7.22.27.7.9. C D.8.5.2.6.8.7.3.59.5.62.7.66 E..2.3.43.47.5 e.5 BSC.2 BSC L..2.3.4.8.2 H E.5.6.7.59.62.66 SOLDERING FOOTPRINT*.3.8.45.77.35.53..394.5.5.97.97 SCALE 2: mm inches *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 563, Denver, Colorado 827 USA Phone: 33 675 275 or 8 344 386 Toll Free USA/Canada Fax: 33 675 276 or 8 344 3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 8 282 9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 42 33 79 29 Japan Customer Focus Center Phone: 8 3 587 5 6 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative DTC43TD/D