HCPL-,, HCNW, HCNW9, N9, N, Low Input Current, High Gain Optocouplers Data Sheet Lead (Pb) Free RoHS fully compliant RoHS fully compliant options available; -xxxe denotes a lead-free product Description These high gain series couplers use a Light Emitting Diode and an integrated high gain photodetec tor to provide extremely high current transfer ratio between input and output. Separate pins for the photodiode and output stage result in TTL compatible saturation voltages and high speed operation. Where desired the V CC and terminals may be tied together to achieve conven tional photodarlington operation. A base access terminal allows a gain bandwidth adjustment to be made. The N9,, and HCNW9 are for use in CMOS, LSTTL or other low power appli ca tions. A % minimum current transfer ratio is guaranteed over to C operating range for only.5 ma of LED current. The N, HCPL-, and HCNW are designed for use mainly in TTL applications. Current Transfer Ratio (CTR) is % minimum over to C for an LED current of. ma ( TTL Unit load ). A % minimum CTR enables operation with TTL Load using a. kω pull-up resistor. Functional Diagram NC ANODE CATHODE NC 5 V CC V B GND TRUTH TABLE LED ON OFF LOW HIGH Features High current transfer ratio % typical (5 % typical for HCNW9/) Low input current requirements.5 ma TTL compatible output. V L typical Performance guaranteed over temperature C to C Base access allows gain bandwidth adjustment High output current ma Safetyapproval - UL recognized 5 V rms for minute and 5 V rms* for minute per UL 5 - CSA approved - IEC/EN/DIN EN -5-5 approved with V IORM = V peak for HCNW9 and HCNW Available in -Pin DIP or SOIC- footprint or widebody package MIL-PRF-5 hermetic version available (HCPL-5/) Applications Ground isolate most logic families TTL/TTL, CMOS/ TTL, CMOS/CMOS, LSTTL/TTL, CMOS/LSTTL Low input current line receiver High voltage insulation (HCNW9/) EIA RS-C line receiver Telephone ring detector V ac line voltage status indicator low input power dissipation Low power systems ground isolation * 5 V rms/ minute rating is for HCNW9/ and Option (N9/) products only. A. µf bypass capacitor connected between pins and 5 is recommended. CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD. The components featured in this datasheet are not to be used in military or aerospace applications or environments.
Selection for lower input current down to 5 µa is available upon request. The and HCPL- are surface mount devices packaged in an industry standard SOIC- footprint. The SOIC- does not require through holes in a PCB. This package occupies approximately one-third the footprint area of the standard dual-in-line package. The lead profile is designed to be compatible with standard surface mount processes. The HCNW9 and HCNW are packaged in a widebody encapsulation that provides creep age and clearance dimensions suitable for safety approval by regulatory agencies worldwide. Selection Guide Single Channel Package -Pin DIP ( Mil) Small Outline SO- Widebody ( mil) V CC Hermetic Dual Single Dual Package Minimum Single and Dual Channel Channel Channel Single Input ON Absolute Channel Package Package Package Channel Current Minimum Maximum Packages HCPL- HCPL- HCPL- Package (I F ) CTR HCPL- N9 [] HCNW9.5 ma % V N [] HCNW. ma % V HCPL- [] [] A [] A [] µa % V Note:. Technical data are on separate Avago publications..5 ma % V 5 [] 5 [] 5 [] 5 [] Schematic V CC I CC ANODE + V F I F CATHODE I O 5 GND SHIELD I B V B
Ordering Information N, N9, HCPL- and are UL Recognized with 5 Vrms for minute per UL5 and are approved under CSA Component Acceptance Notice #5, File CA. Part Number N N9 HCPL- HCNW HCNW9 RoHS Compliant Option non RoHS Compliant -E no option Package Surface Mount Gull Wing Tape & Reel UL 5 Vrms/ Minute rating IEC/EN/DIN EN -5-5 Quantity 5 per tube -E # X X 5 per tube -5E #5 X X X per reel -E # X 5 per tube -E # mil DIP- X X X 5 per tube -5E #5 X X X X per reel -E # X 5 per tube -E # X X X 5 per tube -5E #5 X X X X per reel -E no option X per tube -5E #5 X X 5 per reel SO- -E # X X per tube -5E #5 X X X 5 per reel -E no option mil per tube -E # Widebody X X per tube -5E #5 DIP- X X X 5 per reel To order, choose a part number from the part number column and combine with the desired option from the option column to form an order entry. Example : N-5E to order product of mil DIP Gull Wing Surface Mount package in Tape and Reel packaging with IEC/EN/DIN EN -5-5 Safety Approval and RoHS compliant. Example : HCPL- to order product of mil DIP package in Tube packaging and non RoHS compliant. Option datasheets are available. Contact your Avago sales representative or authorized distributor for information. Remarks: The notation #XXX is used for existing products, while (new) products launched since July 5, and RoHS compliant will use XXXE.
Package Outline Drawings -Pin DIP Package (N9/N)** 9.5 ±.5 (. ±.) DEVICE PART NUMBER. ±.5 (. ±.) AVAGO LEAD FREE PIN DOT A NNNN YYWW EEE 5 Z P TEST RATING CODE UL LOGO SPECIAL PROGRAM CODE.5 ±.5 (.5 ±.).9 (.) MAX..5 ±. (. ±.5) DATE CODE LOT ID. (.) MAX.. (.5) MAX. 5 TYP..5 +. -.5 (. +.) -.).5 (.) MIN..9 (.5) MIN. DIMENSIONS IN MILLIMETERS AND (INCHES). * MARKING CODE LETTER FOR OPTION NUMBERS "L" = OPTION OPTION NUMBERS AND 5 NOT MARKED.. ±. (. ±.).5 (.5) MAX..5 ±.5 (. ±.) NOTE: FLOATING LEAD PROTRUSION IS.5 mm ( mils) MAX. **JEDEC Registered Data. -Pin DIP Package with Gull Wing Surface Mount Option (N9/N) 5 LAND PATTERN RECOMMENDATION. (.).5 ±.5 (.5 ±.).9 (.).9 (.) MAX. 9.5 ±.5 (. ±.). (.) MAX..5 ±. (. ±.5). (.5) 9.5 ±.5 (. ±.). ±.5 (. ±.). (.).5 +. -.5 (. +.) -.). ±. (. ±.).5 (.) BSC.5 ±. (.5 ±.5).5 ±.5 (.5 ±.) NOM. DIMENSIONS IN MILLIMETERS (INCHES). LEAD COPLANARITY =. mm (. INCHES). NOTE: FLOATING LEAD PROTRUSION IS.5 mm ( mils) MAX.
Small Outline SO- Package (/HCPL-) LAND PATTERN RECOMMENDATION.9 ±. (.55 ±.5) DEVICE PART NUMBER LEAD FREE PIN DOT 5 NNNN Z YYWW EEE. ±. (. ±.). (.5) BSC TEST RATING CODE 5.99 ±. (. ±.) DATE CODE LOT ID. (.5).9 (.5).9 (.95) * 5. ±. (. ±.5) 5 X. (.).5 ±. (.5 ±.5).5 (.) ~. ±.5 (.9 ±.) * TOTAL PACKAGE LENGTH (INCLUSIVE OF MOLD FLASH) 5. ±.5 (.5 ±.) DIMENSIONS IN MILLIMETERS (INCHES). LEAD COPLANARITY =. mm (. INCHES) MAX. NOTE: FLOATING LEAD PROTRUSION IS.5 mm ( mils) MAX. -Pin Widebody DIP Package (HCNW9/HCNW).5 (.) MIN.. ±. (. ±.) DEVICE PART NUMBER LEAD FREE. ±.5 (. ±.) A NNNNNNNN YYWW EEE 5 Z AVAGO TEST RATING CODE DATE CODE LOT ID. MAX. (.) 9. ±.5 (.5 ±.) PIN DOT. (.) TYP..55 (.) MAX. 5. (.) MAX. TYP. +..5 -.5 (. +.) -.). (.).9 (.5).5 (.) MIN..5 (.) TYP.. ±.5 (. ±.) 5. (.).5 (.) DIMENSIONS IN MILLIMETERS (INCHES). NOTE: FLOATING LEAD PROTRUSION IS.5 mm ( mils) MAX.
-Pin Widebody DIP Package with Gull Wing Surface Mount Option (HCNW9/HCNW) LAND PATTERN RECOMMENDATION 5 9. ±.5 (.5 ±.).5 (.5). ±.5 (. ±.). (.5).9 (.9).55 (.) MAX.. ±. (. ±.). MAX. (.). (.5) MAX.. ±.5 (. ±.).5 (.) BSC DIMENSIONS IN MILLIMETERS (INCHES)..5 ±.5 (. ±.). ±.5 (.9 ±.) NOM..5 +. -.5 (. +.) -.) LEAD COPLANARITY =. mm (. INCHES). NOTE: FLOATING LEAD PROTRUSION IS.5 mm ( mils) MAX.
Solder Reflow Profile Recommended reflow condition as per JEDEC Standard, J-STD- (latest revision). Non-Halide Flux should be used. Regulatory Information The N9/, HCNW9/, and / have been approved by the following organizations: UL Recognized under UL 5, Component Recognition Program, File E55. CSA Approved under CSA Component Acceptance Notice #5, File CA. IEC/EN/DIN EN -5-5 HCNW9/ and Option //5 only Insulation and Safety Related Specifications Parameter Symbol -Pin DIP ( Mil) Value Minimum External Air Gap (External Clearance) Minimum External Tracking (External Creepage) Minimum Internal Plastic Gap (Internal Clearance) Minimum Internal Tracking (Internal Creepage) Tracking Resistance (Comparative Tracking Index) SO- Value Widebody ( Mil) Value Units Conditions L()..9 9. mm Measured from input terminals to output terminals, shortest distance through air. L()... mm Measured from input terminals to output terminals, shortest distance path along body.... mm Through insulation distance, conductor to conductor, usually the direct distance between the photoemitter and photodetector inside the optocoupler cavity. NA NA. mm Measured from input terminals to output terminals, along internal cavity. CTI Volts DIN IEC /VDE Part Isolation Group IIIa IIIa IIIa Material Group (DIN VDE, /9, Table ) Option - surface mount classification is Class A in accordance with CECC.
IEC/EN/DIN EN -5-5 Insulation Characteristics (HCNW9 and HCNW) Description Symbol Characteristic Unit Installation classification per DIN VDE, Table for rated mains voltage 5 Vrms for rated mains voltage Vrms for rated mains voltage Vrms for rated mains voltage Vrms I IV I IV I IV I III Climatic Classification // Pollution Degree (DIN VDE /9) Maximum Working Insulation Voltage V IORM V peak Input to Output Test Voltage, Method b* V IORM x.5 = V PR, % Production Test with t m = sec, Partial discharge < 5 pc Input to Output Test Voltage, Method a* V IORM x. = V PR, Type and Sample Test, t m = sec, Partial discharge < 5 pc V PR 5 V peak V PR V peak Highest Allowable Overvoltage (Transient Overvoltage t ini = sec) V IOTM V peak Safety-limiting values maximum values allowed in the event of a failure. Case Temperature Input Current Output Power T S I S, INPUT P S, OUTPUT 5 Insulation Resistance at T S, V IO = 5 V R S > 9 Ω *Refer to the front of the optocoupler section of the current catalog, under Product Safety Regulations section, IEC/EN/DIN EN -5-5, for a detailed description. Note: Isolation characteristics are guaranteed only within the safety maximum ratings which must be ensured by protective circuits in application. C ma mw
Absolute Maximum Ratings* (No Derating Required up to 5 C) Parameter Symbol Min. Max. Units Storage Temperature T S -55 5 C Operating Temperature** T A - 5 C Average Forward Input Current I F(AVG) ma Peak Forward Input Current (5% Duty Cycle, ms Pulse Width) Peak Transient Input Current (< µs Pulse Width, pps) I FPK ma I F(TRAN). A Reverse Input Voltage V R 5 V HCNW9/ V Input Power Dissipation P I 5 mw Output Current (Pin ) I O ma Emitter Base Reverse Voltage (Pin 5-) V EB.5 V Supply Voltage and Output Voltage (N9,, HCNW9) Supply Voltage and Output Voltage (N, HCPL-, HCNW) V CC -.5 V V CC -.5 V Output Power Dissipation P O mw Total Power Dissipation P T 5 mw Lead Solder Temperature (for Through Hole Devices) Reflow Temperature Profile (for SOIC- and Option #) HCNW9/ C for sec.,. mm below seating plane C for sec., up to seating plane See Package Outline Drawings section *JEDEC Registered Data for N9 and N. ** C to C on JEDEC Registration. Recommended Operating Conditions Parameter Symbol Min. Max. Units Power Supply Voltage V CC.5 V Forward Input Current (ON) I F(ON).5. ma Forward Input Voltage (OFF) V F(OFF). V Operating Temperature T A C 9
Electrical Specifications C T A C,.5 V V CC V,.5 ma I F(ON) ma, V V F(OFF). V, unless otherwise specified. All Typicals at T A = 5 C. See Note. Parameter Sym. Device Min. Typ.** Max. Units Test Conditions Fig. Note Current CTR N9 * 5 % I F =.5 ma V =.5 CC,,, Transfer Ratio HCNW9 5 =. V N9 5* I F =. ma HCNW9 5 I F = 5. ma 5 I F = ma N * I F =. ma HCPL- HCNW 5 Logic Low Output Voltage Logic High Output Current Logic Low Supply Current Logic High Supply Current Input Forward Voltage Input Reverse Breakdown Voltage Temperature Coefficient of Forward Voltage Input Capacitance L N9 HCNW9 N HCPL- HCNW I OH N9 HCNW9 N HCPL- HCNW I CCL N/9 /.. V I F =.5 ma, I O = ma I F =. ma, I O = ma I F = 5. ma, I O = 5 ma. I F = ma, I O = ma. I F =. ma, I O =. ma V CC =.5.5 µa = V CC = V IF = ma. 5 = V CC = V..5 ma I F =. ma, = Open, V CC = V HCNW9.5 HCNW I CCH N/9. µa I F = ma, = Open, / V = V CC HCNW9 HCNW V F N N9 HCPL- HCNW9 HCNW.5..* V T A = 5 C, I F =. ma,.5 -. mv/ C..5.5 T A = 5 C.95.95 BVR 5.* V I R = µa, T A = 5 C HCNW9. I R = µa, T A = 5 C HCNW V F I F =. ma T A C IN pf f = MHz, V F = V HCNW9 9 HCNW * JEDEC Registered Data for N9 and N. **All typical values at T A = 5 C and V CC = 5 V, unless otherwise noted.
Switching Specifications (AC) Over recommended operating conditions (T A = to C), V CC = 5 V, unless otherwise specified. Parameter Sym. Device Min. Typ.** Max. Units Test Conditions Fig. Note Propagation Delay Time to Logic Low at Output Propagation Delay Time to Logic High at Output Common Mode Transient Immunity at Logic High Output Common Mode Transient Immunity at Logic Low Output t PHL t PLH N9 HCNW9 N9 HCNW9 N HCPL- HCNW N9 HCNW9 5 N9 HCNW9 N HCPL- HCNW T A =5 C 5 5* µs I F =.5 ma, Rl =. kω. * µs I F = ma, Rl = Ω. * 5 µs I F =. ma, Rl =. kω * 9 µs I F =.5 ma, Rl =. kω * µs I F = ma, Rl = Ω 5* 5 µs I F =. ma,\ Rl =. kω CM H V/µs I F = ma, T A = 5 C Rl =. kω V CM = Vp-p CM L V/µs I F =. ma, T A = 5 C Rl =. kω V CM = Vp-p * JEDEC Registered Data for N9 and N. **All typical values at T A = 5 C and V CC = 5 V, unless otherwise noted. 5,,, 9, 5,,, 9,,, 5, 5,
Package Characteristics Parameter Sym. Min. Typ.** Max. Units Test Conditions Fig. Note Input-Output Momentary Withstand Voltage Option HCNW9 HCNW V ISO 5 V rms RH < 5%, t = min., T A = 5 C 5, 9 Resistance (Input-Output) R I-O Ω V I-O = 5 Vdc RH < 5% Capacitance (Input-Output) C I-O. pf f = MHz **All typicals at T A = 5 C, unless otherwise noted. The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage rating. For the continuous voltage rating refer to the IEC/EN/DIN EN -5-5 Insulation Characteristics Table (if applicable), your equipment level safety specification or Avago Application Note entitled Optocoupler Input-Output Endurance Voltage., Notes:. DC CURRENT TRANSFER RATIO (CTR) is defined as the ratio of output collector current, I O, to the forward LED input current, I F, times %.. Pin Open.. Device considered a two-terminal device. Pins,,, and shorted together and Pins 5,,, and shorted together.. Use of a resistor between pin 5 and will decrease gain and delay time. Significant reduction in overall gain can occur when using resistor values below kω. For more information, please contact your local Avago Components representative. 5. Common mode transient immunity in a Logic High level is the maximum toler able (positive) dv CM/dt of the common mode pulse, V CM, to assure that the output will remain in a Logic High state (i.e., >. V). Common mode transient immunity in a Logic Low level is the maximum tolerable (negative) dv CM/dt of the common mode pulse, V CM, to assure that the output will remain in a Logic Low state (i.e., <. V).. In applications where dv/dt may exceed 5, V/µs (such as static discharge) a series resistor, R CC, should be included to protect the detector IC from destructively high surge currents. The recommended value is R CC = Ω.. Use of a. µf bypass capacitor connected between pins and 5 adjacent to the device is recommended.. In accordance with UL 5, each optocoupler is proof tested by applying an insulation test voltage 5 V rms for second (leakage detection current limit, I I-O < 5 µa). This test is per formed before the % production test shown in the IEC/EN/DIN EN -5-5 Insulation Related Characteristics Table, if applicable. 9. In accordance with UL 5, each optocoupler is proof tested by applying an insulation test voltage > V rms for second (leakage detection current limit, I I-O < 5 µa). This test is per formed before the % production test for partial discharge (method b) shown in the IEC/EN/DIN EN -5-5 Insulation Related Characteristics Table, if applicable.
I O OUTPUT CURRENT ma 5 5 5. ma.5 ma. ma.5 ma. ma.5 ma. ma.5 ma. ma.5 ma V CC = 5 V T A = 5 C.. OUTPUT VOLTAGE V CTR CURRENT TRANSFER RATIO % 5 C V CC = 5 V =. V.. C 5 C C - C I F FORWARD CURRENT ma I O OUTPUT CURRENT ma T A = 5 C. T A = C T. A = 5 C T A = C T A = - C... I F INPUT DIODE FORWARD CURRENT ma Figure. N/N9 DC transfer characteristics Figure. Current transfer ratio vs. forward current N/N9 Figure. N/N9 output current vs. input diode forward current I F FORWARD CURRENT ma I F + V F T A = 5 C. T A = C....... T A = 5 C T A = C T A = - C.5. t P PROPAGATION DELAY µs 5 5 5 5 I F =.5 ma R L =. kω /f = 5 µs t PLH t PHL - - - t P PROPAGATION DELAY µs 5 9 I F =. ma R L =. kω /f = 5 µs t PLH t PHL - - - V F FORWARD VOLTAGE V Figure. Input diode forward current vs. forward voltage T A TEMPERATURE C Figure 5. Propagation delay vs. temperature T A TEMPERATURE C Figure. Propagation delay vs. temperature t P PROPAGATION DELAY µs I F = ma R L = kω /f = 5 µs t PLH t PHL V F FORWARD VOLTAGE V..5.. I F =. ma TIME µs T A = 5 C t f t r I F ADJUSTED FOR L = V - - -. - - -.. T A TEMPERATURE C T A TEMPERATURE C R L LOAD RESISTANCE kω Figure. Propagation delay vs. temperature Figure. Forward voltage vs. temperature Figure 9. Nonsaturated rise and fall times vs. load resistance
I CCL LOGIC LOW SUPPLY CURRENT ma....5 V CC = V. V CC = 5 V... I F FORWARD CURRENT OUTPUT POWER P S, INPUT CURRENT I S 9 5 WIDEBODY P S (mw) I S (ma) 5 5 5 5 5 T S CASE TEMPERATURE C 5 Figure. Logic low supply current vs. forward current Figure. Thermal derating curve, dependence of safety limiting value with case temperature per IEC/EN/DIN EN -5-5 I F 5 V PULSE GEN. Z O = 5 Ω t r = 5 ns I F R L +5 V (SATURATED RESPONSE) t PHL.5 V.5 V L t PLH % DUTY CYCLE I/f < µs I MONITOR F 5. µf C L = 5 pf* R M (NON-SATURATED RESPONSE) 9% % % 9% 5 V * INCLUDES PROBE AND FIXTURE CAPACITANCE t f tr Figure. Switching test circuit V CM V 9% 9% V % t r % t r, t f = ns tf I F A B R CC (SEE NOTE ) +5 V R L SWITCH AT A: I F= ma 5 V V FF 5 SWITCH AT B: I F=. ma L V CM + PULSE GEN. Figure. Test circuit for transient immunity and typical waveforms For product information and a complete list of distributors, please go to our website: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright 5-5 Avago Technologies. All rights reserved. Obsoletes AV-5EN AV-59EN - March, 5