V DRM = 1800 V I (AV)M = 730 A I (RMS) = 1150 A I SM = 9 10 3 A V 0 = 0.8 V r = 0.54 mw Phase Control hyristor 5SP 07D1800 Doc. No. 5SYA1027-06 May 07 Patented free-floating silicon technology Low on-state and switching losses Designed for traction, energy and industrial applications Optimum power handling capability Blocking Parameter Symbol Conditions 5SP 07D1800 Unit Max repetitive peak forward and reverse blocking voltage V DRM, V RRM f = 50 Hz, t p = 10 ms, vj = 5 125 C, Note 1 V AK V DRM, V RRM 1800 V Critical rate of rise of commutating voltage t p t dv/dt crit Exp. to 1210 V, vj = 125 C 1000 V/µs Forward leakage I DRM V DRM, vj = 125 C 100 ma Reverse leakage I RRM V RRM, vj = 125 C 100 ma Note 1: Voltage de-rating factor of 0.11% per C is applicable for vj below +5 C Mechanical data Mounting force F M 8 10 12 kn Acceleration a Device unclamped 50 m/s 2 Acceleration a Device clamped 100 m/s 2 Weight m 0.3 kg Housing thickness H F M = 10 kn, a = 25 C 25.6 26.2 mm Surface creepage distance D S 25 mm Air strike distance D a 14 mm 1) Maximum rated values indicate limits beyond which damage to the device may occur
5SP 07D1800 On-state Average on-state I (AV)M Half sine wave, c = 70 C 730 A RMS on-state I (RMS) 1150 A Peak non-repetitive surge Limiting load integral Peak non-repetitive surge I SM t p = 10 ms, vj = 125 C, sine wave 9 10 3 A after surge: V D = V R = 0 V I 2 t 405 10 3 A 2 s I SM t p = 8.3 ms, vj = 125 C, sine wave 9.5 10 3 A after surge: V D = V R = 0 V Limiting load integral I 2 t 374 10 3 A 2 s On-state voltage V I = 1500 A, vj = 125 C 1.6 V hreshold voltage V (0) I = 500 A - 1500 A, vj = 125 C 0.8 V Slope resistance r 0.54 mω Holding I H vj = 25 C 70 ma vj = 125 C 50 ma Latching I L vj = 25 C 500 ma vj = 125 C 200 ma Switching Critical rate of rise of onstate Critical rate of rise of onstate Circuit-commutated turn-off time di/dt crit di/dt crit vj = 125 C, I RM = 1500 A, V D 1210 V, I FG = 2 A, t r = 0.5 µs Cont. f = 50 Hz Cont. f = 1Hz t q vj = 125 C, I RM = 2000 A, V R = 200 V, di /dt = -1.5 A/µs, V D 0.67 V DRM, dv D /dt = 20 V/µs 150 A/µs 1000 A/µs 400 µs Reverse recovery charge Q rr vj = 125 C, I RM = 2000 A, 250 600 µas Reverse recovery I RM V R = 200 V, di /dt = -1.5 A/µs 17 35 A Gate turn-on delay time t gd vj = 25 C, V D = 0.4 V RM, I FG = 2 A, t r = 0.5 µs 3 µs Doc. No. 5SYA1027-06 May 07 page 2 of 7
5SP 07D1800 riggering Peak forward gate voltage V FGM 12 V Peak forward gate I FGM 10 A Peak reverse gate voltage V RGM 10 V Average gate power loss P G(AV) see Fig. 9 W Gate-trigger voltage V G vj = 25 C 2.6 V Gate-trigger I G vj = 25 C 400 ma Gate non-trigger voltage V GD V D = 0.4 x V DRM, vjmax = 125 C 0.3 V Gate non-trigger I GD V D = 0.4 x V DRM, vjmax = 125 C 10 ma hermal Operating junction temperature range vj 125 C Storage temperature range stg -40 140 C hermal resistance junction to case hermal resistance case to heatsink R th(j-c) R th(j-c)a R th(j-c)c R th(c-h) R th(c-h) Double-side cooled Anode-side cooled Cathode-side cooled Double-side cooled Single-side cooled 36 K/kW 70 K/kW 74 K/kW 7.5 K/kW 15 K/kW Analytical function for transient thermal impedance: Z th(j-c) (t) = n i= 1 R (1- e i 1 2 3 4 R i (K/kW) 19.180 9.820 5.450 1.440 τ i (s) 0.3862 0.0561 0.0058 0.0024 i -t/ τ i ) Fig. 1 ransient thermal impedance (junction-tocase) vs. time Doc. No. 5SYA1027-06 May 07 page 3 of 7
5SP 07D1800 Fig. 2 On-state voltage characteristics Fig. 3 On-state characteristics, j = 125 C, 10ms half sine Fig. 4 On-state power dissipation vs. mean on-state, turn-on losses excluded Fig. 5 Max. permissible case temperature vs. mean on-state, switching losses ignored Doc. No. 5SYA1027-06 May 07 page 4 of 7
5SP 07D1800 Fig. 6 Surge on-state vs. pulse length, half-sine wave Fig. 7 Surge on-state vs. number of pulses, half-sine wave, 10 ms, 50Hz I G (t) 100 % 90 % I GM I GM 2..5 A I Gon 1.5 I G di G /dt 2 A/µs t r 1 µs t p (I GM ) 5...20 µs di G /dt I Gon 10 % t r tp (IGM ) t p (I Gon ) t Fig. 8 Recommended gate waveform Fig. 9 Max. peak gate power loss Fig. 10 Reverse recovery charge vs. decay rate of on-state Fig. 11 Peak reverse recovery vs. decay rate of on-state Doc. No. 5SYA1027-06 May 07 page 5 of 7
urn-on and urn-off losses 5SP 07D1800 Fig. 12 urn-on energy, half sinusoidal waves Fig. 13 urn-on energy, rectangular waves Fig. 14 urn-off energy, half sinusoidal waves Fig. 15 urn-off energy, rectangular waves -di /dt I (t) I (t), V(t) otal power loss for repetitive waveforms: P O where = P + W on f + W off f Q rr -I RRM V(t) t -V 0 P = 1 I V 0 ( I ) dt -dv/dt com -V RRM Fig. 16 Current and voltage waveforms at turn-off Fig. 17 Relationships for power loss Doc. No. 5SYA1027-06 May 07 page 6 of 7
5SP 07D1800 H ł ł Fig. 18 Device Outline Drawing Related documents: 5SYA 2020 Design of RC-Snubber for Phase Control Applications 5SYA 2049 Voltage definitions for phase control thyristors and diodes 5SYA 2051 Voltage ratings of high power semiconductors 5SYA 2034 Gate-Drive Recommendations for PC's 5SYA 2036 Recommendations regarding mechanical clamping of Press Pack High Power Semiconductors 5SZK 9104 5SZK 9105 Specification of environmental class for pressure contact diodes, PCs and GO, SORAGE available on request, please contact factory Specification of environmental class for pressure contact diodes, PCs and GO, RANSPORAION available on request, please contact factory Please refer to http://www.abb.com/semiconductors for version of documents. ABB Switzerland Ltd Doc. No. 5SYA1027-06 May 07 Semiconductors Fabrikstrasse 3 CH-5600 Lenzburg, Switzerland elephone +41 (0)58 586 1419 Fax +41 (0)58 586 1306 Email abbsem@ch.abb.com Internet www.abb.com/semiconductors