FSA321 USB2.0 Hi-Speed (480Mbps) and Audio Switches with Negative Signal Capability and Built-in Termination on Unselected Audio Paths

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March 2013 FSA321 USB2.0 Hi-Speed (480Mbps) and Audio Switches with Negative Signal Capability and Built-in Termination on Unselected Audio Paths Features Audio: 1.8 Typical On Resistance HS-USB: 8 Typical On Resistance HS-USB: 5pF Typical On Capacitance USB Path -3db Bandwidth: > 720MHz Negative Swing Capable Audio Channel Power-off Protection on Common D+/R, D-/L Ports Automatic USB Detection (Configurable) OVT on all I/O Ports Flow-Through Pin Out Eliminates PCB Vias Built-In Termination on Unselected Audio Paths to Inhibit Audio Pop Applications MP3, Cell Phone, PDA, Digital Camera, and Notebook LCD Monitor, TV, and Set-Top Box Description The FSA321 is a Double-Pole, Double Throw (DPDT) multiplexer that combines a low-distortion audio and a USB2.0 High-Speed (HS) switch path. This configuration enables audio and USB data to share a common connector port. The architecture is designed to allow audio signals to swing below ground. This means a common USB and headphone jack can be used for personal media players and portable peripheral devices. Since USB2.0 is an industry standard for shared datapath in portable devices, FSA321 can be configured for automatic V BUS detection. The FSA321 includes a power-off feature as well as over-voltage tolerance to minimize current consumption when V SW exceeds V CC. Typical applications involve switching in portables and consumer applications, such as cell phones, digital cameras, and notebooks with hubs or controllers.. Ordering Information Part Number Package Number Top Mark Package Description FSA321UMX MLP010A GL 10-Lead Quad, Ultrathin Molded Leadless Package (MLP), 1.4 x 1.8mm Figure 1. Analog Symbol FSA321 Rev 1.0.6

Pin Configuration R D- L 3 2 1 10 D+ 4 9 V CC A/LP Sel 5 6 7 8 USB Sel D-/L D+/R Figure 2. UMLP Pin Definitions Pin # Name Description 9 V CC Power supply 5 A/LP Sel Audio Select Override and Power-Save Mode. This pin can be used to override USB Sel for applications where analog audio is transmitted on the USB D+, D- lines. This same select pin is used to put the FSA321 in low-power mode when USB Sel is LOW, not transmitting audio signals or USB data. The FSA321 has a weak internal pull-down, setting its default state to LOW and allowing this pin to float when not in use. 8 USB Sel USB Path select pin. Can be connected to USB connector V BUS pin for automatic USB detection. 10, 1 D+, D- USB data bus input sources 2, 3 R, L Audio right and left input sources 7, 6 D+/R, D-/L USB and audio common connector ports Truth Table V CC USB Sel (1) A/LP Sel Audio Mode USB Mode Remarks LOW OFF OFF Disabled Inputs High-Z HIGH (2) HIGH (2) LOW OFF ON USB Communication HIGH (2) HIGH (2) HIGH (2) ON OFF Audio Override on USB HIGH (2) LOW HIGH (2) OFF OFF Low Power Mode HIGH (2) LOW LOW ON OFF Audio Out Notes: 1. Forcing USB Sel HIGH when V BUS is present allows for automatic USB detection. 2. HIGH is the threshold as defined to meet USB2.0 V CC requirements and audio supply threshold in a system (see DC Tables). FSA321 Rev.1.0.6 2

Functional Description The FSA321 is a combined USB and audio switch that enables sharing the D+/D- lines of a USB connector with stereo audio CODEC outputs. The USB Sel pin has an internal pull-down resistor that results in a default audiomode configuration. The switch can be configured for auto USB detection by connecting the V BUS pin to the USB Sel pin. The audio switch path also handles negative signals, eliminating the need for large coupling capacitors and greatly reducing the potential for audio pop. Termination resistors on the audio R and L ports are enabled when the switch is in USB mode, this also helps reduce audio pop when enabling the audio path. The FSA321 allows for an audio override state by forcing A/LP Sel high when USB Sel is high. This is useful for USB car kit applications or if the device is in a cradle charger when Send/End is pressed. Application Diagram V CC 0.1µF USB 2.0 Hi-Speed Controller Audio CODEC D+ D- R L FSA321 USB Sel D+/R D-/L Shared USB and Audio Connector Figure 3. Typical Application Diagram FSA321 Rev.1.0.6 3

Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. Max. Unit V CC Supply Voltage -0.5 4.6 V USB Sel USB Select Control Signal -0.5 6.0 V A/LP Sel Power Save Mode Control Signal -0.5 6.0 V V SW Switch I/O Voltage (3) USB Path Active -1.0 4.6 Audio Path Active V CC -4.6V 4.6 DC Switch I/O Voltage (3) USB Path Active Audio Path Active -0.50 5.25 I IK Input Clamp Diode Current -50 ma I SW I SWPEAK Switch I/O Current (Continuous) Peak Switch Current (Pulsed at 1ms Duration, < Duty Cycle) USB 50 ma Audio 100 ma USB 100 ma Audio 250 ma T STG Storage Temperature Range -65 +150 C T J Maximum Junction Temperature +150 C T L Lead Temperature (Soldering, 10 seconds) +260 C ESD Human Body Model, JEDEC: JESD22-A114 I/O to 11 All Other Pins 8 VCC to 12 Charged Discharge Model, JEDEC: JESD22-C101 2 IEC61000-4-2 System USB Connection Pins (D+/R, D-/L, V BUS ) Air Gap 15 Contact 8 Note: 3. The input and output negative ratings may be exceeded if the input and output diode current ratings are observed. V kv Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol Parameter Min. Max. Units V CC Supply Voltage 1.8 4.3 V USB Sel USB Select Control Signal 0 5.5 V A/LP Sel Power-Save Mode Control Signal 0 5.5 V V SW Switch I/O Voltage USB Path Active 0 4.3 V Audio Path Active V CC -4.3V 4.3 V T A Operating Temperature -40 +85 ºC JA Thermal Resistance (Free Air) UMLP 284 ºC/W FSA321 Rev.1.0.6 4

DC Electrical Characteristics All typical values are at 25ºC unless otherwise specified. Symbol Parameter V CC (V) Conditions Common Pins T A = - 40 to +85 C Min. Typ. (6) Max. V IK Clamp Diode Voltage 1.8 to 4.3 I IK = -18mA -1.2 V IH V IL I IN Control Input Voltage HIGH Control Input Voltage LOW USB Sel and A/LP Sel Input Current I OFF Power Off Leakage Current 0 R PD R T USB Switch Path A/LP Sel and USB Sel Internal Pull-Down Resistors Audio Path Termination Resistors 1.8 to 2.7 1.0 2.7 to 4.3 1.2 1.8 to 2.7 0.3 2.7 to 4.3 0.5 1.8 to 4.3 V IN = 0V -1 1 V IN = 5.5V -1 10 D+/R, D-/L Common Ports, V SW = 0V to 5.5V, All other Pins = 0V Unit V µa 25 µa 1.8 to 4.3 3 M 1.8 to 4.3 200 USB Analog Signal Range 1.8 to 4.3 0 4.3 V R ONUSB HS Switch On Resistance (4) 1.8 to 4.3 V D+/D - = 0V, 0.4V, I ON = 8mA 8 11 Ω R ONUSB HS Delta R ON (5,6) Audio Switch Path Audio Analog Signal Range 1.8 to 4.3 R ONAudio Audio Switch On Resistance 2.7 R ONAudio Audio Delta R ON (5) 1.8 to 4.3 V D+/D- = 0V, I ON = 8mA 0.4 Ω V L/R = -1.0V, 0V, 1.0V I ON = 60mA V CC - 4.3V V CC V 1.8 2.7 Ω 2.7 to 4.3 V L/R = 0.7V I ON = 60mA 0.4 Ω R FLAT(Audio) Audio R ON Flatness (7) 2.7 to 4.3 I ON = 60mA 0.8 1.5 Ω Total Switch Current Consumption I CC USB Active Mode Supply Current 1.8 to 4.3 A/LP Sel = LOW, USB Sel= HIGH, I OUT = 0 I CC_LPM I CCT USB Low Power Mode or Audio Mode Quiescent Supply Current Increase in I CC current per control voltage and V CC LOW POWER Mode A/LP Sel HIGH Increase in I CC current per control voltage and V CC ACTIVE Mode A/LP Sel LOW 1.8 to 4.3 4.3 A/LP Sel = HIGH, V CC = 1.8-4.3V 0.5 0.8 ma 10 15 µa V USB Sel = 2.6V 10 15 V USB Sel = 1.8V 15 20 V USB Sel = 2.6V 0.6 0.9 V USB Sel = 1.8V 0.65 1.00 Notes: 4. On resistance is determined by the voltage drop between the A and B pins at the indicated current through the switch. 5. R ON = R ON max R ON min measured at identical V CC, temperature, and voltage. Worst-case signal path, audio or USB channel, is characterized. 6. Guaranteed by characterization, not production tested. 7. Flatness is defined as the difference between the maximum and minimum values of on resistance over the specified range of conditions. µa ma FSA321 Rev.1.0.6 5

AC Electrical Characteristics All typical value are for V CC = 3.3V at 25ºC unless otherwise specified. Symbol Parameter V CC (V) Conditions t PDUSB USB Switch Propagation Delay (8) 3.3 Xtalk A O IRR Non-Adjacent Channel Crosstalk (Audio Mode) Non-Adjacent Channel Crosstalk (USB Mode) 3.3 3.3 Off Isolation (Audio Mode) 3.3 Off Isolation (USB Mode) 3.3 BW -3db Bandwidth (USB Mode) 3.3 THD Total Harmonic Distortion (Audio Mode) 3.3 SNignal-to-Noise Ratio (Audio Mode) 3.3 Note: 8. Guaranteed by characterization, not production tested. R L = 50Ω, C L = 0pF Figure 9 f = 20kHz, R T = 32Ω, C L = 0pF, Figure 17 f = 240MHz, R T = 20Ω, C L = 0pF Figure 17 f = 20kHz, R T = 32Ω, C L = 0pF f = 240MHz, R T = 20Ω, C L = 0pF R T = 50Ω, C L = 0pF, Signal 0dBm, Figure 15 f = 20Hz to 20kHz, R L = 32Ω, V IN = 2V PP Figure 14 T A = - 40 to +85 C Min. Typ. (8) Max. Unit 0.25 ns -110 db -45 db -85 db -40 db 720 MHz 0.11 % f = 20Hz to 20kHz R L = 32Ω, V IN = 2V PP -90 db FSA321 Rev.1.0.6 6

USB High-Speed-Related AC Electrical Characteristics Symbol Parameter V CC (V) Conditions t SK(o) t SK(P) t J Channel-to-Channel Skew (9) (USB Mode) Skew of Opposite Transitions of the Same Output (9) (USB Mode) Total Jitter (9) (USB Mode) Note: 9. Guaranteed by characterization, not production tested. 3.3 3.3 3.3 t R = t F = 750ps (10-90%) at 240MHz C L = 0pF, R L = 50Ω Figure 11 t R = t F = 750ps (10-90%) at 240MHz C L = 0pF, R L = 50Ω Figure 10 R L = 50Ω, C L = 50pF, t R = t F = 500ps (10-90%) at 480Mbps (PRBS = 2 15 1) T A = - 40 C to +85 C Unit Min. Typ. Max. 35 ps 35 ps 130 ps Capacitance Symbol Parameter V CC (V) Conditions T A = - 40 C to +85 C Min. Typ. Max. C IN Control Pin Input Capacitance 1.8 to 4.3 V Bias = 0.2V 2.0 pf C ON(D+/R, D-/L) D+/R, D-/L On Capacitance (USB Mode) 1.8 to 4.3 1.8 to 5.5 V Bias = 0.2V, f = 240MHz, Figure 13 V Bias = 0.2V, f = 1MHz, Figure 13 Unit 5.4 pf 6.0 pf C OFF(D+, D-) USB Path Off Capacitance 1.8 to 4.3 f = 1MHz, Figure 12 1.6 pf C OFF(R/L) Audio Path Off Capacitance 1.8 to 4.3 f = 1MHz, Figure 12 3.5 pf FSA321 Rev.1.0.6 7

Test Diagrams Dnor R/L V SW R ON = V ON / I ON V ON D+/R or D -/L V = fn ( V ) CNTRL CC I ON V SW I (OFF) A D+, D- or R/L V CNTRL = fn ( V CC ) D+/R or D- /L Figure 4. On Resistance Figure 5. Off Leakage D+, D- or R,L D+, D - or R/L V CNTRL = fn (V CC ) I A(ON) A D+/R or D-/L V sw V OUT CL R L V CNTRL = fn (V CC ) D+/R or D-/L V sw R L,, and C L, are functions of the application environment (see tables for specific values). C L includes test fixture and stray capacitance. Figure 6. On Leakage Figure 7. AC Test Circuit Load t RISE = 1µs t FALL = 1µs t RISE = 750ps t FALL = 750ps V bus Input -V CNTRL 90% V th(max) V th(min) V OH Output -V OUT 90% 90% V OL t ON t OFF 0.4V 90% 90% Input V D+/D-- 50% 50% V OH Output- V OUT 50% 50% V OL t plh t phl V CNTRL = fn (V CC ) V th =V busth or V audioth Figure 8. Turn-On / Turn-Off Waveforms (USB/Audio) Figure 9. USB Switch Propagation Delay Waveforms FSA321 Rev.1.0.6 8

V OL t plh2 t phl2 Test Diagrams (Continued) t RISE = 750ps t FALL = 750ps t RISE = 750ps 0.4V 90% 90% Input V D+/D - 50% 50% t FALL = 750ps 0.4V Input V D+/D- VOH Output1 - V OUT 90% 90% 50% 50% 50% 50% V OH V OL t plh1 t phl1 Output- V OUT 50% 50% V OL t plh t phl V OH t sk(o) Output2 V OUT 50% 50% - Figure 10. Pulse Skew: t SK(P) = t PHL t PLH Figure 11. Output Skew: t SK(O) = t PLH1 t PLH2 or t PHL1 t PHL2 Dn or R/L or D+/R or D- /L Capacitance Meter f = 1MHz Dn or R/L or D+/ R or D-/L V CNTRL = fn (V CC ) Capacitance Meter Dn or R/L or D+/R or D -/L f = 240MHz Dn or R/L or D+/ R or D-/L V CNTRL = fn (V CC ) Figure 12. Channel Off Capacitance Figure 13. Channel On Capacitance Audio Analyzer V IN V S V CNTRL V CNTROL = fn (V CC ) R T V OUT and R T are functions of the application environment (see tables for specific values). Figure 14. Total Harmonic Distortion FSA321 Rev.1.0.6 9

Test Diagrams (Continued) Network Analyzer R S V IN V S V CNTRL V = fn (V CC ) CNTRL R T V OUT and R T are functions of the application environment (see tables for specific values). Figure 15. USB Bandwidth Network Analyzer R T V IN V S V CNTRL V CNTRL = fn ( V CC ) V OUT R T and R T are functions of the application environment (see tables for specific values). Figure 16. Channel Off Isolation Off Isolation = 20 Log (V OUT / V IN ) NC Network Analyzer V IN V S V CNTRL R T V CNTRL = fn (V CC ) and R T are functions of the application environment (see tables for specific values R T V OUT CROSSTALK = 20 Log (V OUT / V IN ) Figure 17. Non-Adjacent Channel-to-Channel Crosstalk FSA321 Rev.1.0.6 10

Physical Dimensions 2X 0.15 C 1.40 A B 1.70 (9X) 0.663 0.563 PIN#1 IDENT 0.10 C TOP VIEW 0.55 MAX. 0.152 1.80 0.15 C 2X 0.40 (10X)0.225 1 RECOMMENDED LAND PATTERN 2.10 0.08 C 0.05 DETAIL A PIN#1 IDENT SEATING PLANE SIDE VIEW 0.35 0.45 (9X) 3 1 10 BOTTOM VIEW 0.55 0.45 0.10 6 C 0.40 0.15 0.25 (10X) 0.10 C A B 0.05 C 0.55 0.40 (10X) 0.225 1.45 9X 0.45 1.85 OPTIONAL MINIMIAL TOE LAND PATTERN NOTES: A. PACKAGE DOES NOT FULLY CONFORM TO JEDEC STANDARD. B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. D. LAND PATTERN RECOMMENDATION IS BASED ON FSC DESIGN ONLY. E. DRAWING FILENAME: MKT-UMLP10Arev3. 0.10 DETAIL A SCALE : 2X 0.10 LEAD OPTION 1 SCALE : 2X PACKAGE EDGE LEAD OPTION 2 SCALE : 2X Figure 18. 10-Lead, Quad Ultrathin Molded Leadless Package (UMLP) Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. FSA321 Rev.1.0.6 11

FSA321 Rev.1.0.6 12