N-channel 1050 V, 6 Ω typ., 1.5 A MDmesh K5 Power MOSFETs in DPAK, TO-220 and IPAK packages. Features STU2N105K5. Description.

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Transcription:

STD2N105K5, STP2N105K5, STU2N105K5 N-channel 1050 V, 6 Ω typ., 1.5 A MDmesh K5 Power MOSFETs in DPAK, TO-220 and IPAK packages Datasheet - production data TAB Features DPAK 1 3 Order codes V DS R DS(on) max I D P TOT STD2N105K5 TAB STP2N105K5 STU2N105K5 1050 V 8 Ω 1.5 A 60 W TO-220 1 2 3 TAB Figure 1. Internal schematic diagram IPAK 3 2 1 Industry s lowest R DS(on) x area Industry s best figure of merit (FoM) Ultra low gate charge 100% avalanche tested Zener-protected Applications Switching applications Description These very high voltage N-channel Power MOSFETs are designed using MDmesh K5 technology based on an innovative proprietary vertical structure. The result is a dramatic reduction in on-resistance and ultra-low gate charge for applications requiring superior power density and high efficiency. AM01476v1 Table 1. Device summary Order codes Marking Package Packaging STD2N105K5 DPAK Tape and reel STP2N105K5 STU2N105K5 2N105K5 TO-220 IPAK Tube November 2014 DocID026321 Rev 3 1/21 This is information on a product in full production. www.st.com

Contents STD2N105K5, STP2N105K5, STU2N105K5 Contents 1 Electrical ratings............................................ 3 2 Electrical characteristics..................................... 4 2.1 Electrical characteristics (curves)................................ 6 3 Test circuits.............................................. 9 4 Package mechanical data.................................... 10 4.1 DPAK, STD2N105K5.........................................11 4.2 TO-220, STP2N105K5....................................... 14 4.3 IPAK, STU2N105K5......................................... 16 5 Packaging mechanical data.................................. 18 6 Revision history........................................... 20 2/21 DocID026321 Rev 3

STD2N105K5, STP2N105K5, STU2N105K5 Electrical ratings 1 Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit V GS Gate- source voltage ±30 V I D Drain current (continuous) at T C = 25 C 1.5 A I D Drain current (continuous) at T C = 100 C 0.95 A I (1) DM Drain current (pulsed) 6 A P TOT Total dissipation at T C = 25 C 60 W I AR Max current during repetitive or single pulse avalanche 0.5 A E AS Single pulse avalanche energy (starting T J = 25 C, I D =0.5 A, V DD = 50 V) 90 mj dv/dt (2) Peak diode recovery voltage slope 4.5 V/ns dv/dt (3) MOSFET dv/dt ruggedness 50 V/ns T j T stg Operating junction temperature Storage temperature 1. Pulse width limited by safe operating area. 2. I SD 1.5 A, di/dt 100 A/µs, V DS(peak) V (BR)DSS. 3. V DS 840 V -55 to 150 C Table 3. Thermal data Symbol Parameter Value Unit R thj-case Thermal resistance junction-case max 2.08 C/W R thj-amb Thermal resistance junction-ambient max 62.50 C/W DocID026321 Rev 3 3/21 21

Electrical characteristics STD2N105K5, STP2N105K5, STU2N105K5 2 Electrical characteristics (Tcase =25 C unless otherwise specified) Table 4. On /off states Symbol Parameter Test conditions Min. Typ. Max. Unit V (BR)DSS I DSS Drain-source breakdown voltage Zero gate voltage, drain current (V GS = 0) I D = 1 ma, V GS = 0 1050 V V DS = 1050 V 1 µa V DS = 1050 V, T C =125 C 50 µa I GSS Gate-body leakage current V GS = ± 20 V; V DS =0 ±10 µa V GS(th) Gate threshold voltage V DS = V GS, I D = 100 µa 3 4 5 V R DS(on) Static drain-source onresistance V GS = 10 V, I D = 0.75 A 6 8 Ω Table 5. Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit C iss Input capacitance - 115 - pf C oss Output capacitance V DS =100 V, f=1 MHz, V GS =0-15 - pf C rss Reverse transfer capacitance - 0.5 - pf C o(tr) (1) Equivalent capacitance time related V GS = 0, V DS = 0 to 840 V - 17 - pf (2) Equivalent capacitance C o(er) - 6 - pf energy related R G Intrinsic gate resistance f = 1 MHz open drain - 20 - Ω Q g Total gate charge V DD = 840 V, I D = 1.5 A - 10 - nc Q gs Gate-source charge V GS =10 V - 1.5 - nc Q gd Gate-drain charge (see Figure 18) - 8 - nc 1. Time related is defined as a constant equivalent capacitance giving the same charging time as C oss when V DS increases from 0 to 80% V DSS 2. energy related is defined as a constant equivalent capacitance giving the same stored energy as C oss when V DS increases from 0 to 80% V DSS 4/21 DocID026321 Rev 3

STD2N105K5, STP2N105K5, STU2N105K5 Electrical characteristics Table 6. Switching times Symbol Parameter Test conditions Min. Typ. Max Unit t d(on) Turn-on delay time - 14.5 - ns V DD = 525 V, I D = 0.75 A, t r Rise time - 8.5 - ns R G = 4.7 Ω, V GS = 10 V t d(off) Turn-off-delay time (see Figure 17) - 35 - ns t f Fall time - 38.5 - ns Table 7. Source drain diode Symbol Parameter Test conditions Min. Typ. Max Unit I SD Source-drain current - 1.5 A I (1) SDM Source-drain current (pulsed) - 6 A (2) V SD Forward on voltage I SD = 1.5 A, V GS = 0-1.5 V t rr Reverse recovery time I SD = 1.5 A, di/dt = 100 A/µs - 326 ns Q rr Reverse recovery charge V DD = 60 V - 1.19 µc I RRM Reverse recovery current (see Figure 19) - 7.3 A t rr Reverse recovery time I SD = 1.5 A, di/dt = 100 A/µs - 525 ns Q rr Reverse recovery charge V DD = 60 V T J = 150 C - 1.83 µc I RRM Reverse recovery current (see Figure 19) - 7 A 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5% Table 8. Gate-source Zener diode Symbol Parameter Test conditions Min Typ. Max. Unit V (BR)GSO Gate-source breakdown voltage I GS = ± 1mA, I D =0 30 - - V The built-in back-to-back Zener diodes have specifically been designed to enhance the device's ESD capability. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device's integrity. These integrated Zener diodes thus avoid the usage of external components. DocID026321 Rev 3 5/21 21

Electrical characteristics STD2N105K5, STP2N105K5, STU2N105K5 2.1 Electrical characteristics (curves) Figure 2. Safe operating area for DPAK and IPAK Figure 3. Thermal impedance for DPAK and IPAK ID (A) GIPG210320141029SA 1 Operation in this area is Limited by max RDS(on) 100µs 1ms 0.1 10ms Tj=150 C Tc=25 C Single pulse 0.01 0.1 1 10 100 1000 VDS(V) Figure 4. Safe operating area for TO-220 Figure 5. Thermal impedance for TO-220 ID (A) GIPG210320141032SA Operation in this area is Limited by max RDS(on) 1 100µs 1ms 0.1 10ms Tj=150 C Tc=25 C Single pulse 0.01 0.1 1 10 100 VDS(V) Figure 6. Output characteristics Figure 7. Transfer characteristics ID (A) VGS= 10,11V GIPG210320141045SA ID (A) VDS= 20V GIPG210320141056SA 2.5 9V 2.5 2.0 8V 2 1.5 1.5 1.0 7V 1 0.5 6V 0.0 0 2 4 6 8 10 12 14 16 VDS(V) 0.5 0 5 6 7 8 9 10 VGS(V) 6/21 DocID026321 Rev 3

STD2N105K5, STP2N105K5, STU2N105K5 Electrical characteristics Figure 8. Gate charge vs gate-source voltage Figure 9. Static drain-source on-resistance VGS (V) 12 10 8 VDS VDD = 840 V ID = 1.5 A GIPG210320141105SA VDS (V) 800 700 600 500 RDS(on) (Ω) 9 8 VGS= 10V GIPG210320141116SA 6 4 2 400 300 200 100 7 6 0 0 0 2 4 6 8 10 Qg(nC) Figure 10. Capacitance variations 5 0 1 2 ID(A) Figure 11. Output capacitance stored energy C (pf) GIPG210320141129SA E (µj) GIPG210320141201SA 1000 100 2 10 1 0.1 0.1 1 10 100 VDS(V) Figure 12. Normalized gate threshold voltage vs temperature 0 0 200 400 600 800 VDS(V) Figure 13. Normalized on-resistance vs temperature VGS(th) (norm) 1.2 1 ID = 100 μa GIPG210320141203SA RDS(on) (norm) 2.5 2 ID= 0.75A VGS= 10V GIPG210320141419SA 0.8 1.5 1 0.6 0.5 0.4-100 -50 0 50 100 150 Tj( C) 0-100 -50 0 50 100 150 Tj( C) DocID026321 Rev 3 7/21 21

Electrical characteristics STD2N105K5, STP2N105K5, STU2N105K5 Figure 14. Source-drain diode forward characteristics Figure 15. Normalized V (BR)DSS vs temperature VSD (V) GIPG210320141436SA V(BR)DSS (norm) GIPG210320141421SA 1 0.9 0.8 Tj= 25 C Tj= -50 C 1.15 1.1 1.05 1 ID= 1mA 0.7 Tj= 150 C 0.95 0.6 0.9 0.5 0 0.2 0.4 0.6 0.8 1 1.2 ISD(A) 0.85-100 -50 0 50 100 150 Tj( C) Figure 16.Maximum avalanche energy vs starting T J 8/21 DocID026321 Rev 3

STD2N105K5, STP2N105K5, STU2N105K5 Test circuits 3 Test circuits Figure 17. Switching times test circuit for resistive load Figure 18. Gate charge test circuit VDD VGS VD RG RL D.U.T. 2200 μf 3.3 μf VDD Vi=20V=VGMAX 2200 μf 12V IG=CONST 2.7kΩ 47kΩ 100Ω 100nF D.U.T. 1kΩ VG PW 47kΩ PW 1kΩ AM01468v1 AM01469v1 Figure 19. Test circuit for inductive load switching and diode recovery times Figure 20. Unclamped inductive load test circuit G 25 Ω D S A D.U.T. B A FAST DIODE B A B D L=100μH 3.3 1000 μf μf VDD VD ID L 2200 μf 3.3 μf VDD G RG S Vi D.U.T. AM01470v1 Pw AM01471v1 Figure 21. Unclamped inductive waveform Figure 22. Switching time waveform V(BR)DSS ton toff VD tdon tr tdoff tf ID IDM 0 90% 10% VDS 10% 90% VDD VDD VGS 90% AM01472v1 0 10% AM01473v1 DocID026321 Rev 3 9/21 21

Package mechanical data STD2N105K5, STP2N105K5, STU2N105K5 4 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 10/21 DocID026321 Rev 3

STD2N105K5, STP2N105K5, STU2N105K5 Package mechanical data 4.1 DPAK, STD2N105K5 Figure 23. DPAK (TO-252) type A drawing DocID026321 Rev 3 11/21 21

Package mechanical data STD2N105K5, STP2N105K5, STU2N105K5 Table 9. DPAK (TO-252) type A mechanical data Dim. mm Min. Typ. Max. A 2.20 2.40 A1 0.90 1.10 A2 0.03 0.23 b 0.64 0.90 b4 5.20 5.40 c 0.45 0.60 c2 0.48 0.60 D 6.00 6.20 D1 5.10 E 6.40 6.60 E1 4.70 e 2.28 e1 4.40 4.60 H 9.35 10.10 L 1.00 1.50 L1 2.80 L2 0.80 L4 0.60 1.00 R 0.20 V2 0 8 12/21 DocID026321 Rev 3

STD2N105K5, STP2N105K5, STU2N105K5 Package mechanical data Figure 24. DPAK (TO-252) type A footprint (a) a. All dimensions are in millimeters DocID026321 Rev 3 13/21 21

Package mechanical data STD2N105K5, STP2N105K5, STU2N105K5 4.2 TO-220, STP2N105K5 Figure 25. TO-220 type A drawing 14/21 DocID026321 Rev 3

STD2N105K5, STP2N105K5, STU2N105K5 Package mechanical data Table 10. TO-220 type A mechanical data Dim. mm Min. Typ. Max. A 4.40 4.60 b 0.61 0.88 b1 1.14 1.70 c 0.48 0.70 D 15.25 15.75 D1 1.27 E 10 10.40 e 2.40 2.70 e1 4.95 5.15 F 1.23 1.32 H1 6.20 6.60 J1 2.40 2.72 L 13 14 L1 3.50 3.93 L20 16.40 L30 28.90 P 3.75 3.85 Q 2.65 2.95 DocID026321 Rev 3 15/21 21

Package mechanical data STD2N105K5, STP2N105K5, STU2N105K5 4.3 IPAK, STU2N105K5 Figure 26. IPAK (TO-251) drawing 0068771_L 16/21 DocID026321 Rev 3

STD2N105K5, STP2N105K5, STU2N105K5 Package mechanical data Table 11. IPAK (TO-251) type A mechanical data DIM mm. min. typ. max. A 2.20 2.40 A1 0.90 1.10 b 0.64 0.90 b2 0.95 b4 5.20 5.40 B5 0.30 c 0.45 0.60 c2 0.48 0.60 D 6.00 6.20 E 6.40 6.60 e 2.28 e1 4.40 4.60 H 16.10 L 9.00 9.40 L1 0.80 1.20 L2 0.80 1.00 V1 10 DocID026321 Rev 3 17/21 21

Packaging mechanical data STD2N105K5, STP2N105K5, STU2N105K5 5 Packaging mechanical data Figure 27. Tape 10 pitches cumulative tolerance on tape +/- 0.2 mm T Top cover tape P0 D P2 E B1 K0 B0 F W For machine ref. only including draft and radii concentric around B0 A0 P1 D1 User direction of feed R User direction of feed Bending radius AM08852v1 18/21 DocID026321 Rev 3

STD2N105K5, STP2N105K5, STU2N105K5 Packaging mechanical data REEL DIMENSIONS Figure 28. Reel 40mm min. T Access hole At slot location A D B C N Full radius Tape slot in core for tape start 25 mm min. width G measured at hub AM08851v2 Table 12. DPAK (TO-252) tape and reel mechanical data Tape Reel Dim. mm mm Dim. Min. Max. Min. Max. A0 6.8 7 A 330 B0 10.4 10.6 B 1.5 B1 12.1 C 12.8 13.2 D 1.5 1.6 D 20.2 D1 1.5 G 16.4 18.4 E 1.65 1.85 N 50 F 7.4 7.6 T 22.4 K0 2.55 2.75 P0 3.9 4.1 Base qty. 2500 P1 7.9 8.1 Bulk qty. 2500 P2 1.9 2.1 R 40 T 0.25 0.35 W 15.7 16.3 DocID026321 Rev 3 19/21 21

Revision history STD2N105K5, STP2N105K5, STU2N105K5 6 Revision history Table 13. Document revision history Date Revision Changes 08-May-2014 1 First release. 14-Nov-2014 2 19-Nov-2004 3 Document status promoted from preliminary to production data. Updated title, features and description in cover page. Updated Figure 9: Static drain-source on-resistance, Section 4.1: DPAK, STD2N105K5 and Section 4.3: IPAK, STU2N105K5. Minor text changes. Updated V GS in Table 2: Absolute maximum ratings and I GSS in Table 4: On /off states. 20/21 DocID026321 Rev 3

STD2N105K5, STP2N105K5, STU2N105K5 IMPORTANT NOTICE PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries ( ST ) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 2014 STMicroelectronics All rights reserved DocID026321 Rev 3 21/21 21