NE3, SA3, SE3, NE3A, SA3A, SE3A Single Low Noise Operational Amplifier The NE/SA/SE3/3A are single high-performance low noise operational amplifiers. Compared to other operational amplifiers, such as TL3, they show better noise performance, improved output drive capability, and considerably higher small-signal and power bandwidths. This makes the devices especially suitable for application in high quality and professional audio equipment, in instrumentation and control circuits and telephone channel amplifiers. The op amps are internally compensated for gain equal to, or higher than, three. The frequency response can be optimized with an external compensation capacitor for various applications (unity gain amplifier, capacitive load, slew rate, low overshoot, etc.). Features Small-Signal Bandwidth: MHz Output Drive Capability:, V RMS at V S = V Input Noise Voltage: nv Hz DC Voltage Gain: AC Voltage Gain: at khz Power Bandwidth: khz Slew Rate: 3 V/ s Large Supply Voltage Range: 3. to V Applications Audio Equipment Instrumentation and Control Circuits Telephone Channel Amplifiers Medical Equipment BALANCE INVERTING INPUT NON-INVERTING PIN CONNECTIONS V 3 D, N Packages Top View SOIC D SUFFIX CASE 7 PDIP N SUFFIX CASE ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page of this data sheet. 7 BALANCE/ COMPENSATION V+ OUTPUT COMPENSATION DEVICE MARKING INFORMATION See general marking information in the device marking section on page of this data sheet. Semiconductor Components Industries, LLC, September, Rev. Publication Order Number: NE3/D
7 3 Figure. Equivalent Schematic MAXIMUM RATINGS Rating Symbol Value Unit Supply Voltage V S V Input Voltage V IN V Supply V Differential Input Voltage (Note ) V DIFF. V Operating Temperature Range NE SA SE T amb to +7 to + to + Storage Temperature Range T stg to + C Junction Temperature T j C Power Dissipation at C Thermal Resistance, JunctiontoAmbient N Package D Package N Package D Package P D 7 R JA 3 Output Short-Circuit Duration (Note ) Indefinite Lead Soldering Temperature ( sec max) T sld 3 C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.. Diodes protect the inputs against overvoltage. Therefore, unless current-limiting resistors are used, large currents will flow if the differential input voltage exceeds. V. Maximum current should be limited to ma.. Output may be shorted to ground at V S = V, T amb = C. Temperature and/or supply voltages must be limited to ensure dissipation rating is not exceeded. C mw C/W
DC ELECTRICAL CHARACTERISTICS (T amb = C; V S = V, unless otherwise noted. ) (Notes 3, and ) NE/SA3/3A SE3/3A Characteristic Symbol Test Conditions Min Typ Max Min Typ Max Unit V OS.... mv Offset Voltage Overtemperature. 3. mv V OS / T.. V/ C I OS 3 na Offset Current Overtemperature na I OS / T pa/ C I B na Input Current Overtemperature na Supply Current Per Op Amp I B / T.. na/ C I CC Overtemperature Common Mode Input Range V CM 3 3 V Common Mode Rejection Ratio CMRR 7 db Power Supply Rejection Ratio PSRR V/V Large-Signal Voltage Gain A VOL R L Ω, V/mV V O = V Overtemperature Output Swing V OUT R L 3 3 V.... 9. Overtemperature R L ; V S = V R L. k 3 3. 3 3. Overtemperature.. Input Resistance R IN 3 k Output Short Circuit Current I SC 3 3 ma 3. For NE3/3A, T MIN = C, T MAX = 7 C.. For SA3/3A, T MIN = C, T MAX = + C.. For SE3/3A, T MIN = C, T MAX = + C. ma 3
AC ELECTRICAL CHARACTERISTICS (T amb = C; V S = V, unless otherwise noted. ) NE/SA3/3A SE3/3A Characteristic Symbol Test Conditions Min Typ Max Min Typ Max Unit Output Resistance R OUT A V = 3 db closed-loop f = khz; R L = ; C C = pf Transient Response Voltage-follower, V IN = mv R L = C C = pf, C L = pf.3.3 Rise Time t R ns Overshoot % Transient Response V IN = mv, R L = C C = 7 pf, C L = pf Rise Time t R ns Overshoot 3 3 % Gain A V f = khz, C C =.. V/mV f = khz,.. C C = pf Gain Bandwidth Product GBW C C = pf, C L = pf MHz Slew Rate SR C C = 3 3 V/ s C C = pf.. Power Bandwidth V OUT = V, C C = pf V OUT = V, C C = pf V OUT = V, R L = C C = pf, V CC = V khz 9 9 7 7 ELECTRICAL CHARACTERISTICS (T amb = C; V S = V, unless otherwise noted. ) NE/SA/SE3 NE/SA/SE3A Characteristic Symbol Test Conditions Min Typ Max Min Typ Max Unit Input Noise Voltage V NOISE f O = 3 Hz f O =. khz 7... 3. 7.. nv/ Hz Input Noise Current I NOISE f O = 3 Hz f O =. khz.... pa/ Hz Broadband Noise Figure f = Hz to khz; R S =. k Channel Separation f =. khz; R S =. k.9 db db
ICAL PERFORMANCE CHARACTERISTICS GAIN (db) C C = pf ICAL VALUES C C = S (V/µs) V S = +V C C GAIN (db) C C = ; RF = kω; RE = Ω C C = ; RF = 9kΩ; RE = kω ICAL VALUES C C = pf; RF = kω; RE = - 3 7 f (Hz) Figure. Open-Loop Frequency Response C C (pf) Figure 3. Slew Rate as a Function of Compensation Capacitance - 3 7 f (Hz) Figure. ClosedLoop Frequency Response 3 V S = +V ICAL VALUES, V S = +V V S = +V, (V) Vo(p-p) C C = pf pf 7pF I O (ma) I I (µa),, 3 7 f (Hz) Figure. LargeSignal Frequency Response - - 7 + - - 7 + T amb (o C) T amb (o C) Figure. Output ShortCircuit Current Figure 7. Input Bias Current 3 ICAL VALUES I O = V IN (V) NEG POS I P I N (ma) (nv Hz ) Vp; -V N (V) Figure. Input CommonMode Voltage Range Vp; -V N (V) Figure 9. Supply Current Per Op Amp 3 f (Hz) Figure. Input Noise Voltage Density
ICAL PERFORMANCE CHARACTERISTICS ICAL VALUES ICAL VALUES (nv Hz ) In(rms) (pa Hz ) 3 f (Hz) Figure. Input Noise Current Density Vn(rms) 3 khz THERMAL NOISE OF SOURCE RESISTANCE 3 R S (Ω) Hz Figure. Total Input Noise Density Vn(rms) (µv) Hz TO khz Hz TO khz R S (Ω) Figure 3. Broadband Input Noise Voltage
TEST LOAD CIRCUITS kω V+ C C kω - 3 C C 7 R S Ω V I + 3 3 - R F R E pf Ω 3 + V- Figure. Frequency Compensation and Offset Voltage Adjustment Circuit Figure. Closed-Loop Frequency Response CAL OSC Ω POWER SUPPLY +V CC -V CC + DUT - kω CAL METER +db BANDPASS AT khz (nv Hz ) (nv Hz ) Ω TEST BOARD BANDPASS AT 3Hz GND Figure. Noise Test Block Diagram 7
ORDERING INFORMATION Device Description Temperature Range Shipping NE3AD Pin Plastic Small Outline Package to +7 C 9 Units/Rail NE3ADR Pin Plastic Small Outline Package to +7 C Tape & Reel NE3AN Pin Plastic Dual InLine Package to +7 C Units/Rail NE3D Pin Plastic Small Outline Package to +7 C 9 Units/Rail NE3DR Pin Plastic Small Outline Package to +7 C Tape & Reel NE3N Pin Plastic Dual InLine Package to +7 C Units/Rail SA3AD Pin Plastic Small Outline Package to + C 9 Units/Rail SA3ADR Pin Plastic Small Outline Package to + C Tape & Reel SA3AN Pin Plastic Dual InLine Package to + C Units/Rail SA3N Pin Plastic Dual InLine Package to + C Units/Rail SE3AN Pin Plastic Dual InLine Package to + C Units/Rail SE3N Pin Plastic Dual InLine Package to + C Units/Rail For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD/D.
PACKAGE DIMENSIONS SOIC NB D SUFFIX CASE 77 ISSUE AB Y B X A S. (.) M Y M K NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y.M, 9.. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION.. MAXIMUM MOLD PROTRUSION. (.) PER SIDE.. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE.7 (.) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.. 7 THRU 7 ARE OBSOLETE. NEW STANDARD IS 77. Z H G D C. (.) M Z Y S X S SEATING PLANE. (.) N X M J MILLIMETERS INCHES DIM MIN MAX MIN MAX A...9.97 B 3....7 C.3.7.3.9 D.33..3. G.7 BSC. BSC H.... J.9..7. K..7.. M N.... S.... PDIP N SUFFIX CASE ISSUE L B NOTES:. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL.. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). 3. DIMENSIONING AND TOLERANCING PER ANSI Y.M, 9. NOTE T SEATING PLANE H F A C N D K G.3 (.) M T A M B M L J M MILLIMETERS INCHES DIM MIN MAX MIN MAX A 9...37. B.... C 3.9...7 D.3... F..7..7 G. BSC. BSC H.7.7.3. J..3.. K.9 3.3..3 L 7. BSC.3 BSC M N.7..3. 9
MARKING DIAGRAMS SOIC D SUFFIX CASE 7 N3 ALYWA S3 ALYWA N3 ALYW PDIP N SUFFIX CASE NE3AN NE3N SA3AN SA3N SE3AN SE3N A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 3, Phoenix, Arizona 3 USA Phone: 977 or 33 Toll Free USA/Canada Fax: 9779 or 337 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 9 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 9 Kamimeguro, Meguroku, Tokyo, Japan 3 Phone: 37733 ON Semiconductor Website: Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. NE3/D