Lecture 8 ECEN 4517/5517

Transcription

1 Lecture 8 ECEN 4517/5517 Experiment 4 Lecture 7: Step-up dcdc converter and PWM chip Lecture 8: Design of analog feedback loop Part I Controller IC: Demonstrate operating PWM controller IC (UC 3525) Part II Power Stage: Demonstrate operating power converter (cascaded boost converters) Part III Closed-Loop Analog Control System: Demonstrate analog feedback system that regulates the dc output voltage Measure and document loop gain and compensator design Power Electronics Lab 1

2 Due dates This week: Tuesday at noon (Mar. 13): Prelab assignment for Exp. 4 (one from every student) This week in lab (Mar ): Start Exp. 4 This Friday at 5 pm (Mar. 16): Exp. 3 part 2 report due Power Electronics Lab 2

3 Discussion: Lab 4 prelab Power Electronics Lab 3

4 Soft Start Reduce inrush current when closed-loop system starts up Connect capacitor to pin 8 Capacitor voltage limits maximum duty cycle Capacitor is slowly charged by 50 µa current source After capacitor charges, feedback loop takes over control of duty cycle You might not be able to get your closed-loop converter to turn on without soft start UC3525 Power Electronics Lab 6

5 Outputs of the UC3525A 13 V C flip-flop output Q output A flip-flop output Q output B output of PWM comparator Output of PWM comparator Flip-flop output Q Flip-flop output Q DT s T s Frequency of the outputs is one half the oscillator frequency. Duty cycle cannot be greater than 50%. Output A Output B Such outputs are needed in some types of switching converters such as push-pull. Power Electronics Lab Outputs A and B can be OR-ed to restore the PWM pulses at the oscillator frequency.

6 OR-ing the outputs + 5 V UC 3525 V C OUT A OUT B Gate driver A cheap way to OR the outputs of the UC3525 The + 5 V can be obtained from the 5 V reference of the UC3525 Bypass the + 5 V so that the switching EMI of this circuit does not disrupt the internal control circuitry of the UC3525, which also uses the + 5 V. More UC3525 tips: You will need to ground the SHUTDOWN pin. Otherwise the UC3525 will shut down. R T must be greater than 2 kω; otherwise the UC3525 oscillator will not work R D is usually a few hundred Ohms; R D must be substantially smaller than R T. Power Electronics Lab 7

7 Exp. 4 Part III Regulation of output voltage via feedback Model and measure control-to-output transfer function G vd (s) Design and build feedback loop Demonstrate closed-loop regulation of v HVDC Power Electronics Lab 3

8 Negative feedback: a switching regulator system Power input Switching converter Load + i load v g + v H(s) Sensor gain Transistor gate driver Pulse-width modulator v c G c (s) Compensator Error signal v e + Hv Reference input v ref ECEN

9 Transfer functions of some basic CCM converters Table 8.2. S alient features of the small-signal CCM transfer functions of some basic dc-dc converters Converter G g0 G d0 0 Q z V 1 buck D D R C LC L 1 V D' boost D' D' D'R C D' 2 R LC L L buck-boost D' D V D' DD' 2 D'R C D' 2 R LC L DL where the transfer functions are written in the standard forms G vd (s)=g d0 1 s z 1+ s Q 0 + s 0 2 G vg (s)=g g s Q 0 + s 0 2 Flyback: push L and C to same side of transformer, then use buck-boost equations. DC gains G g0 and G d0 have additional factors of n (turns ratio). ECEN

10 Bode plot: control-to-output transfer function buck-boost or flyback converter example G vd 80 dbv G vd G vd 60 dbv 40 dbv 20 dbv G d0 = 187 V 45.5 dbv f Hz Q = 4 12 db 40 db/decade 0 dbv 20 dbv G vd /2Q f Hz f z / Hz f z 2.6 khz RHP 20 db/decade dbv 10 1/2Q f Hz f 10f z 26 khz 10 Hz 100 Hz 1 khz 10 khz 100 khz MHz ECEN

11 Spice Simulation Open-loop simulation of control-to-output transfer function Replace boost converter switches with averaged switch model CCM-DCM1 and other switch models are linked to course web site, inside switch.lib file Apply dc voltage (to set steady-state duty cycle) plus ac variation, to terminal 5 of CCM-DCM1 model. Plot output voltage magnitude and phase using ac analysis within Spice. Power Electronics Lab 4

12 The loop gain T(s) Loop gain T(s) = product of gains around the feedback loop More loop gain T leads to better regulation of output voltage T(s) = G vd (s) H(s) G c (s) / V M Power input v g + Transistor gate driver Switching converter Pulse-width modulator G vd (s) = power stage control-to-output transfer function PWM gain = 1/V M. V M = pk-pk amplitude of PWM sawtooth v c G c (s) + v i load Error signal v e Compensator Reference input Load + v ref Hv H(s) Sensor gain ECEN

13 Phase Margin A test on T(s), to determine stability of the feedback loop The crossover frequency f c is defined as the frequency where T(j2 f c ) = 1, or 0 db The phase margin m is determined from the phase of T(s) at f c, as follows: m = (T(j2 f c )) If there is exactly one crossover frequency, and if T(s) contains no RHP poles, then the quantities T(s)/(1+T(s)) and 1/(1+T(s)) contain no RHP poles whenever the phase margin m is positive. ECEN

14 Example: a loop gain leading to a stable closed-loop system T 60 db 40 db T T 20 db f p1 f z Crossover frequency 0 db T f c 0 20 db db m Hz 10 Hz 100 Hz 1 khz 10 khz 100 khz (T(j2 f c )) = 112 m = = + 68 f ECEN

15 Transient response vs. damping factor v(t) Q = 50 Q = 10 Q = 4 Q = Q = 1 Q = 0.75 Q = 0.5 Q = 0.3 Q = 0.2 Q = 0.1 Q = 0.05 Q = c t, radians ECEN

16 Q vs. m Q 20 db 15 db 10 db 5 db 0 db 5 db Q = 1 0 db m = 52 Q = db 10 db m = db 20 db m ECEN

17 Lag (PI) compensation G c (s)=g c 1+ ω L s G c 20 db /decade G c Improves lowfrequency loop gain and regulation f L 10f L 0 G c 90 f L / /decade f Fundamentals of Power Electronics 42 Chapter 9: Controller design

18 Example: lag compensation original (uncompensated) loop gain is T T u (s)= u0 1+ ω s 0 compensator: G c (s)=g c 1+ ω L s Design strategy: choose G c to obtain desired crossover frequency ω L sufficiently low to maintain adequate phase margin 40 db 20 db 0 db 20 db 40 db T u T u T T T u0 f L f 0 f 0 f G c T u0 10f L 10f 0 1 Hz 10 Hz 100 Hz 1 khz 10 khz 100 khz f c ϕ m Fundamentals of Power Electronics 43 Chapter 9: Controller design

19 8.4. Measurement of ac transfer functions and impedances Network Analyzer Injection source Measured inputs Data v z magnitude v z frequency v y v x 17.3 db Data bus to computer v z output + v x input v y input + + v y v x Fundamentals of Power Electronics 94 Chapter 8: Converter Transfer Functions

20 Swept sinusoidal measurements Injection source produces sinusoid of controllable amplitude and frequency Signal inputs and perform function of narrowband tracking voltmeter: Component of input at injection source frequency is measured Narrowband function is essential: switching harmonics and other noise components are removed Network analyzer measures v x v y v z v y v x and v y v x Fundamentals of Power Electronics 95 Chapter 8: Converter Transfer Functions

21 Measurement of an ac transfer function DC blocking capacitor Injection source v z magnitude v z output + v z frequency Network Analyzer Measured inputs v x v y input input + + v y v x v y v x Data 4.7 db Data bus to computer v y (s) v x (s) = G(s) Potentiometer establishes correct quiescent operating point Injection sinusoid coupled to device input via dc blocking capacitor DC bias adjust V CC input G(s) Device under test output Actual device input and output voltages are measured as v x and v y Dynamics of blocking capacitor are irrelevant Fundamentals of Power Electronics 96 Chapter 8: Converter Transfer Functions

22 Voltage injection 0 Block 1 + Block 2 i(s) Z 1 (s) Z s (s) + v z v ref (s) + v e (s) G 1 (s)v e (s) + v y (s) v x (s) Z 2 (s) G 2 (s)v x (s) = v(s) + T v (s) H(s) Ac injection source v z is connected between blocks 1 and 2 Dc bias is determined by biasing circuits of the system itself Injection source does modify loading of block 2 on block 1 Fundamentals of Power Electronics 64 Chapter 9: Controller design