Differential Amplifiers. EE105 - Spring 2007 Microelectronic Devices and Circuits. Audio Amplifier Example. Small-Signal Model for Bipolar Transistor

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1 EE105 - Spring 007 Microelectronic Devices and Circuits Lecture 8 Differential Amplifiers Differential Amplifiers General Considerations MOS Differential Pair Cascode Differential Amplifiers Common-Mode Rejection Differential Pair with Active Load Audio Amplifier Example Small-Signal Model for Bipolar Transistor An audio amplifier is constructed above that takes on a rectified AC voltage as its supply and amplifies an audio signal from a microphone. 3 Some examples in this chapter are explained in bipolar transistor circuits The small-signal model of a bipolar transistor is very similar to that of the MOSFET, except bipolar transistor has low input impedance at base 4

2 Humming Noise in Audio Amplifier Example Supply Ripple Rejection v = Av + v vy = vr v v = Av X v in r X Y v in However, V CC contains a ripple from rectification that leaks to the output and is perceived as a humming noise by the user. 5 Since both node X and Y contain the ripple, their difference will be free of ripple. 6 Ripple-Free Differential Output Common Inputs to Differential Amplifier v = Av + v vy = Av v in + vr v v = 0 X v in r X Y Since the signal is taken as a difference between two nodes, an amplifier that senses differential signals is needed. 7 Signals cannot be applied in phase to the inputs of a differential amplifier, since the outputs will also be in phase, producing zero differential output. 8

3 Differential Inputs to Differential Amplifier Differential Signals vx = Av v in + vr v = Av + v v v = Av Y v in r X Y v in When the inputs are applied differentially, the outputs are 180 out of phase; enhancing each other when sensed differentially. 9 A pair of differential signals can be generated, among other ways, by a transformer. Differential signals have the property that they share the same average value to ground and are equal in magnitude but opposite in phase. 10 Single-ended vs. Differential Signals Differential Pair With the addition of a tail current, the circuits above operate as an elegant, yet robust differential pair. 11 1

4 MOS Differential Pair s Common-Mode Response Equilibrium Overdrive Voltage V = V = V R X Y DD D I ( V V ) = GS TH equil n I μ C ox W L Similar to its bipolar counterpart, MOS differential pair produces zero differential output as VCM changes. 13 The equilibrium overdrive voltage is defined as the overdrive voltage seen by M 1 and M when both of them carry a current of I /. 14 Minimum Common-mode Output Voltage Differential Response V R I > V V DD D CM TH In order to maintain M 1 and M in saturation, the common-mode output voltage cannot fall below the value above. This value usually limits voltage gain

5 Virtual Ground Small-Signal Response Δ VP = 0 Δ ID 1 = gmδv Δ I = g ΔV D m Δ VP = 0 VX VY Av = Δ V ( Δ V) gmδvrd = ΔV = g R m D V P For small changes at inputs, the g m s are the same, and the respective increase and decrease of I D1 and I D are the same, node P must stay constant to accommodate these changes. Therefore, node P can be viewed as AC ground. 17 Since the output changes by -g m ΔVR D and input by ΔV, the small signal gain is g m R D, similar to that of the CS stage. However, to obtain same gain as the CS stage, power dissipation is doubled. 18 MOS Differential Pair s Large-Signal Response Maximum Differential Input Voltage V in 1 V = in max ( V GS V TH ) equil 1 W 4I I I = μ C V V V V in L W μncox L ( ) ( ) D1 D n ox in1 in1 in 19 There exists a finite differential input voltage that completely steers the tail current from one transistor to the other. This value is known as the maximum differential input voltage. 0

6 The effects of Doubling the Tail Current The effects of Doubling W/L Since I is doubled and W/L is unchanged, the equilibrium overdrive voltage for each transistor must increase by to accommodate this change, thus ΔV in,max increases by as well. Moreover, since I is doubled, the differential output swing will double. 1 Since W/L is doubled and the tail current remains unchanged, the equilibrium overdrive voltage will be lowered by to accommodate this change, thus ΔV in,max will be lowered by as well. Moreover, the differential output swing will remain unchanged since neither I nor R D has changed Small-Signal Analysis of MOS Differential Pair Virtual Ground and Half Circuit 1 W 4I W I I μ C V V = C I V V L W μ L ncox L ( ) μ ( ) D1 D n ox in1 in n ox in1 in Δ VP = 0 A = g R v m C When the input differential signal is small compared to 4 I /μ n C ox (W/L), the output differential current is linearly proportional to it, and small-signal model can be applied. 3 Since V P is grounded, we can treat the differential pair as two CS half circuits, with the same small-signal gain 4

7 MOS Differential Pair Half Circuit Example I MOS Differential Pair Half Circuit Example II λ 0 1 Av = gm 1 ro3 ro 1 gm3 5 λ = 0 A v = g g m1 m3 6 Extension of Virtual Ground MOS Differential Pair Half Circuit Example III V X = 0 It can be shown that if R 1 = R, and points A and B go up and down by the same amount respectively, V X does not move. λ = 0 A v = R RDD + 1 g m 7 8

8 MOS Cascode Differential Pair MOS Telescopic Cascode A g r g r v m1 O3 m3 O1 9 ( ) Av gm 1 gm3ro3ro 1 ( gm5ro5ro7) 30 CM to DM Conversion, ACM-DM Differential to Single-ended Conversion ΔVout ΔRD = Δ V 1/ g + R CM m If finite tail impedance and asymmetry are both present, then the differential output signal will contain a portion of input common-mode signal. 31 Many circuits require a differential to single-ended conversion, however, the above topology is not very good. 3

9 Supply Noise Corruption MOS Differential Pair with Active Load I I +ΔI +ΔI ΔI I ΔI The most critical drawback of this topology is supply noise corruption, since no common-mode cancellation mechanism exists. Also, we lose half of the signal. 33 This circuit topology performs differential to single-ended conversion with no loss of gain. The input differential pair decreases the current drawn from R L by ΔI and the active load pushes an extra ΔI into R L by current mirror action; these effects enhance each other. 34 Asymmetric Differential Pair Because of the vastly different resistance magnitude at the drains of M 1 and M, the voltage swings at these two nodes are different and therefore node P cannot be viewed as a virtual ground. 35

Chapter 10 Differential Amplifiers

Chapter 10 Differential Amplifiers 10.1 General Considerations 10.2 Bipolar Differential Pair 10.3 MOS Differential Pair 10.4 Cascode Differential Amplifiers 10.5 Common-Mode Rejection 10.6 Differential