Noise Characteristics Of The KPiX ASIC Readout Chip
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1 Noise Characteristics Of The KPiX ASIC Readout Chip Cabrillo College Stanford Linear Accelerator Center
2 What Is The ILC The International Linear Collider is an e- e+ collider Will operate at 500GeV with a planned upgrade to 1TeV Physics to be explored include looking for the Higgs mechanism, supersymmetric particles, and possibly extra dimensions too name a few. Plan to record and reconstruct every event. This requires high energy and momentum resolution from precision detectors which are able to read all events.
3 Where The KPiX Fits Into The ILC Design Calorimeter Electromagnetic measures energies of photons and charged particles Hadronic calorimeter measures particles composed of quarks Tracking measure the path and momentum
4 Features Of The KPiX Chip The KPiX chip has a number of key features which are catered for ILC physics. The 5Hz pulsed design of the ILC beam allows low power design and minimizes cooling material required Signals are stored in one of four buffers per channel which, combined with a comparatively low event rate, allows for readout of all hits from so many channels possible. BNL, UC Davis, Oregon, SLAC Currently working with a 4 th generation 64 channel prototype with a 5 th expected in September. The final design will be a 32x32 array totaling 1024 channels per chip.
5 KPiX Design A high level overview of the KPiX chip consists of a transconductance charge amplifier, a signal pulse shaper, reset and trigger threshold logic, and four signal storage capacitors (buffers). An analog-to-digital converter allows digital readout via the digital block of the KPiX chip. Amplifier Storage Buffers ADC Shaper Trigger Logic Calibration Capacitors
6 Measuring The Noise At The ADC Noise at the ADC had already been measured to be on average 2000e-. These measurements had established the approximate noise associated with the KPiX chip and determined whether it met tracker and calorimeter requirements. The RMS value is used to measure the noise out of the ADC. Here the RMS is ADC counts. Using the slope here a single ADC count is calibrated to be about 553 electrons. Using the RMS from the previous graph the noise at the ADC is about 1560 electrons. This is adequate S/N for the ECal but not the tracker.
7 Measuring The Noise At The Trigger Threshold Logic Noise at the trigger logic had not been measured. The noise behavior at this point in the signal path is important since it determines the ability to collect physics events without filling up the buffers with noise hits. Fitted to the data is the integral of the Gaussian function. This proved to be a good fit and allowed precise measurements of the noise at the threshold logic. The sigma value is the noise which fluctuates about the pedestal represented by the mean value.
8 Measuring The Noise At The Trigger Threshold Logic A single threshold DAC value was calibrated by looking at the shift in the mean threshold of the s-curve for various injected charges. The inverse of the slope of the line fitted to the data is the charge per threshold DAC step. This is then applied to the sigma value of the noise measurements. Using this slope, the noise from the last plot works out to be about 2500 electrons.
9 Interpreting The Difference Between The ADC And Threshold Noise Measurements ADC Count While it is expected that the noise at the ADC should be smaller, it should not differ by more than a couple hundred electrons. Threshold Trigger Pulse Shaper Output Noise expectation out of the ADC from design and simulation was around 700e - which is much different from measurement. Two questions arise out of this: why is the noise so high what is causing such a large difference between noise measurements?
10 Locating The Significant Noise Source An inverter amplifier built into the KPiX chip was utilized to study the amplifier noise. Since the noise contribution from all sources add in quadrature total = amp 2 thresh 2 other 2 measuring the noise for different amplifier gains can provide insight into what might be causing the large amount of noise e±56 e 4600 e±63e Positive Polarity Amplifier Negative Polarity Amplifier
11 Interpreting The Double Gain Measurements If the amplifier were the significant noise source, than an increase in gain would not change the noise results since the value of a single threshold DAC increases by the same factor. Significant fluctuations in the threshold value were observed. If these were the significant noise source, then the noise results should go down since fluctuations in threshold correspond to fluctuations in ADC count, which should appear as half the charge value in double gain mode.
12 Where To Go From Here Continue trying to isolate the noise source Has been suggested that the channel reset mechanism might be at fault Can explore this by increasing the reset time or pseudo-turning it off Input current is directly correlated with input noise An increased current should decrease noise Keep thinking of new ideas. There are many knobs to turn on this chip as it is very complicated. Getting everything working in harmony is no trivial task. The trick is turning one knob at a time!
13 Acknowledgments Thank you Tim Nelson for being an excellent mentor Thanks to the KPiX group including Ryan Herbst, Dieter Freytag and Marty Breidenbach for all their help and support Thank you Mike Woods, Steve Rock, and Farah Rahbar for creating such a wonderful program Many thanks to the DOE and SLAC for this opportunity
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