A Fully Programmable Novel Cmos Gaussian Function Generator Based On Square-Root Circuit

Transcription

1 Technical Journal of Engineering and Applied Sciences Available online at 01 TJEAS Journal / SSN TJEAS A Fully Programmable Novel Cmos Gaussian Function Generator Based On Square-Root Circuit Zeinab Delirian *1, Dr. Masoud Jabbari, Mohammadbagher Sharifnia 1 1- Department of Electrical Engineering Fasa Branch, slamic Azad University, Fasa, ran - Department of Electrical Engineering Marvdasht Branch, slamic Azad University, Marvdasht, ran Corresponding author z_delirian@yahoo.com ABSTRACT: A new method to design a CMOS analogue circuit with Gaussian Function output signal is presented for neuro-fuzzy applications, while it is not working in sub-threshold region. Since the relationship of the drain current of the transistor is not exponentially, we have approximated the Gaussian function (GF) with some implemental functions. Having confirmed that the mathematics we discussed is matched with the results, simulation results have shown better performance in most parameters in comparison with the previous works. Designed circuits were simulated using HSPCE by level 49 parameters in 0.35µm standard CMOS technology. Keywords: CMOS analogue design, current-mode, Gaussian function, nonlinear circuit. NTRODUCTON Gaussian Functions are widely used in neuro-fuzzy applications (Soelimani et al, 009; Ota and Wilamowski, 1996; Masmoudi et al, 00; Choi et al, 1994 and Zhao et al, 007). They re used as membership functions in fuzzy controllers (Soelimani et al, 009; Ota and Wilamowski, 1996), and as activation functions in neural network architectures (Fausett, 1994 and Masmoudi et al, 00). From the designing point of view, since the definition of GF is exponentially, as shown in (1), GF generating circuits have been designed in subthreshold region (Masmoudi et al, 00 and Moshfe et al, 010), in order to take the advantage of the exponentially relationship of the drain current of the MOS transistor. Although the results of these circuits are so accurate, and consume low power, some problems exist with them. One is working in low speed and the more important is being disturbed by the mismatch of the devices. ( ) (1) where x is the input, y is the output and also A, σ and μ are the maximum, the variance and the mean value, respectively. n literatures, there are some circuits were not designed in sub-threshold region to generate GFs (Soelimani et al, 009; Ota and Wilamowski, 1996). But because of the square relationship of the drain current of MOS transistor with its gate to source voltage, the wave forms of them are just like GF, without any mathematics formula. So they re not enough accurate. n this paper, a new method is presented to approximate the GF with some implemental functions. n the next section, it will be mentioned in details. n Part, circuit level description will be explained, and finally the simulation results are given in part V. APPROXMATON OF GAUSSAN FUNCTON The GF were defined in (1). Using curve fitting toolbox of the MATLAB software, we can find different approximation for GF. Since the GF is an even function, we have found the approximation of the half of this function. The approximation should be simple to implement, while it has enough accuracy. The best approximation was obtained by the rational functions which have the advantage of simple implementation,

2 Tech J Engin & App Sci., (11): , 01 since they need squarer and divider circuits. t is shown in equation (). The coefficient was obtained by using trust-region algorithm, while they were limited in the ranges in which the circuits can operate properly. Figure.1 shows the approximated function comparing with the ideal GF. () Figure1. Approximated GF compare with ideal GF Programmability is one of the most important properties the membership function and the activation function generator circuits must have. n GF generator circuit, two parameters have to be set: the mean and the variance. Mathematically, to expand (compress) and shift a function, one can perform ( ) to expand (compress) by and to shift by. While the function is the function defined in Eq. (), the mean value and variance value will change to and, respectively: ( ) ( ) ( ) ( ) (3) Practically, in order to do this, we need a circuit to program the mean (shift) and the variance (expansion or compression) values. Since the input signal is current, multiplying by a constant and subtracting is simple which will be explained in part in details. The key point is we must first multiply the input by a, and then shift it by b. t s worthy to say that we should use a current rectifier to make the circuit accept both the positive and negative current input values. CRCUT LEVEL DESCRPTON Due to the Eq. (), as shown in Figure., in order to implement the GF approximation, a programmer unit to set the values and a rectifier is needed, as mentioned. And finally, a squarer/divider (SQ/DV) circuit to realize the term x have to be designed, and then since multiplying this term (and also the term x ) by the coefficients are simple, as like as adding them, just a divider circuit have to be designed. n this section, we first explain SQ/DV block which is based on the squarer-rooter/multiplier one; and then design of the divider block will be illustrated. Note that the current value of 10 µa is normalized to one. Digital nputs Approximated GF ax bx c x dx e Rectifier Programing Unit nput current Figure. Block diagram of the GF generator Square-rooter/multiplier circuit Figure. 3 shows the schematics of the squarer-rooter/multiplier (SQR/MUL) circuit, which is based on the well known trans-linear principle (Gilbert, 1996). This is the same circuit were published in (Lopez-Martin and Carlosena, 001) with a little difference, that is we used cascade current mirrors to have more accuracy. A KVL on the shown loop gives: (4)

3 Tech J Engin & App Sci., (11): , 01 Knowing that the devices are perfectly matched having long channel length (neglecting channel length modulation (λ=0)):, and the drain current of a MOS transistor in saturation region has the following relation to its gate-source voltage: ( ) (5) Equation (4) can be written as: (6) And then (7) Since the NMOS current mirrors force be equal to 4, the output current will be: (8) M= M= M= M= M= M= M=1 VDD y x M1 M M3 M4 out M5 M6 Figure 3. Squarer-rooter/multiplier circuit Squarer/divider circuit n fact the SQ/DV circuit is the SQR/MUL circuit while the output is replaced by one of the inputs. The designed circuit is shown in Figure. 4. According to (8), the output is equal to: M= M= M= (9) VDD M=1 M= M= M= VDD w out M1 M M3 M4 z M5 M6 Figure 4. Squarer/divider circuit Divider circuit The divider circuit is the final block of the GF generator circuit. The block diagram of the divider circuit is given in Figure. 5, while the output current relationship is illustrated in (9). t consists of a SQR/MUL circuit and a square/divider (SQ/DV) one. (9) 3

4 Tech J Engin & App Sci., (11): , 01 num unit. num unit denom ( num. denom unit ) divider Figure 5. Block diagram of the divider Programmer unit n order to program the circuit, we need a current rectifier, a programmable expansion (compression) circuit, with a subtracting one. Figure. 5 shows the programmer unit: the variance and the mean programmer circuits with the resolution of 0.15, and the current rectifier which has a simple design. Note that µ is the current in which the maximum of the output current occurs that means the mean value (µ) in Eq. (1). The switches S and Z are placed to improve the ability of the circuit to generate the S-shaped and Z-shaped waveforms, respectively. Normally, they must be closed. When one is open, e.g. the switch S, only the currents with the values more than the mean value will be guided to flow in the output branch. Then Z-shaped waveform will be resulted. Variance programmer circuit M=8 M=8 M=4 M= M=1 input S Z nput V Bias αinput-µ /8 /4 / Figure 6. Programmer unit GF generator According to Eq. (), the block diagram of the approximated GF will be what is shown in Figure. 7. The input current is coming from the programmer unit. out is equal to: in in unit unit (10) 0.6 in Divider numerator denominator 0.6 unit out 0.6 in in 0.14in Figure 7. Approximated GF generated block diagram SMULATON RESULTS n this section we show our simulated results of the circuit in 0.35μm CMOS process, simulated by Simulation Program with ntegrated Circuit Emphasis (SPCE), for the parameters, 4

5 Tech J Engin & App Sci., (11): , 01 The output (half of the GF) versus input current ( input ) is shown in Figure. 8, comparing with the ideal GF for σ=0.5. The error is also given in the figure, which is about 3% in maximum point. n Figure. 9 and Figure. 10, programmability of the circuit is illustrated for some values of mean and variance, while the S-shaped and Z-shaped waveforms are also shown in Figure. 10. We can see that the circuit is working properly for a wide range of variance values. Figure. 10 also illustrates that the circuit operate for the wider range than what the GF has been approximated. Figure 8. Output current (half of GF) versus input current Figure 9. Variance programmability Figure 10. Mean programmability CONCULSON n this paper we present a novel design for Gaussian function implementation. This method is based on simple mathematical approximation. The circuits which were designed to implement the approximated function with CMOS technology are square-root based. The functionality verified and good result achieved. This new method to generate Gaussian function in strong inversion region with a new versatile programmability make it suitable for high speed high accuracy neuro-fuzzy applications. REFERENCES A. G. Andreou, K. A. Boahen, Ph. O. Pouliquen, A. Pavasovic, R. E. Jenkins, and K. Strohbehn, March 1991 current-mode subthreshold MOS circuits analog VLS neural systems, EEE Trans. on neural networks, vol., No.. A. J. Lopez-Martin, A. Carlosena, 001 Current-Mode Multiplier/Divider Circuits Based on the MOS Translinear Principle, Analog ntegrated Circuits and Signal Processing, vol. 8, pp B. Gilbert, 1996 translinear circuit: an historical overview, Analog ntegrated Circuits and Signal Processing, PP

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