MEMS Test & Reliability Conference. Dynamic Product Performance Testing of Capacitive MEMS Elements at Wafer Level

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Derek Ramsey
6 years ago
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1 MEMS Test & Reliability Conference Dynamic Product Performance Testing of Capacitive MEMS Elements at Wafer Level

2 Solidus Technologies Abstract Testing the electro/mechanical behavior of capacitive MEMS elements (accelerometers, gyros, mirrors, microphones and resonators) is a requirement for verifying and screening for performance of the MEMS element. This presentation will provide information on an innovative test methodology that can empirically determine, record, and analyze the MEMS element s dynamic electro/mechanical behavior or response through electrical stimulation and sensing at wafer level testing. This dynamic test method provides a fast reliable and cost effective method to extract product behavior data from the element at wafer level which can be used to sort MEMS products for performance, determine fabrication process variation and establish Known Good Die (KGD).

3 Agenda 1. What is Dynamic Wafer Level Testing? 2. Why is Dynamic Wafer Testing Important? 3. Measurement Overview 4. Conventional Measurement Methods 5. Dynamic Measurement Methods 6. Dynamic Measurement Data Analysis 7. Summary

4 What is Dynamic Level Wafer Testing? The ability to move a MEMS element at wafer level with a Drive Voltage and then Sense or Measure the element s movement or behavior (Natural Frequency, Damping Ratio, Q, Quadrature Error, obstruction, Stiction and more. Drive or Force (Device Input) Sense or Measure (Device Output) Slope = Damping Ratio, Zeta and Q (Volts) (Time Units) f = 1/t (Time Units)

5 Why is Wafer Level Dynamic Testing Important? Reduce product development and deployment cycle time Provides process performance feed back to foundry Minimize or eliminate package stimulus testing Package stimulus handling equipment is capital intensive ($$) Package testing process is lengthy and expensive ($$) Reduce package test times using know good die Reduces existing wafer test time (3-4X) Increases wafer test coverage Sort die for dynamic performance Improves product quality Sort die for Known Good Die (KND) *Goal: Reduce Cost of Final Test and Overall Product Cost

6 Why is Wafer Level Dynamic Testing Important? (Continued) *Goal: Reduce Cost of Final Test and Overall Product Cost Static Wafer Test Path Package Test ($$$) - Calibration and Test Times ($$$) - Final Test Yields ($$$) - Tester and Handler ($$$) Dynamic Wafer Test Path Dynamic Wafer Test ($$) Minimize Parameter Variations Wafer Element KGD Wide Parameter Variations Wafer Element Static Wafer Test ($$) - Reduce Calibration Test Times - Increase Final Test Yields - Minimize Final Testing - Wafer processing Improvement - Minimize Process Variation Package Test ($$)

7 Measurement Overview MEMS Wafer level dynamic testing has increased in importance as products have become more complicated, and production volumes increase. Validate device design & simulations. Predict final device performance at wafer level. Improve MEMS fabrication process and yields. Reduce Overall Manufacturing Costs Products that benefit from Dynamic Measurement: Capacitive Inertial devices: Gyro, accelerometers, IMU s. Pressure sensors, Optical Mirrors, MEMS microphones.

8 Dynamic Measurement Methods Dynamic Methods Frequency Response Resonant Frequency Spring Constant Damping Q Gyro Quadrature error Mechanical Hysteresis Work function potential (ev) Dynamic Attributes AC Performance Failures and Defects Stiction Particulate obstruction Broken elements Hermiticity Meets design specifications? Sort for performance STI9000 ATE STI3000E Test Head

9 Dynamic Measurement Methods Test Flow Test Flow Example Leakage Test Step Response Range of Motion f - 3 db Test O u t p u t O u t p u t O u t p u t O u t p u t Leakage Currents Test Output Resonant Frequency Q, Damping Ratio ; Spring Constant ; Snap Voltage, Hysteresis ; More... f - 3 db freq.

10 Dynamic Measurement Methods Test Times Example Test Flow Data Processing Leakage Test Step Response Range of Motion f - 3 db Test DLL Functions Call 0. 1 s s 0.10 s s 0 s Time Estimated Total Test Time (per die pair) < sec. Note: Test times are estimates and based on MEMS element structures: both accelerometers and gyros wafer elements were used as a benchmark. Dynamic testing typical < 30% of Capacitive Test Time Time

11 Dynamic Measurement Methods Types of Drive and Sense Tests STEP Test Resonant Frequency, Q, Damping Ratio, Hermiticity RAMP Test Stiction, Hysteresis, Spring Rate SWEEP Test Frequency Response, f- 3dB Frequency, Q Chirp Test White Noise Many Other Tests Possible

12 (Volts) Dynamic Measurement Test Methods STEP Response Test Example Drive or Force (Device Input) Sense or Measure (Device Output) Slope = Damping Ratio, Zeta and Q Sine Fit Correlation (Time Units) Measure Element Zeta & Q: 1. No-damping 2. Under-damped 3. Critically-damped 4. Over-damped f = 1/t (Time Units) Measure Element Phase Response

13 Dynamic Measurement Test Methods STEP Test Example Note: Test Data from STI3000 Test System

14 Dynamic Measurement Test Methods Range of Motion Test (ROM) Drive or Force (Device Input) Sense or Measure (Device Output) Stiction Point (Volts) (Device Output) Hysteresis (Time Units) (Volts) Voltage At Release Voltage At Pull-in

15 Dynamic Measurement Test Methods SWEEP Test Example Frequency Sweep Resonant Frequency and Q Force SWEEP Sinusoidal Voltage Input Measure Device Output Response Calculate Resonant Frequency and Q Sinusoidal Drive Input Device Resonance Device Roll-off Device Output (Amplitude) Resonant Frequency Frequency (Hz) Note: Test Data from STI3000 Test System

16 Standard Measurement Wafer and Package Testing Long and Expensive Development and Manufacturing Cycle Design Process Static Wafer Test Assembly Package Test

17 Dynamic Measurement Cost Savings with Dynamic Wafer Testing Design Performance Feedback Improve Design Improve Product with Process Improve Product with Test Performance Improve Product Quality Design Process $$$ Dynamic Wafer Test $$$ Monitor Process Correlation Wafer Test to Process Reduce Process Variation Validate Process with Wafer Test Distributions $$$ Reduce Manufacturing Costs Reduce Overall MFG Costs With Dynamic Wafer Testing Assembly Package Test Correlate Wafer to Final Test Reduce Final Test Times Reduce Final Tests Times Improve Final Test Yields Increase UPH Package Test is an Expensive MFG Constraint! Dynamic Wafer Testing improves product quality and reduces Package Testing time.

18 Summary Wafer Level Dynamic Performance data will: Reduce Overall Test Time for Wafer and Package Testing Provides Data to Reduce Product Variation Increase Product Yields Reduce Package Level Calibration and Testing Reduce Product Time to Market Validate Design Simulations Allow product to be sorted for product performance Reduce or eliminate package stimulus testing Decrease manufacturing costs while simultaneously improving product quality and reliability and increasing manufacturing through- put

19 Solidus Technologies, Inc. STI3000 Production Test Systems STI3000 Test Head STI9000 ATE

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