A Primary Side Clamping Circuit Applied to the ZVS-PWM Asymmetrical Half-Bridge Converter

Transcription

1 A Primary Side Clamping Circuit Applied to the ZVS-PWM Asymmetrical Half-Bridge Converter Marcel0 Lobo Heldwein, Alexandre Ferrari de Souza and vo Barbi Power Electronics nstitute Dept. of Electrical Engineering Federal University of Santa Catarina P.O. Box Floriandpolis - SC - Brazil Abstract - This paper presents a soft-switching asymmetrical half-bridge DC-DC converter with a clamping circuit connected in the primary side of the transformer. This clamping circuit will reduce the reverse recovery effects of the output diodes, increasing the overall efficiency. Theoretical analysis of the converter along with experimental results are provided.. NTRODUCTON The ZVS-PWM asymmetrical Half-Bridge DC-DC converter [] [2], shown in Fig. 1, is a suitable solution for converter with a processed power up to 1000 W. However, at the traditional ZVS PWM asymmetrical half-bridge topology the value of the resonant inductance L, can not be lowered or the soft commutation characteristic will not be present. This always traduces in minor care with the transformer assembly, allowing the dispersion inductance to be of high value. +. The main disadvantage with this kind of snubber is that the energy spent to keep the voltage in acceptable levels is dissipated in the resistors. These losses drastically reduce the overall efficiency of the converter. Another disadvantage of these RCD snubbers is that oscillations in the voltage will continue to occur and probably in a lower frequency, which are harder to extinguish. These oscillations will add losses as well, since they increase reactive power in the circuit. A solution to this problem is the use of clamping diodes on the primary side of the transformer, as presented in Fig. 3. With this technique the voltages applied to the transformer primary side are clamped to VC, during positive cycle of the source, and -VC~ during the negative cycle. deally this results in clamped voltages also in the secondary coils and as a consequence in the rectifier diodes (Drl and De). Thus, if the dispersion inductance is small the voltages applied to the rectifier diodes will not present significant overshooting. Snubber circuit, f f -L TC" _._..-. ' ' Fig. 2 - RCD Snubber placed in the output rectifier diodes. Fig. 1 - Traditional circuit of the ZVS PWM half-bridge converter with RCD snubbers. The effect of resonant inductance along with parasitic parameters in output rectifier diodes during commutations results in serious resonance in the circuit. The main effects of this resonance are overshooting and ringing voltages, reflecting in over-voltage on the output diodes. These over-voltages must be limited to avoid diodes malfunction or even their destruction. Usually, the overvoltages are limited by the use of clamping or snubber circuits, which are placed directly over the diodes. The most usual and less expensive circuit is the resistor-capacitor-diode (RCD) configuration, shown in Fig. 2. Alternate voltage source Drl DQ Output filter Load - Clamping diodes: D, and Dg Rectifier diodes: D,, and De Fig. 3 - Primary side clamping /00/$10.00 (c) 2000 EEE 199

2 This technique was applied to a Capacitor Voltage- Clamped Series Resonant Converter [3]. However, the technique was employed in Discontinuous Conduction Mode (DCM) of the Resonant nductor Current and was not proposed for converters with current source output characteristics operating in constant frequency and Continuous Conduction Mode (CCM). This technique can be applied to the half-bridge asymmetrical converter resulting on the proposed circuit shown in Fig. 4. The objective of clamping diodes on the primary side is to remove the effect of the resonant external inductor over the commutation of the output rectifier diodes without changing the characteristics of the converter. This objective is accomplished on the way that the primary side voltage is clamped to the voltages across capacitors C3 and C4. n this case, the voltage source and the capacitors absorb the energy due to commutation of the output rectifier diodes on the resonant inductor, through the clamping diodes. t can be noticed through the analysis of the operation stages of the converter that the inclusion of these diodes does not affect significantly the converter performance, once currents flowing through them are small and are caused by the commutation of the output diodes. Fig. 4 -The proposed ZVS P W half-bridge converter with primary side clamping. With the primary side clamping and depending on the value of the transformer leakage inductance, it is possible to eliminate the use of the RCD snubber circuits in the output. The use of this technique implies that the transformer must be assembled with a leakage inductance as low as possible, in order to avoid the same parasitic effects that can lead to high voltages on the output diodes. n some cases this is not possible, and the use of primary clamping only is not capable of avoiding voltages above the limits of the diodes. n these cases it is necessary to use snubber circuits in the output the diodes. However, these snubber circuits will be of small rating, when compared to the use of only them. Sometimes a small capacitor and a very high value resistor are sufficient. This paper proposes the use of the clamping diodes in the primary side of a soft-switching asymmetrical Half-Bridge Converter, leading to a higher efficiency, once there is no resistive elements in the clamping circuit. n. RELEVANT ANALYSS n order to simplify the analysis of the stages of operation, the following assumptions are made: *Switches S1 and SZ are ideal and unidirectional in current; *Diodes D1 and Dz are ideal;.the transformer is modeled as an ideal transformer with the primary in parallel with a magnetizing inductance Lag) and in series with a leakage inductance (Llk); *The output behaves like a constant current source with value,; *Capacitors C3 and C4 are considered ideal voltage sources with zero ripple; Commutation effects on diodes Del, Dc2, D,1 and Dr2 are considered; *Parameters of all components are invariable. *Duty cycle (D) is defined as switch S1 duty cycle. A. Average values: As switch S1 stays on during D.T, average voltage on point A is D.E. Knowing that average voltages across the inductors L, Llk and Lg are null, then the average voltage over CZ is also D.E and over C1 is (l-d).e. The on-times at Drl and Dr2 are not equal. Thus, the average current on the primary is different from zero. The average current on the magnetizing inductor must complement the asymmetric primary current in order to maintain no average current on capacitors C3 and C4. B. Operation stages: There are 12 stages during normal operation with softcommutation and Continuos Conduction Mode. The stages of operation of the asymmetrical half-bridge with primary clamping are presented in Fig. 5. The main waveforms are presented in Fig. 6, where Vgsl(t) and VgSz(t) are the gate signals of switches S1 and S2 respectively. The stages of operation are described as follows: lst stage (to - tl): Power transfer stage (Fig. 5.a) Energy is transferred to the load. Through switch S circulates the sum of the referred load current (z') and the magnetization current ih(t). Voltage between points A and B is (1 -D).E. Voltage over Dcl tends to bias it. Although there is circulating current due to the commutation on stage 12, current on Dcl is neglectible. The magnetizing inductor (L) receives energy. Capacitor C3 is discharged. This stage finishes when S1 is turned off. 2nd stage (tl - tz): Linear stage (Fig. 5.b) Current starts circulating through capacitors C1 and Cz. Capacitor C1 is linearly charged, while Cz is discharged at the same rate. This provides soft turn-off for S. Voltage vab(t) decreases also linearly. This stage ends when voltage between A and B is null /00/$10.00 (c) 2000 EEE 200

3 E Fig. 5 - Stages of operation. 3d stage (tz - t3): Resonant stage (Fig. 5.c) When VAB(t) reaches zero the rectifier is short-circuited, so the magnetizing current is absorbed by the output stage. The circuit is reduced to L,, Llk, C1, Cz and the voltage sources. Resonance between the components takes place and the transition of the states is accomplished. 4* stage (ts - 4): Energy recovery stage (Fig. 5.d) The energy remaining in the inductors L, and L1k is recovered to the source through diode Dz, decreasing the current linearly until it becomes null and ending this stage. Voltage over Sz is null enabling a soft turn-on of this switch. 5* stage (f4 - ts): Linear magnetization stage (Fig. 5.e) When current in the resonant inductor changes its direction S2 starts conducting. The voltage over L, and L1k is still D.E and the current in these components increases linearly until ih(t) reaches ih(t)-o when this stage ends. 6* stage (ts - f6): Output rectifier transition stage (Fig. 5.0 At the end of stage 5 the rectifier diode Dr2 is blocked and the voltage applied to the primary of the transformer tends to rise quickly. Due to the effect of inductor L1k and intrinsic capacitances of the clamping and rectifier diodes, the primary voltage tends to rise to a level higher than D.E. Thus, the diode D,z clamps the voltage on point C and these capacitances are discharged over L,. 7* stage (k - t7): Power transfer stage pig. 5.g) Energy is transferred to the load. Through switch Sz circulates the difference between the load referred current (o ) and the magnetization current ih(t). Voltage between points B and A is D.E. Voltage over DgZ tends to bias it. Although there is circulating current due to the commutation on stage 6, current on Dg2 is neglectible. The magnetizing inductor (L,J delivers energy to the load. Capacitor C3 is charged. This stage ends when Sz is turned off with zero voltage. 8* stage (t7 - ts): Linear stage (Fig. 5.h) Current starts circulating through capacitors C1 and CZ. Capacitor C1 is linearly discharged, while Cz is charged at the same rate. This provides soft turn-off for Sz. Voltage vab(t) decreases linearly. This stage ends when voltage between A and B is null. 9* stage (ts- 6): Resonant stage (Fig. 5.9 When VAB(t) reaches zero the rectifier is short-circuited. The circuit is reduced to L, Lkr C,, Cz and the voltage /00/$10.00 (c) 2000 EEE 20 1

4 sources. Resonance among L, Llk, c1, cz takes place and the voltage over S1 reaches zero at the end of this stage. lo& stage - tlo): Energy recovery stage (Fig. 5.j) The energy remaining in the inductors and Llk is recovered to the source through diode D1, which current decreases linearly until it nulls, ending this stage. Switch S is enabled to be turned on in a softly way. ll& stage (tlo- td: Linear magnetization stage (Fig. 5.k) When current in the resonant inductor becomes positive S1 starts conducting. The voltage over L, and Llk is still (l-d)-e and the current on these inductors increases linearly until ih(t) reaches ih(t)-o' when the stage ends. 12" stage (til - tlz): Output rectifier transition stage pig. 5.1) The same effect explained on stage 6 takes place. At the end of stage 11 the rectifier diode D,1 is blocked and the voltage applied to the primary of the transformer tends to rise quickly. Diode Dgl clamps the voltage on point C at (l-d).e. C. Output characteristics As it can be noticed in the analysis of the stages of the converter, the inclusion of the clamping diodes does not affect considerably on the operation of the converter. Hence, it does not change the output characteristic of the converter. The DC gain of the converter (4) is defined by (V',, / E). Thus: Fig. 7 presents the DC gain as a function of the average voltage drop across the resonant inductor and the duty cycle. qt t AVE Fig. 7 -Output characteristics. V ya.lo'li [ b k 1.l.l. b k lll.1. Fig. 6 - Main waveforms for the converter. 4V7,i-g"i RFP~OJ M1 Ezy f-. sec EXPERMENTAL RESULTS n order to verify the proposed converter a prototype was built with the specifications presented below. The current mode control was employed in this topology, in order to ensure proper operation for telecommunication applications. The complete power stage diagram is shown in Fig. 8..nput voltage: 45OVk20V *Output voltage: 60V.Rated output current: 6A.Efficiency: greater than 90 % Commutation frequency: 8OkHz.Maximum duty cycle: 0.4 EE-SUP pnm.:sg.:20 turns lums X 30AWG 15 turns sec2.:20 turns - 28 X 30AWG 15Vll w 17'30AWG,---. T T 330nFl63OV Heatsinks: a Mi andmp:rth=4,83ocw(sk129) Dr1 and De : Rth = 4, W W (SKPB) Fig. 8 - Power stage diagram for the Half-Bridge asymmetrical converter with primary clamping /00/$10.00 (c) 2000 EEE 202

5 All waveforms are presented at rated load. The voltage between points A and B and the current on the resonant inductor are shown in Fig. 9. Current and voltage across the switches are presented in Fig. 10. TOk Frn lc"l5 < - F.i / " Fig Tum-off details of MOSFETs M and Mz. Fig. 9 -Voltage VAB and current in the resonant inductor. (loov/div-2ndiv - 2.5~ddiv) n order to compare the conventional RCD snubbers with the primary side clamping technique the clamping diodes were taken off from the prototype and RCD circuits were put over the rectifier diodes. The RCD circuit has the following parameters: Resistors - 220W3W and 100W3W; Capacitors - lnf/400v and ln5f/400v; Diodes - both 1N4936. The waveform presented in Fig. 13 (a) shows the voltage across Da, which is naturally higher if the duty cycle is limited to 0.5. n this figure the maximum voltage across Da is about 292V, that is too close to the voltage rating of the device (300V). t can also be noticed that high amplitude oscillations occur on the voltage. n Fig. 13 (b) it is shown the voltage across Da, with primary side clamping only. t can be easily noticed that the voltage is clamped with a maximum at about 223V. Oscillations are very reduced and occur in higher frequency disappearing quickly after commutation. Fig.10 - Currents and voltages in both switches. (loov/div - la/div - 2.5pddiv). t can be noticed that all commutations in both switches occur under zero voltage in Figs. 11 and 12. The turn-on on switch S2 it is more difficult, once transition between capacitors states have to be accomplished with less current across the resonant inductor and the difference of voltages is higher. Fig Voltage across Dn. (a) with RCD snubbers. (b) with primary side clamping diodes. n Fig. 14 it is shown the achieved efficiency for the prototype with the primary clamping. The efficiency at full load is at about 94.6%. A measure of the achieved efficiency without primary clamping and with RCD snnubers at rated load was at about 93.4%. Fig Tum-on details of MOSFETs M and Mz /00/$10.00 (c) 2000 EEE 203

6 REFERENCES Fig Achieved efficiency with primary side clamping. V. CONCLUSON n this paper a very simple clamping circuit for the ZVS- PWM Asymmetrical Half-Bridge DC-DC converter was presented. The employment of this clamping circuit reduces the oscillations caused by the reverse recovery of the output diodes, increasing the efficiency. A prototype was built in order to compare the results between the Half-Bridge converter with RCD snubber and with primary side clamping. An increase in the efficiency of the converter was obtained. A comparison of the effect of the primary side clamping circuit with the conventional RCD snubber was made, confirming better performance of the proposed circuit. The primary side clamping circuit can be extended to other DC-DC converter topologies, with great advantages over the conventional RCD snubbers. [l],. E. COLLNG &. BARB. Analysis and Design of a Zero- Voltage Switching PWM Asymmetrical Half-Bridge DC-DC Converter. n: COBEP95 Conference Records, Siio Paulo, pp [2] P. MBERTSON & N. MOHAN. Asymmetrical duty cycle permits zero switching loss in PWM circuits with no conduction loss penalty. n: EEE - AS ANN. MEETNG 91: Conference Records, vol. 1, pp [3] J.L.F. VERA &. BARB, Constant Frequency PWM Capacitor Voltage-Clamped Series Resonant Power Supply. BEE - Transactions on Power Electronics vol. 8, no. 2, 1993, pp [4] J. P. AGRAWAL, S. H. KM & C. Q. LEE. Capacitor Voltage Clamped Series Resonant Power Supply with mproved Cross Regulation. n: EEE - AS ANN. MEETNG 89: Conference Records, 1989, pp [5] J. A. SABATE et al. Design Considerations for high-voltage high power full-bridge zero-voltage-switched PWM converter. EEE - APEC 90 Conference Records, 1990, pp [6] R. REDL, N.O. SOW, L. BALOGH, A Novel Soft- Switching Full-Bridge DClDC Converter: Analysis, Design Considerations and Experimental Results at 1.5 kw, 100 khz, PESC W, pp /00/$10.00 (c) 2000 EEE 204