Dual-Output Charge Pump with Shutdown

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1 9-; Rev ; /9 Dual-Output Charge Pump with Shutdown General Description The CMOS, charge-pump, DC-DC voltage converter produces a positive and a negative output from a single positive input, and requires only four capacitors. The charge pump first doubles the input voltage, then inverts the doubled voltage. The input voltage ranges from +.V to +.V. The internal oscillator can be pin-programmed from khz to khz, allowing the quiescent current, capacitor size, and switching frequency to be optimized. The Ω output impedance permits useful output currents up to ma. The also has a µa logic-controlled shutdown. The comes in a -pin QSOP package that uses the same board area as a standard -pin SOIC. For more space-sensitive applications, the MAX is available in an -pin µmax package, which uses half the board area of the. Applications Low-Voltage GaAsFET Bias in Wireless Handsets VCO and GaAsFET Supply Split Supply from to Ni Cells or Li+ Cell Low-Cost Split Supply for Low-Voltage Data-Acquisition Systems Split Supply for Analog Circuitry LCD Panels Features Requires Only Four Capacitors Dual Outputs (Positive and Negative) Low Input Voltages: +.V to +.V µa Logic-Controlled Shutdown Selectable Frequencies Allow Optimization of Capacitor Size and Supply Current Ordering Information PART TEMP. RANGE C/D C to + C EEE - C to + C * Contact factory for dice specifications. P-PACKAGE Dice* QSOP Typical Operating Circuit Pin Configuration TOP VIEW V (+.V TO +.V) +V C- C+ C+ C+ C- C- C+ -V SHDN FC C- FC FC SHDN FC 9 QSOP V V V Maxim Integrated Products For free samples & the latest literature: or phone --99-

2 ABSOLUTE MAXIMUM RATGS to...-.v to +V SHDN, FC, FC to...-.v to ( +.V) to...-.v to +.V to...+.v to -V Output Current...mA Short Circuit to...indefinite Operating Temperature Range EEE...- C to + C Continuous Power Dissipation (T A = + C) QSOP (derate.mw/ C above + C)...9mW Storage Temperature Range... - C to + C Lead Temperature (soldering, sec)...+ C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (Note ) (V = V, SHDN = V, circuit of Figure, T A = T M to T MAX, unless otherwise noted. Typical values are at T A = + C.) PARAMETER SUPPLY Minimum Start-Up Voltage Maximum Supply Voltage Supply Current Shutdown Current Oscillator Frequency SYMBOL M TYP MAX R LOAD = kω T A = + C.. T A = T M to T MAX. R LOAD = kω. FC = FC =, f = khz.. FC =, FC =, f = khz.. FC =, FC =, f = khz FC = FC =, f = khz FC = FC = or, SHDN =. FC = FC = FC =, FC = FC =, FC = FC = FC = PUTS AND OUTPUTS Logic Input Low Voltage SHDN, FC, FC.. Logic Input High Voltage SHDN, FC, FC.. Logic Input Bias Current SHDN, FC = FC = or - to Shutdown Resistance I = ma to Shutdown Resistance I = ma T A = + C I = ma, I = ma Output Resistance T A = T M to T MAX (Note ) T A = + C = V, I = ma (forced) T A = T M to T MAX Voltage Conversion Efficiency, R L = 9 99, R L = 9 99 UNITS V V ma µa khz V V µa Ω Ω Ω % Note : Measured using the capacitor values in Table. Capacitor ESR contributes approximately % of the output impedance [ESR + / (pump frequency x capacitance)].

3 Typical Operating Characteristics (V =.V, capacitor values in Table, T A = + C, unless otherwise noted.) EFFICIENCY, (%) 9 EFFICIENCY vs. OUTPUT khz PUMP FREQUENCY V =.V C C = µf FC =, FC = V =.V OUTPUT CURRENT (ma) - EFFICIENCY, (%) 9 EFFICIENCY vs. OUTPUT khz PUMP FREQUENCY V =.V C C =.µf FC =, FC = OUTPUT CURRENT (ma) V =.V - EFFICIENCY, (%) EFFICIENCY vs. OUTPUT khz PUMP FREQUENCY V =.V V =.V C C =.µf FC =, FC = OUTPUT CURRENT (ma) - EFFICIENCY, (%) EFFICIENCY vs. OUTPUT khz PUMP FREQUENCY V =.V V =.V C C = µf FC =, FC = - OUTPUT RESISTANCE (Ω) OUTPUT RESISTANCE vs. SUPPLY VOLTAGE R OUT- R OUT+ FC =, FC = V) - OUTPUT RESISTANCE (Ω) 9 OUTPUT RESISTANCE vs. TEMPERATURE, V =.V, V =.V, V =.V, V =.V - OUTPUT CURRENT (ma) SUPPLY VOLTAGE (V) TEMPERATURE ( C) OUTPUT VOLTAGE (V) OUTPUT VOLTAGE vs. OUTPUT CURRENT BOTH AND LOADED EQUALLY LOADED OUTPUT CURRENT (ma) C C = µf V =.V FC = FC = (khz) LOADED LOADED LOADED - OUTPUT CURRENT FROM TO (ma) OUTPUT CURRENT vs. PUMP CAPACITANCE (V =.9V, + = V) f = khz f = khz f = khz C = C = C = C PUMP CAPACITANCE (µf) f = khz - OUTPUT CURRENT FROM TO (ma) 9 OUTPUT CURRENT vs. PUMP CAPACITANCE (V =.V, + = V) f = khz f = khz f = khz C = C = C = C PUMP CAPACITANCE (µf) f = khz -9

4 Typical Operating Characteristics (continued) (V =.V, capacitor values in Table, T A = + C, unless otherwise noted.) OUTPUT CURRENT FROM TO (ma) OUTPUT CURRENT vs. PUMP CAPACITANCE (V =.V, + = V) khz khz khz khz C = C = C = C PUMP CAPACITANCE (µf) - OUTPUT VOLTAGE RIPPLE (mvp-p) OUTPUT VOLTAGE RIPPLE vs. PUMP CAPACITANCE (V =.9V, + = V) C = C = C = C OUTPUT RIPPLE IS MEASURED FOR THE LOAD CURRENT DICATED THE "OUTPUT CURRENT vs. PUMP CAPACITANCE" GRAPH AT V =.9V. khz khz khz khz PUMP CAPACITANCE (µf) - OUTPUT VOLTAGE RIPPLE (mvp-p) OUTPUT VOLTAGE RIPPLE vs. PUMP CAPACITANCE (V =.V, + = V) C = C = C = C OUTPUT RIPPLE IS MEASURED FOR THE LOAD CURRENT DICATED THE "OUTPUT CURRENT vs. PUMP CAPACITANCE" khz GRAPH AT V =.V. khz khz khz PUMP CAPACITANCE (µf) - OUTPUT VOLTAGE RIPPLE (mvp-p) OUTPUT VOLTAGE RIPPLE vs. PUMP CAPACITANCE (V =.V, + = V) C = C = C = C OUTPUT RIPPLE IS MEASURED FOR THE LOAD CURRENT DICATED THE "OUTPUT CURRENT vs. PUMP CAPACITANCE" GRAPH AT V =.V. khz khz khz khz PUMP CAPACITANCE (µf) - SHUTDOWN SUPPLY CURRENT (na) SHUTDOWN SUPPLY CURRENT vs. SUPPLY VOLTAGE SUPPLY VOLTAGE (V) - SHUTDOWN SUPPLY CURRENT (µa) SHUTDOWN SUPPLY CURRENT vs. TEMPERATURE V =.V V =.V TEMPERATURE ( C) - SUPPLY CURRENT (ma) SUPPLY CURRENT vs. TEMPERATURE (V =.V) FC =, FC = FC =, FC = FC =, FC = FC =, FC = TEMPERATURE ( C) - SUPPLY CURRENT (ma) SUPPLY CURRENT vs. TEMPERATURE (V = V) FC =, FC = FC =, FC = FC =, FC = FC =, FC = TEMPERATURE ( C) - PUMP FREQUENCY (khz) PUMP FREQUENCY vs. TEMPERATURE FC =, FC = FC =, FC = FC =, FC = FC =, FC = TEMPERATURE ( C) -

5 Typical Operating Characteristics (continued) (V =.V, capacitor values in Table, T A = + C, unless otherwise noted.) +V TIME TO EXIT SHUTDOWN -9 V +V FC = FC = (khz), C C = µf V FC = FC = (khz), C C = µf -V ms/div Pin Description P NAME FUNCTION C- C+ Negative Terminal of the Flying Boost Capacitor Positive Terminal of the Flying Inverting Capacitor V CC, C- SHDN FC FC Ground (connect pins and together) Negative Terminal of the Flying Inverting Capacitor Output of the Inverting Charge Pump Active-Low Shutdown Input. With SHDN low, the part is in shutdown mode and its supply current is less than µa. In shutdown mode, connects to through a Ω switch, and connects to through a Ω switch. Frequency Select, MSB (see Table ) Frequency Select, LSB (see Table ) C +V C C- C+ C- SHDN FC FC C+ 9 C C I L+ I L- OUT R L+ R L- 9,,, No Connect no internal connection. Connect these to ground to improve thermal dissipation. Positive Power-Supply Input SEE TABLE FOR CAPACITOR VALUES. OUT Output of the Boost Charge Pump C+ Positive Terminal of the Flying Boost Capacitor Figure. Test Circuit

6 Detailed Description The requires only four external capacitors to implement a voltage doubler/inverter. These may be ceramic or polarized capacitors (electrolytic or tantalum) with values ranging from.µf to µf. Figure a illustrates the ideal operation of the positive voltage doubler. The on-chip oscillator generates a % duty-cycle clock signal. During the first half cycle, switches S and S open, switches S and S close, and capacitor C charges to the input voltage (V). During the second half cycle, switches S and S open, switches S and S close, and capacitor C is level shifted upward by V volts. Assuming ideal switches and no load on C, charge transfers into C from C such that the voltage on C will be V, generating the positive supply output (). Figure b illustrates the ideal operation of the negative converter. The switches of the negative converter are out of phase from the positive converter. During the second half cycle, switches S and S open, and switches S and S close, charging C from (pumped up to V by the positive charge pump) to. In the first half of the clock cycle, switches S and S open, switches S and S close, and the charge on capacitor C transfers to C, generating the negative supply. The eight switches are CMOS power MOSFETs. Switches S, S, S, and S are P-channel devices, while switches S, S, S, and S are N-channel devices. Charge-Pump Frequency and Capacitor Selection The offers four different charge-pump frequencies. To select a desired frequency, define pins FC and FC as shown in Table. Lower charge-pump frequencies produce lower average supply currents, while higher charge-pump frequencies require smaller capacitors. Table also lists the recommended charge-pump capacitor values for each pump frequency. Using values larger than those recommended will have little effect on the output current. Using values smaller than those recommended will reduce the available output current and increase the output ripple. To cut the output ripple in half, double the values of C and C. To maintain the lowest output resistance, use capacitors with low effective series resistance (ESR). At each switching frequency, the charge-pump output resistance is a function of C, C, C, and C s ESR. Minimizing the charge-pump capacitors ESR minimizes output resistance. Use ceramic capacitors for best results. Table. Frequency Selection FC FC FREQUENCY (khz) CAPACITORS C C (µf).. a) b) S C+ S S C+ S S C S C I L + R L + S C C- C- S C I L - R L - Figure. Idealized Voltage Quadrupler: a) Positive Charge Pump; b) Negative Charge Pump

7 Charge-Pump Output The is not a voltage regulator: the output source resistance of either charge pump is approximately Ω at room temperature (with V = V); and and approach +V and -V, respectively, when lightly loaded. Both and will droop toward as the current draw from either or increases, since is derived from. Treating each converter separately, the droop of the negative supply (VDROOP-) is the product of the current draw from (I) and the source resistance of the negative converter (RS-): V = I x RS - DROOP- The droop of the positive supply (VDROOP+) is the product of the current draw from the positive supply (ILOAD+) and the source resistance of the positive converter (RS+), where ILOAD+ is the combination of IVand the external load on (I): V = I x RS+ = I + I x RS+ DROOP+ LOAD+ Determine and as follows: ( ) = V - VDROOP+ = ( - V DROOP) = -(V - VDROOP+ - V DROOP-) The output resistances for the positive and negative charge pumps are tested and specified separately. The positive charge pump is tested with unloaded. The negative charge pump is tested with supplied from an external source, isolating the negative charge pump. Current draw from either or is supplied by the reservoir capacitor alone during one half cycle of the clock. Calculate the resulting ripple voltage on either output as follows: V RIPPLE = I LOAD ( / f PUMP) ( / C RESERVOIR) where ILOAD is the load on either or. For example, with an fpump of khz and.µf reservoir capacitors, the ripple is mv when ILOAD is ma. Remember that, in most applications, the total load on is the load current (I) and the current taken by the negative charge pump (I). Shutdown The features a shutdown mode that reduces the maximum supply current to µa over temperature. The SHDN pin is an active-low TTL logic-level input. If the shutdown feature is unused, connect SHDN to. In shutdown mode, connects to through a Ω switch and connects to through a Ω switch. Efficiency Considerations Theoretically, a charge-pump voltage multiplier can approach % efficiency under the following conditions: The charge-pump switches have virtually no offset, and extremely low on-resistance. The drive circuitry consumes minimal power. The impedances of the reservoir and pump capacitors are negligible. For the, the energy loss per clock cycle is the sum of the energy loss in the positive and negative converters, as follows: LOSS CYCLE = LOSS POS + LOSSNEG = C ( ) ( ) ( V) + C V V ( + ) ( ) where and are the actual measured output voltages. The average power loss is simply: Resulting in an efficiency of: P LOSS = LOSS CYCLE x fpump ( ) η= Total Output Power / Total Output Power P LOSS There will be a substantial voltage difference between ( - V ) and V for the positive pump, and between and if the impedances of the pump capacitors (C and C) are large with respect to their respective output loads. Larger reservoir capacitor (C and C) values will reduce output ripple. Larger values of both pump and reservoir capacitors will improve efficiency.

8 Applications Information Positive and Negative Converter The most common application of the is as a dual charge-pump voltage converter that provides positive and negative outputs of two times a positive input voltage for biasing analog circuitry (Figure ). Select a charge-pump frequency high enough so it does not interfere with other circuitry, but low enough to maintain low supply current. See Table for the correct device configuration. Paralleling Devices Paralleling multiple s reduces the output resistance of both the positive and negative converters (Figure ). The effective output resistance is the output resistance of one device divided by the total number of devices. Separate C and C charge-pump capacitors are required for each, but the reservoir capacitors C and C can be shared. V (+.V TO +.V) C SEE TABLE C C- C+ C- SHDN FC FC C+ 9 C C + x V - x V Figure. Positive and Negative Converter

9 V.µF.µF C- C- OUT.µF C+ C- C+.µF C+ C- C+.µF V.µF OUT Figure. Paralleling Two s Heavy Output Current Loads When under heavy loads, where is sourcing current into (i.e., load current flows from to, rather than from supply to ground), do not allow the supply to pull above ground. In applications where large currents flow from to, use a Schottky diode (N) between and, with the anode connected to (Figure ). Layout and Grounding Good layout is important, primarily for good noise performance. To ensure good layout, mount all components as close together as possible, keep traces short to minimize parasitic inductance and capacitance, and use a ground plane. Connecting all pins to a ground plane improves thermal dissipation. Figure. High Load Circuit 9

10 Chip Topography C+ C- C+." (.mm) C- SHDN FC FC." (.mm) TRANSISTOR COUNT: SUBSTRATE CONNECTED TO

11 Dual-Output Charge Pump with Shutdown Package Information DIM A A A B C D E e H h L N S α M MAX M MAX CHES MILLIMETERS -A QSOP QUARTER SMALL-OUTLE PACKAGE DIM D S D S D S D S M MAX M MAX CHES MILLIMETERS PS L α H A E E D e A A C B S N h x SEE VARIATIONS SEE VARIATIONS SEE VARIATIONS. BSC. BSC

12 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, San Gabriel Drive, Sunnyvale, CA 9 () - 99 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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