Controlling Active Load Pull in a Dual-Input Inverse Load Modulated Doherty Architecture

Transcription

1 Controlling Active Load Pull in a Dual-Input Inverse Load Modulated Doherty Architecture Thomas M. Hone, Souheil Bensmida, Member, IEEE, Kevin A. Morris, Mark A. Beach, Member, IEEE, Joe P. McGeehan, Jonathan Lees, Johannes Benedikt, and Paul J. Tasker, Senior Member, IEEE Abstract Mathematical analysis of Doherty ampli ers have assumed many simpli cations. Most notably, the peaking ampli er does not contribute power into the load and the peaking stage has an observed impedance of in nity. This paper will show that these simpli cations impair the performance of a single-input Doherty ampli er and that phase tuning for compensation is needed to improve the overall system performance. The dual-input Doherty ampli er is capable of overcoming the limitations of power-dependent phase imbalance and phase compensation lines at the input of the peaking stage; however, the characterization of such an architecture is not straightforward. A new measurement technique is proposed to measure dc current, dc voltage, and output power levels to allow unique characterization of a dual-input Doherty ampli er. Phase compensation lines at the input of the peaking ampli er will be shown to be not required, as long as correct offset lines are calculated for both the carrier and peaking stage and that the transmission-line length is not necessarily required for active load pull. Results of a dual-input inverse load modulated Doherty ampli er are presented where the peaking stage delivers 10 db less of maximum output power than the carrier, while still maintaining Doherty behavior. The peaking stage can therefore be implemented with a smaller device than the carrier. Index Terms Active load pull, dual-input Doherty ampli er, inverse load modulation. I. INTRODUCTION T HE ef ciency performance of an ampli er at any output power back-off level is important when amplifying signals with large peak-to-average power ratios (PAPRs), such that a high average ef ciency can be achieved [1]. Long-term evolution (LTE) utilizes the orthogonal frequency division multiplexing (OFDM) modulation scheme, where the PAPR of an LTE signal can be more than 10 db depending on the bandwidth the signal occupies and on the superposition of the sub-carriers [2]. To ensure that such a signal is ef ciently ampli ed, ampli- ers are designed and incorporated as part of an ef ciency enhancing architecture where the ef ciency performance at output Manuscript received September 30, 2011; revised February 14, 2012; accepted February 21, Date of publication April 12, 2012; date of current version May 25, This work was supported by the Engineering and Physical Sciences Research Council (EPSRC) under Grant EP/F033370/1 and Grant EP/F033702/1. T.M.Hone,S.Bensmida,K.A.Morris,M.A.Beach,andJ.P.McGeehan are with the Centre for Communications Research, University of Bristol, Bristol BS8 1UB, U.K. ( Thomas.Hone@bristol.ac.uk). J. Lees, J. Benedikt, and P. J. Tasker are with the High Frequency Centre, Cardiff School of Engineering, Cardiff CF24 3AA, U.K. ( LeesJ2@cardiff.ac.uk). Color versions of one or more of the gures in this paper are available at Digital Object Identi er /TMTT power back-off is dramatically improved compared to a singlestage ampli er [3]. Active load modulated architectures are one of three different types of ef ciency enhancing schemes. The Doherty ampli er is currently a popular active load modulated architecture and achieves this performance by using a quarter-wavelength transmission-line impedance-transformation network [4]. The Doherty ampli er has been extensively mathematically analyzed for ef ciency [5], behavior modeling and generalized equations for Doherty designs [6], [7]. However, these ideal mathematical equations do not include the impact of the knee voltage. They also assume that the peaking stage does not deliver power into the load and that the observed impedance of the peaking ampli er is in nity. When applying these ideal design equations to transistor-based implementations, it becomes apparent that they do not match the physical performance of the Doherty ampli er. It has been shown in [8] that the knee voltage affects the value of the load line required for a speci c output power back-off level and they have included their observations into the ideal mathematical Doherty design equations. The ndings from [9] con rm that the observed impedance of a transistor is not in nity, causing output power to leak through the peaking stage if it is not taken into consideration. The modern Doherty ampli er has been tuned such that these practical limitations can be overcome. The bias condition for the peaking ampli er can reduce the amount of power that is wasted through leakage [10] and is typically biased in class C. However, a class C bias condition reduces the maximum output power of the peaking stage compared to the carrier stage, which is conventionally biased in class AB/B. This creates an output power ratio misalignment such that under saturated active load pull occurs. Asymmetrical designs [11], uneven power splitting at the input [12], and uneven power drive with power matching [13] have been proposed to solve this problem. The asymmetrical designs require a larger device for the peaking stage, which is not always viable. The single-input Doherty ampli er using a power divider also suffers from power-dependent phase imbalance between the carrier and peaking stages resulting in suboptimal performance. By varying the gate voltage at both the carrier and peaking ampli er, it is possible to rematch the Doherty con- guration as close as possible to the correct load lines [14]. An alternative means of resolving the power-dependent phase imbalance is to split the input of the carrier and peaking stages such that they are independent of each other [15]. By applying phase control to one of the inputs, the power-dependent phase imbalance can be overcome.

2 Fig. 1. Simpli ed model of a classical Doherty ampli er, 50- load transformed into an intermediate 25- load using a quarter-wavelength transmission line. These extensive optimizations have made the Doherty ampli- er very unforgiving toward bad design, where the calculation of a bad phase-offset line can impair the ef ciency performance of the architecture. This paper will present the impact of the peaking ampli er injecting power into the common load, the importance of the offset lines in active load pull, and that the transmission line length is not necessarily required for active load pull. A generic method of extracting the required input waveforms will be shown for a dual-input Doherty architecture with no phase compensation delay lines at the input. Finally, the results of a dual-input inverse load modulated Doherty ampli- er using the proposed measurement technique will be shown where the carrier and peaking stage maximum output power is 39.5 and 30 dbm, respectively, a 10-dB difference, allowing for a smaller peaking stage with respect to the carrier. The peaking ampli er therefore does not contribute power into the load at low output power levels. II. ACTIVE LOAD MODULATION Fig. 1 shows a simpli ed model of a classical Doherty ampli er consisting of two ampli ers, the carrier and peaking ampli ers, with a 50- characteristic impedance transmission line situated between the two stages. A characteristic impedance transmission line is used to transform a load, typically 50, into a 25- load. The carrier and peaking ampli- er deliver the currents and, respectively, where the current is the transformed current caused by the transmission line. The impedance is determined by the parallel combination of the transformed load impedance, 25, and the apparent impedance of the peaking ampli er. For this analysis, it is assumed that the peaking stage has an apparent impedance of, and thus is 25. This is an assumption and its effect will be explored and explained in greater detail in Section III. The impedance is the transformed impedance of about the origin of the Smith chart determined by (1), where is the characteristic impedance of the line. In a classical Doherty design, as shown in Fig. 1, when the peaking stage is switched off, the impedance presented to the carrier stage is 100 (1) (2) Fig. 2. Simulated voltages (circle) and (square) of a classical unsymmetrical Doherty ampli er. To achieve active load pull, the voltage across impedance has to be controlled such that (2) is obeyed. is regarded as constant, voltage is determined by the output of the carrier ampli er and should remain constant if the correct value of is presented. By varying voltage, which is bound between and V, the impedance presented to the carrier ampli er can be controlled from 50 to 100. Equation (2) assumes that the peaking stage only controls the voltage across. The peaking ampli er achieves this in reality by contributing power into. This means that the voltage, across, is capable of going above the drain supply voltage of the carrier ampli er because two in-phase signals with maximum equal voltage swing can superimpose on each other. This in turn means that the voltage is also capable of exceeding the drain supply voltage of the carrier. A simulation of a classical unsymmetrical Doherty ampli er with 12-dB dynamic output power was designed using a junction eld-effect transistor (JFET) model both for the carrier and peaking stages using Agilent s Advanced Design System (ADS), where a classical unsymmetrical Doherty ampli er is de ned by a single common input, which is split equally using a lossless splitter to drive the carrier and peaking ampli er. The carrier and peaking stages are biased in class B and C, respectively, and the peaking stage current density is twice that of the carrier, making it unsymmetrical. Fig. 2 shows the voltages (circle) and (square) of the simulated circuit. From 21 to 32 dbm of output power level, increases approximately linearly with the input drive of the carrier. The peaking stage, which is biased in deep class C, does not conduct within this region of operation. From 32- to 45-dBm output power, active load pull occurs and as expected, voltage is kept constant. The peaking ampli er conducts in this region and delivers power into the load to enable the active load pull phenomena. Equation (2) is valid until a maximum output power of 41 dbm. Above this power level, the peaking stage does not only load pull the load line for the main stage, but also contributes signi cantly to the overall output power because of the in-phase superposition. This is in accordance with

3 Fig. 3. Measurements from 850 to 950 MHz of observed output impedances of two ampli ers biased from deep AB to class C. Fig. 4. Photograph of the inverse-load modulated Doherty ampli er. what has been reported in [16] and contributes to incorrect active load modulation. The maximum output power of this architecture is the maximum output power of the carrier stage plus 3 db as classical Doherty theory states that the carrier and peaking ampli er stages must be equal in size. The extra 3 db is not always obtained due to the power leakage through the peaking stage since its impedance is not necessarily. To minimize the power that is leaked through the peaking ampli- er, a quasi-open circuit condition is required. III. QUASI-OPEN CIRCUIT If the peaking ampli er is incorrectly combined together with the carrier ampli er in a Doherty con guration, current may leak through the peaking stage. This results in a reduction of maximum obtainable output power and system ef ciency. This is caused because there is no isolation provided by the transmission line situated between the carrier and peaking ampli er stages. From the carrier stage perspective, the impedance presented by the peaking stage is in parallel with a 50- load, as seen in Fig. 1. Simple linear circuit theory states that current from the carrier will split depending on the values of the two parallel loads. To maximize the current into the 50- load, and thus maximize power transfer into the load, the impedance of the peaking stage must be, which cannot be achieved in reality. The observed impedance of a biased ampli er with no RF input is dependent on the bias condition and the output matching network. Fig. 3 shows the measured observed impedances from 850 to 950 MHz of two different fully matched GaN HEMT (CREE CGH40010) ampli ers with varying gate bias levels. The gate voltage of both ampli ers was varied such that the quiescent drain current was varied from deep AB ( ma) to class C with a drain supply voltage of 28 V. The measurements were taken by connecting a vector network analyzer directly to the output terminal of the fully matched ampli ers and measuring the re ection coef cient. Class B and C bias conditions produce impedances near the edge of the Smith chart and are therefore the most suitable classes of operation for the peaking ampli er. By driving into deep class C, the impedance cannot be moved closer to the edge of the Smith chart. The design of the output matching network can impact the observed impedance of an ampli er in magnitude and phase. Fig. 3 shows that the second GaN HEMT ampli er is more sensitive towards frequency, but produces a similar magnitude response as the rst ampli er. The magnitude response is similar because identical devices are used for both ampli- ers. The frequency sensitivity is caused by the design of the output matching network of the two ampli ers. The rst ampli er uses a broadband fundamental matching network, which has no stubs, where the design is similar to the ampli er reported in [17]. The second ampli er, presented in [18], uses a complex harmonically designed matching network, which uses stubs. Although this network presents the correct required impedances for its class of operation, it inherently exhibits a large frequency dependence in terms of scattering parameters. Fig. 4 presents a photograph of the two ampli ers combined together in an inverse-load modulated architecture. The observed impedance of an ampli er can be transformed toward the real axis by using an offset line [19]. If the transformation is done toward a perfect open, a quasi-open circuit condition can be achieved, as shown in Fig. 5. This is done by using a T-junction made from a transmission line and several SMA adaptors. By experimentally adding or removing SMA adaptors, the offset length can be tuned. The T-junction consists of three different branch lengths such that a greater selection of adaptor and T-junction combinations can be implemented. The maximum impedances that can be obtained are 560 and 670 at 900 MHz for ampli er 1 and 2, respectively, both biased in class C. The second ampli er will be used throughout this paper as the peaking stage, while the rst ampli er will be used for the carrier stage. The quasi-open circuit offset line length for the peaking stage is determined when the GaN HEMT is biased with no RF input. When the carrier ampli er is turned on, the observed impedance of the carrier ampli er transforms away from the quasi-open circuit, as shown in Fig. 5 using triangle markers. The channel becomes the equivalent of an open, which is transformed toward a complex value due to the parasitic power dependent elements within the transistor

4 Fig. 6. Inverse-load modulated combining structure. Fig. 5. Quasi-open circuit measurements of ampli er 1 (circle) and ampli er 2 (square). Simulated results of how the quasi-open circuit of ampli er 1 (triangle) is affected when driven with an RF signal. package and die, such as the nonlinear [20]. This explains the power-dependent phase misalignment between the carrier and peaking stage at different output powers. The impedance becomes complex because the complex observed impedance of the peaking stage combines in parallel with a purely real load. The peaking ampli er must inject the appropriate conjugate phase component to ensure that the complex part of is cancelled out such that the transformation of the impedance remains purely real, as dictated by (2). A dual-input Doherty design is capable of achieving this without the need for an uneven input power design and complex phase compensation at the input of the peaking ampli er. A simulation of a fully matched GaN HEMT (CREE CGH40010 model) shows the quasi-open circuit shifting away from the original measured quasi-open circuit point when driving a transistor, as seen in Fig. 5. It has been shown in [21] that a 50- characteristic impedance transmission line and a 50- load, where the static load line is 50, can produce identical Doherty behavior as a 50- characteristic impedance transmission line with a 25- load, where the static load line is 100. This inverse-load modulated combining structure requires less current and thus less power to achieve optimal active load pull, allowing for the use of a smaller peaking ampli er compared to the carrier ampli er. This would be bene cial for base stations, where power consumption and availability of a larger peaking ampli er are problematic, and handsets, where power consumption is important. The decrease in the magnitude of the observed impedance when an ampli er begins to conduct can be taken advantage off in an inverse load modulated combining network. The decreasing value of will transform toward an increasing value of, which aids the active load pull requirements for an inverse-load modulated architecture. IV. EXPERIMENTAL SETUP Two harmonically tuned ampli ers biased in class B (1-mA quiescent current ) and C (0-mA quiescent current ) for the carrier and peaking stage, respectively, are combined Fig. 7. Impedances presented to the carrier ampli er (circle) and peaking ampli er (square) from 850 to 950 MHz. The markers are placed at 900 MHz. together using two offset lines with a common 50- load, an inverse load modulated combiner, as shown in Fig. 6. The drain voltage terminals of the carrier and peaking stage are biased at 28 V and are connected together such that the system current could be measured for any given carrier input, allowing for the calculation of the system ef ciency. The offset lengths and are determined such that both the carrier and peaking ampli ers see as close as possible to 50 when both ampli ers are biased with no RF input, as shown in Fig. 7, where the measurements are taken from 850 to 950 MHz. At 900 MHz, the carrier (circle) and peaking (square) are presented with 49 and 45, respectively. This prevents any mismatch for the static load line case and ensures maximum power transfer from both the carrier and peaking ampli ers into the load. In this con guration, the transmission line length is not important as long as the starting conditions of the carrier and peaking ampli er are met as stated above. The carrier offset line will both act as a quasi-open circuit enabler and a complex impedance transformation network, where the transformation depends on the length. The complete measurement set up is shown in Fig. 8. The carrier ampli er (PA1) is driven by a repeatable envelope signal scanning its entire input dynamic range. During every envelope period, a driving signal with a speci c combination of magnitude and phase is applied to the input of the peaking ampli er (PA2). This presents a set of load lines to both the carrier and peaking ampli er stages. By sweeping the magnitude and phase

5 Fig. 8. Measurement setup. of the peaking ampli er input signal, the entire Smith chart is scanned, presenting all possible impedances on the Smith chart to the carrier ampli er and all corresponding reverse load pull impedances to the peaking ampli er. To calculate the dc power consumption, and are measured using the high-frequency oscilloscope (LeCroy 6100 A) and the current probe (Tektronix TCP300), respectively. The drain terminals of the carrier and peaking stage are connected together such that the system and are measured. The RF output power is calculated using the vector signal analyzer (VSA Rhode & Schwartz FSQ) to capture the output waveform, which is normalized to its mean value. It is then multiplied by the average output power measured using a power probe at the output of the combiner. A similar procedure is used to calculate the input power level of the carrier stage, where the input waveform is extracted from the arbitrary signal generator (ARB Rhode & Schwartz SMATE 200 A) at baseband. This allows for the calculation of instantaneous drain ef ciency for any dual-input Doherty ampli er. The input of the peaking ampli er is also extracted at baseband from the arbitrary signal generator and its magnitude is normalized. This measurement set up allows for faster and realistic environment characterization of any dual-input Doherty ampli er unlike continuous wave (CW) measurements, which are more time consuming and tedious. V. MEASUREMENT RESULTS Fig. 9 shows all instantaneous drain ef ciencies for any given output power at 900 MHz. A maximum drain ef ciency of 65% is achieved with a drain ef ciency of 48% at 6-dB output power back-off. From the complete data set, Fig. 9, where every possible combination of carrier and peaking output power combines together and performs active load pull, Fig. 10 is produced by extracting the maximum points for any given output power level by using a script for post processing on the complete data set. In order to highlight the usefulness of the proposed characterization procedure, the two dual drive inputs have been driven with the same signal in order to simulate a single input classical architecture, and the resulting ef ciency (square markers) is shown in Fig. 10. This implies that optimizing an inverse-load modulated Doherty architecture requires independent dual drive inputs. The complex input envelope of the peaking ampli er that corresponds to the ef ciency pro le shown in Fig. 10 can at this Fig. 9. Active load pull measurement results for all possible carrier and peaking ampli ers output power combinations. Fig. 10. Maximum drain ef ciency pro le from complete data set (circle). Drain ef ciency pro le while the structure is in a single input con guration (square). stage be easily extracted. In other words, the relationship between the carrier ampli er driving signal and the peaking ampli- er driving signal that optimizes ef ciency is extracted. Fig. 11 shows this complex function in terms of magnitude and phase. It was expected that the peaking stage ought to switch off when reaching the maximum output power of the carrier ampli- er because the static load line is close to 50, as discussed in Section IV. Instead the peaking stage is injecting power into the combining network causing a more optimal load line condition for maximum drain ef ciency at saturation. This could have only been obtained by using a dual-input architecture and a generic characterization measurement setup. Although one may argue that the use of two signal generators and two drivers increases the complexity of the Doherty architecture. It provides immunity to imperfect offset line calculations at the input, greater exibility, and recon gurability. Fig. 12 represents the corresponding amplitude modulation-to-amplitude modulation (AM AM) and amplitude modulation-to-phase modulation (AM PM) response while the structure is driven to exhibit the maximum ef ciency depicted in Fig. 10. In order to estimate the linearity performance of the

6 Fig. 11. Magnitude (circle) and phase (star) relationship between the carrier ampli er driving signal and peaking ampli er driving signal for maximum drain ef ciency. Fig. 13. Simulated linearity performance using a 1.4-MHz 3GPP LTE signal. in [1]. By rearranging the equation, (3) can be obtained, where and are the transformed carrier current, the peaking current, the load impedance and the parallel impedance of the load and peaking ampli er, respectively, as discussed in Section II, Fig. 1. In classical active load modulation, is 25, while in inverse active load modulation, is 50, assuming that the and requirements [6], [7] for inverse and classical load modulation are identical. will be smaller for inverse than classical load modulation (3) Fig. 12. AM AM (circle) and AM PM (star) response while the architecture is driven to exhibit the maximum ef ciency. structure, a memoryless behavioral model is extracted from the AM AM and AM PM response. A narrowband modulated signal (1.4-MHz 3GPP LTE signal) is applied to the extracted behavioral model and the spectrum regrowth of its output signal is shown in Fig. 13. This gives an idea on the linearity of the structure while the ef ciency is the criteria of optimization. The static load condition of 50 seen by both the carrier and peaking ampli er allow for easy assessment of the maximum power each stage injects into the load. When the peaking ampli er is biased with no RF input signal, the carrier ampli er delivers 39.5 dbm of power into the load when it is driven with 27.6 dbm. When the carrier ampli er is biased with no RF input signal, the peaking ampli er delivers 30 dbm of power into the load when it is driven with 16.4 dbm. The peaking ampli er can therefore be implemented using a smaller device with respect to the carrier. This observation can be explained using the equation that explains active load pull using a generator model, as presented Although the ef ciency performance of a dual-input drive classical Doherty ampli er reported in [15] is better, one can stress that the results reported in this paper are produced using an unoptimized structure. The losses caused by biasing the ampli ers out of their designed speci cation and the losses induced by using SMA adaptors and a T-junction impair the overall ef- ciency performance of the architecture. The back-off performance is further impaired by using a 10-W peaking ampli er, when only 1 W of power is required to be delivered by the peaking stage to actively inverse-load modulate a 10-W carrier ampli er. VI. CONCLUSION A generic Doherty characterization measurement system has been presented where any dual-input Doherty ampli er can be characterized without the need of input compensation lines. This simpli es the design procedure of Doherty ampli ers and allows forgreater exibilityindesign.fromthetotalmeasurementresult set, any value of drain ef ciency can be extracted with its corresponding input requirements for both the carrier and peaking ampli er. The maximum drain ef ciency results have been shown in this paper with a dual-input inverse load modulated Doherty at 900 MHz. By using an inverse load modulated combining architecture, it has been shown that a smaller peaking stage, 10-dB lessmaximumoutputpower,iscapableofachievingidenticaldoherty behaviorand thattheelectricallengthsfortheinitialstarting conditions for the carrier and peaking stage are more important

7 than incorporating a transmission line. This further simpli- es the ampli er design by making the calculation of the characteristic impedance of the transmission line for a speci c back-off performance obsolete. ACKNOWLEDGMENT The authors would like to thank the Engineering and Physical Sciences Research Council (EPSRC) for their support by funding thiswork,whichhasbeencarriedoutaspartoftheholisticdesign of Power Ampli ers for Future Wireless Systems Project. The authors would also like to thank K. Mimis, University of Bristol, Bristol, U.K., and V. Carrubba, Cardiff University, Cardiff,U.K., for the use of their ampli ers within this work. REFERENCES [1] S. C. Cripps, RF Power Ampli ers for Wireless Communications, 2nd ed. Boston, MA: Artech House, [2] S. H. Han and J. H. Lee, An overview of peak-to-average power ratio reduction techniques for multicarrier transmission, IEEE Wireless Commun., vol. 12, no. 2, pp , Apr [3] P. B. Kenington, High-Linearity RF Ampli er Design. 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Kim, Optimum design for linearity and ef ciency of a microwave Doherty ampli er using a new load matching technique, Microw. J., vol. 44, no. 12, pp , Dec [20] J. Moon, J. Kim, and B. Kim, Investigation of a class-j power ampli- er with a nonlinear cout for optimized operation, IEEE Trans. Microw. Theory Tech., vol. 58, no. 11, pp , Nov [21] T. Hone, S. BenSmida, M. Paynter, K. Morris, M. Beach, J. McGeehan, J. Lees, J. Benedikt, and P. Tasker, Optimized load modulation in a Doherty ampli er using a current injection technique, in Proc. Eur. Microw. Conf., 2011, pp Thomas M. Hone received the M.Eng. degree in electrical and electronic engineering with management from the University of Bristol, Bristol, U.K., in 2009, and is currently working toward the Ph.D. degree at the University of Bristol. His research interest is in ef ciency-enhancing architectures for wideband and high PAPR signals and eld-programmable gate array (FPGA) implementations of high throughput signal processing. Souheil Bensmida (M 07) received the D.E.A. degree in electronics and instrumentation from the University of Pierre and Marie Curie Paris 6, Paris, France, in 2000, and the Ph.D. degree in electronics and communications from the Ecole Nationale Supérieure des Télécommunications (ENST), Paris, France, in From October 2006 to September 2008, he was a Post Doctoral Fellow with the iradio Laboratory, University of Calgary, Calgary, AB. Canada. He is currently a Research Associate with the University of Bristol, Bristol, U.K. His research interest is the nonlinear characterization and linearization of power ampli ers for mobile and satellite applications and microwave instrumentation. Kevin A. Morris received the B.Eng. and Ph.D. degrees in electronics and communications engineering from the University of Bristol, Bristol, U.K., in 1995 and 1999, respectively. In 1998, he became a Research Associate with the CCR, University of Bristol, a Lecturer in RF engineering in 2001, and Senior Lecturer in August He is currently involved with a number of research programes within the U.K. He is the principle investigator on a ve-year collaborative Engineering and Physical Sciences Research Council (EPSRC) project between the University of Cardiff and University of Bristol. The aim of this project is the rigorous design of ef cient power ampli ers for use in future communications systems. He also leads a three-year industrially funded project in the area of ef cient linear ampli cation design. He has authored or coauthored 37 academic papers. He coholds ve patents. His research interests are principally in looking at methods of reducing power consumption in communications systems including the area of RF hardware design with speci c interest in the design of ef cient linear broadband power ampli ers for use within future communications systems. Mark A. Beach (A 90 M 06) received the Ph.D. degree for research addressing the application of smart antennas to global positioning systems (GPSs) from the University of Bristol, Bristol, U.K., in He subsequently joined the University of Bristol, as a Member of Academic Staff. He was promoted to Senior Lecturer in 1996, Reader in 1998, and Professor in 2003, and from 2006 to 2010, was the Head of the Department of Electrical and Electronic Engineering. His research interests include the application of multiple antenna technology to enhance the performance of wireless systems, with particular emphasis on spatio-temporal aspects of the channel, as well as enabling RF technologies for green radio.

8 Joe P. McGeehan received the Ph.D. and D.Eng. degrees in electrical and electronic engineering from the University of Liverpool, Liverpool, U.K., in 1971 and 2003, respectively. He is currently the Director of the Centre for Communications Research, University of Bristol, and Senior General Advisor of the Telecommunications Research Laboratory, Toshiba. Since 1973, he has researched spectrum-ef cient mobile-radio communication systems and has pioneered work in many areas including linearized power ampli ers, WCDMA (3G), and smart antennas. Dr. McGeehan is a Fellow of the Royal Academy of Engineering. He has served on numerous international committees and was advisor to the U.K. s rst DTI/MOD Defense Spectrum Review Committee in the late 1970s. He was the recipient of a CBE in 2004 for services to the communications industry. In 2004, he was listed as one of the world s top technology agenda setters by silicon.com (USA). He was corecipient of the IEEE Vehicular Technology Transactions Neal Shepherd Memorial Award for his work on SMART antennas and the Proceeding of the IEE Mountbatten Premium for work on satellite-tracking. Jonathan Lees received the B.Eng. degree in electronic engineering from Swansea University, Swansea, U.K., in 1992, and the M.Sc. and Ph.D. degrees from Cardiff University, Cardiff, U.K., in 2001 and 2006, respectively. From 1992 to 2002, he developed global positioning systems and advanced optical instrumentation tracking systems with QinetiQ. He is currently a Lecturer with the Centre for High Frequency Engineering, Cardiff University. His research concerns PA design, load pull, and large-signal measurement systems. Dr. Lees is a Charted Engineer in the U.K. Johannes Benedikt received the Dipl.-Ing. degree from the University of Ulm, Ulm, Germany, in 1997, and the Ph.D. degree from Cardiff University, Cardiff, U.K., in During this time, he was also a Senior Research Associate with Cardiff University, beginning in October 2000, where he supervised a research program with Nokia on RF power ampli ers (RFPAs). In December 2003, he became a Lecturer with Cardiff University, where he was responsible for furthering research in the high-frequency area. In April 2010, he became a Professor with Cardiff University, and is the Chief Technical Of cer (CTO) of the successful University spin-off company Mesuro. His main research focus is on development of systems for the measurement and engineering of RF current and voltage waveforms and their application in complex PA design. Paul J. Tasker (M 88 SM 07) received the B.Sc. degree in physics and electronics and the Ph.D. degree in electronic engineering from Leeds University, Leeds, U.K., in 1979 and 1983 respectively. From 1984 to 1990, he was a Research Associate with Cornell University, Ithaca, NY, where he was involved in the early development of the heterostructure eld-effect transistors (HFETs). From 1990 to 1995, he was a Senior Researcher and Manager with the Fraunhofer Institute for Applied Solid State Physics (IAF), Freiburg, Germany, where he was responsible for the development of millimeter-wave monolithic microwave integrated circuits (MMICs). In the summer of 1995, he joined the School of Engineering, Cardiff University, Cardiff, U.K., as a Professor, where he has established the Cardiff University and Agilent Technology Centre for High Frequency Engineering. The center s research objective is to pioneer the development and application of RF-IV waveform and engineering systems with a particular focus on addressing the PA design problem. He has authored or coauthored over 200 journal and conference publications. Prof. Tasker was an IEEE Distinguished Microwave Lecturer ( ). He has given a number of invited conference workshop presentations.