NCV ma Low Dropout Linear Regulator
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- Nigel Webb
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1 ma Low Dropout Linear Regulator The NCV4264 is a wide input range, precision 3.3 V and 5. V fixed output, low dropout integrated voltage regulator with a full load current rating of ma. The output voltage is accurate within 2.%, and maximum dropout voltage is 5 mv at ma load current. It is internally protected against 45 V input transients, input supply reversal, output overcurrent faults, and excess die temperature. No external components are required to enable these features. Features 3.3 V and 5. V Fixed Output 2.% Output Accuracy, Over Full Temperature Range Quiescent Current 4 ma ati OUT =.ma 5 mv Maximum Dropout Voltage at ma Load Current Wide Input Voltage Operating Range of 4.5 V to 45 V Internal Fault Protection 42 V Reverse Voltage Short Circuit/Overcurrent Thermal Overload AECQ Qualified NCV Prefix for Automotive and Other Applications Requiring Site and Change Controls These are PbFree Devices TAB A L Y W x G SOT 223 ST SUFFIX CASE 38E SO 8 D SUFFIX CASE 75 = Assembly Location = Wafer Lot = Year = Work Week = 3 = 5 (5. V Version) = Pb Free Package MARKING DIAGRAMS 8 AYW V64_xG G (Note: Microdot may be in either location) V4264x ALYW G PIN CONNECTIONS GND V IN GND V OUT SOT 223 (Top View) V out NC NC GND 8 SO 8 (Top View) V in NC NC NC ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page of this data sheet. Semiconductor Components Industries, LLC, 2 June, 2 Rev. 3 Publication Order Number: NCV4264/D
2 IN OUT.3 V Reference + Error Amp Thermal Shutdown GND PIN FUNCTION DESCRIPTION Pin No. SOT 223 Figure. Block Diagram Pin No. SO 8 Symbol Function 8 V IN Unregulated input voltage; 4.5 V to 45 V. 2 4 GND Ground; substrate. 3 V OUT Regulated output voltage; collector of the internal PNP pass transistor. TAB GND Ground; substrate and best thermal connection to the die. 2,3,5,6,7 NC Not Connected MAXIMUM RATINGS Rating Symbol Min Max Unit V IN, DC Input Voltage V IN V V OUT, DC Voltage V OUT.3 +6 V Storage Temperature T stg _C Moisture Sensitivity Level SOT 223 SO 8 MSL 3 ESD Capability, Human Body Model (Note ) V ESDHB 4 V ESD Capability, Machine Model (Note ) V ESDMIM 2 V Lead Temperature Soldering Reflow (SMD Styles Only), Lead Free (Note 2) T sld 265 pk Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.. This device series incorporates ESD protection and is tested by the following methods: ESD HBM tested per AEC Q 2 (EIA/JESD22 A 4C) ESD MM tested per AEC Q 3 (EIA/JESD22 A 5C) 2. Lead Free, 6 sec 5 sec above 27_C, 4 sec max at peak. OPERATING RANGE Pin Symbol, Parameter Symbol Min Max Unit V IN, DC Input Operating Voltage V IN V Junction Temperature Operating Range T J 4 +5 _C _C 2
3 THERMAL RESISTANCE Parameter Symbol Min Max Unit Junction to Ambient SOT 223 R θja 99 (Note 3) C/W Junction to Case SOT 223 R θjc 7 Junction to Ambient SO 8 R θja 62 (Note 3) C/W Junction to Lead2 SO 8 Ψ JL oz., mm 2 copper area. ELECTRICAL CHARACTERISTICS (V IN = 3.5 V, Tj = 4_C to +5_C, unless otherwise noted.) Characteristic Symbol Test Conditions Min Typ Max Unit Output Voltage 5. V Version Output Voltage 3.3 V Version V OUT 5. ma IOUT ma (Note 4) 6. V V IN 28 V V OUT 5. ma IOUT ma (Note 4) 4.5 V V IN 28 V V V Line Regulation 5. V Version ΔV OUT vs. V IN I OUT =5.mA 6. V V IN 28 V mv Line Regulation 3.3 V Version ΔV OUT vs. V IN I OUT =5.mA 4.5 V V IN 28 V mv Load Regulation ΔV OUT vs. I OUT 5. ma I OUT ma (Note 4) mv Dropout Voltage 5. V Version Dropout Voltage 3.3 V Version V IN V OUT I OUT = ma (Notes 4 & 5) mv V IN V OUT I OUT = ma (Notes 4 & 7).266 V Quiescent Current I q I OUT =.ma 4 ma Active Ground Current I G(ON) I OUT = ma (Note 4) 4 5 ma Power Supply Rejection PSRR V RIPPLE =.5V PP, F = Hz 67 db Output Capacitor for Stability 5. V Version C OUT ESR I OUT =. ma to ma (Note 4) 9. mf Ω Output Capacitor for Stability 3.3 V Version C OUT ESR I OUT =. ma to ma (Note 4) 22 6 mf Ω PROTECTION Current Limit I OUT(LIM) V OUT = 4.5 V (5. V Version) (Note 4) V OUT = 3. V (Note 4) ma Short Circuit Current Limit I OUT(SC) V OUT =V(Note4) 4 5 ma Thermal Shutdown Threshold T TSD (Note 6) 5 2 _C 4. Use pulse loading to limit power dissipation. 5. Dropout voltage = (V IN V OUT ), measured when the output voltage has dropped mv relative to the nominal value obtained with V IN = 3.5 V. 6. Not tested in production. Limits are guaranteed by design. 7. V DO =V IN V OUT. For output voltage set to < 4.5 V, V DO will be constrained by the minimum input voltage. 3
4 V Input I I V in V out I Q Output C I mf nf 2 C OUT mf, 5. V Version 22 mf, 3.3 V Version R L GND Figure 2. Measurement Circuit V Input V in V out Output C in nf 2 C OUT mf, 5. V Version 22 mf, 3.3 V Version GND Figure 3. Applications Circuit TYPICAL CHARACTERISTIC CURVES 5 V Version 9 Unstable Region C ESR (Ω) Stable Region V in = 3.5 V C out mf DROPOUT VOLTAGE (V) C 4 C OUTPUT CURRENT (ma) Figure 4. ESR Characterization OUTPUT LOAD (ma) Figure 5. Dropout Voltage vs. Output Load 4
5 8 4 CURRENT CONSUMPTION (ma) R L =5Ω R L = Ω 4 5 CURRENT CONSUMPTION (ma) C 5 25 C 4 C 2 INPUT VOLTAGE (V) OUTPUT CURRENT (ma) Figure 6. Current Consumption vs. Input Voltage(5VVersion) Figure 7. Current Consumption vs. Output Current QUIESCENT CURRENT (ma) C 25 C 4 C 5 2 OUTPUT VOLTAGE (V) OUTPUT LOAD (ma) TEMPERATURE ( C) Figure 8. Quiescent Current vs. Output Load Figure 9. Output Voltage vs. Temperature 5
6 TYPICAL CHARACTERISTIC CURVES 5 V Version 8 6. OUTPUT CURRENT (ma) T A = 25 C 3 T A =25 C 4 5 OUTPUT VOLTAGE (V) R L =5Ω 8. INPUT VOLTAGE (V) INPUT VOLTAGE (V) Figure. Output Current vs. Input Voltage Figure. Input Voltage vs. Output Voltage OUTPUT VOLTAGE (V) T A = 25 C, R L = T A =4 C, R L = T A =25 C, R L = T A = 25 C, R L = T A =25 C, R L = + V IN 3 NCV mf mf V OUT R L.7 T A =4 C, R L = INPUT VOLTAGE (V) 5 MEASUREMENT CIRCUIT Figure 2. Reverse Voltage Characteristics 6
7 TYPICAL CHARACTERISTIC CURVES 3.3 V Version 2 Unstable Region 8 ESR (Ω) 5 5 Stable Region C out 22 mf V in = 3.5 V 2 5 OUTPUT CURRENT (ma) OUTPUT CURRENT (ma) INPUT VOLTAGE (V) Figure 3. ESR Stability vs. Output Current Figure 4. Output Current vs. Input Voltage QUIESCENT CURRENT (ma) R L =5Ω R L = Ω QUIESCENT CURRENT (ma) C C 4 C 5 INPUT VOLTAGE (V) OUTPUT CURRENT (ma) Figure 5. Input Voltage vs. Quiescent Current Figure 6. Quiescent Current vs. Output Current OUTPUT VOLTAGE (V) TEMPERATURE ( C) 25 Figure 7. Output Voltage vs. Temperature 5 75 I out =5mA 5 QUIESCENT CURRENT (ma) TEMPERATURE ( C) Figure 8. Quiescent Current vs. Temperature 75 V in = 3.5 V I out =5mA
8 TYPICAL CHARACTERISTIC CURVES 3.3 V Version MAG (db) I out =5mA V in = 3.5 V T A =25 C C out =22mF MAG (db) I out = 5 ma V in = 3.5 V T A =25 C C out =22mF k k k k k k Figure 9. Power Supply Rejection Ratio Figure 2. Power Supply Rejection Ratio 8
9 Circuit Description The NCV4264 is a precision trimmed 5. V and 3.3 V fixed output regulator. The device has current capability of ma, with 5 mv of dropout voltage at ma of current. The regulation is provided by a PNP pass transistor controlled by an error amplifier with a bandgap reference. The regulator is protected by both current limit and short circuit protection. Thermal shutdown occurs above 5 C to protect the IC during overloads and extreme ambient temperatures. Regulator The error amplifier compares the reference voltage to a sample of the output voltage (V out ) and drives the base of a PNP series pass transistor by a buffer. The reference is a bandgap design to give it a temperature stable output. Saturation control of the PNP is a function of the load current and input voltage. Over saturation of the output power device is prevented, and quiescent current in the ground pin is minimized. Regulator Stability Considerations The input capacitor C IN in Figure 2 is necessary for compensating input line reactance. Possible oscillations caused by input inductance and input capacitance can be damped by using a resistor of approximately Ω in series with C IN2. The output or compensation capacitor, C OUT helps determine three main characteristics of a linear regulator: startup delay, load transient response and loop stability. The capacitor value and type should be based on cost, availability, size and temperature constraints. Tantalum, aluminum electrolytic, film, or ceramic capacitors are all acceptable solutions, however, attention must be paid to ESR constraints. The aluminum electrolytic capacitor is the least expensive solution, but, if the circuit operates at low temperatures (25 Cto4 C), both the value and ESR of the capacitor will vary considerably. The capacitor manufacturer s data sheet usually provides this information. The value for the output capacitor C OUT shown in Figure 2 should work for most applications; however, it is not necessarily the optimized solution. Stability is guaranteed at values of C Q mf, with an ESR 9 Ω for the 5. V Version, and C Q 22 mf with an ESR 6 Ω for the 3.3 V Version within the operating temperature range. Actual limits are shown in a graph in the Typical Performance Characteristics section. Calculating Power Dissipation in a Single Output Linear Regulator The maximum power dissipation for a single output regulator (Figure 3) is: PD(max) = [VIN(max) VOUT(min)] (eq. ) IQ(max) + VI(max) Iq Where: V IN(max) is the maximum input voltage, V OUT(min) is the minimum output voltage, I Q(max) is the maximum output current for the application, and I q is the quiescent current the regulator consumes at I Q(max). Once the value of P D(Max) is known, the maximum permissible value of R θja can be calculated: PθJA = 5o C TA (eq. 2) PD The value of R θja can then be compared with those in the package section of the data sheet. Those packages with R θja s less than the calculated value in Equation 2 will keep the die temperature below 5 C. In some cases, none of the packages will be sufficient to dissipate the heat generated by the IC, and an external heat sink will be required. The current flow and voltages are shown in the Measurement Circuit Diagram. Heat Sinks A heat sink effectively increases the surface area of the package to improve the flow of heat away from the IC and into the surrounding air. Each material in the heat flow path between the IC and the outside environment will have a thermal resistance. Like series electrical resistances, these resistances are summed to determine the value of R θja : RθJA = RθJC + RθCS + RθSA (eq. 3) Where: R θjc = the junctiontocase thermal resistance, R θcs = the casetoheat sink thermal resistance, and R θsa = the heat sinktoambient thermal resistance. R θja appears in the package section of the data sheet. Like R θja, it too is a function of package type. R θcs and R θsa are functions of the package type, heat sink and the interface between them. These values appear in data sheets of heat sink manufacturers. Thermal, mounting, and heat sinking are discussed in the ON Semiconductor application note AN4/D, available on the ON Semiconductor Website. 9
10 6 θja ( C/W) SO 8 SOT COPPER AREA (mm 2 ) Figure 2. SO 8 R(t) ( C/W) SOT ORDERING INFORMATION PULSETIME(sec) Figure 22. Device Marking Package Shipping NCV4264ST5T3G V64_5 SOT / Tape & Reel NCV4264ST33T3G V64_3 SOT / Tape & Reel NCV4264D5R2G V42645 SO 8 25 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8/D.
11 PACKAGE DIMENSIONS SOT 223 (TO 26) CASE 38E4 ISSUE M D b NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, CONTROLLING DIMENSION: INCH..8 (3) H E e A e b E A θ L C MILLIMETERS INCHES DIM MIN NOM MAX MIN NOM MAX A A b b c D E e e L H E θ SOLDERING FOOTPRINT SCALE 6: mm inches
12 PACKAGE DIMENSIONS SOIC 8 NB CASE 757 ISSUE AJ Y B X 8 A 5 4 S.25 (.) M Y M K NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION.5 (.6) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE.27 (.5) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION THRU 75 6 ARE OBSOLETE. NEW STANDARD IS Z H G D C.25 (.) M Z Y S X S SEATING PLANE. (.4) N X45_ M J MILLIMETERS INCHES DIM MIN MAX MIN MAX A B C D G.27 BSC.5 BSC H J K M _ 8 8 _ N S SOLDERING FOOTPRINT* SCALE 6: mm inches *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 563, Denver, Colorado 827 USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your loca Sales Representative NCV4264/D
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