A Synchronized Two-Phase Sinewave Generator for AC Metrology System Compensations

Transcription

1 320 IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 49, NO. 2, APRIL 2000 A Synchronized Two-Phase Sinewave Generator for AC Metrology System Compensations Luca Callegaro and Vincenzo D Elia Abstract A slave audio two-phase sinewave generator, which can be directly synchronized to a master generator, is described here. It can be used in ac metrology setups to provide additional compensation signals, traditionally derived with expensive multidecade inductive voltage divider networks. The generator is based on two direct digital synthesis (DDS) chips, programmed via the parallel printer PC interface; their clock is provided by a phase-locked loop circuit, which ensures frequency and phase synchronization of the DDS outputs with the master generator. The synchronization reference signal can be provided via an optical link reference channel, which avoids interference and ground loops. In its present implementation, the output voltage is V peak = 10 V, frequency range 500 Hz 4 khz. Total harmonic distortion is contained to 065 db, and amplitude stability is better than 500 V/V over 24 h. Index Terms AC generators, compensation, electric measurements, phase-locked loops, signal generators. I. INTRODUCTION HIGH-ACCURACY bridges and setups for impedance measurements are traditionally based on a complex network of passive devices, such as impedance standards, transformers, and inductive voltage dividers, energized by a single sinewave generator [1]. The amplitude and phase relationships among the network signals can be extremely stable, since they are determined by the passive component values and characteristics. The final accuracy of the measurements is better than In the last few years, however, a different approach to impedance measurement has become popular in high-accuracy systems: the use of multiple direct digital synthesis (DDS) generators [2], [3] synchronized by a common clock. Here, amplitude relationships among network signals are determined by dc standards, and their phase relationships are determined by programming the digital delays (clock counters). The accuracy of the measurement is directly related to the quality of the generators, and is now at the level [4], [5], with an enormous increase in automation and speed of measurement with respect to passive bridges. Hybrid systems can be conceived where DDS synchronized generators are used for injection of compensation signals into the passive network. Such small voltage and current generators set the definition conditions for the standards employed (for example, four-terminal pair conditions for immittances [6]), re- Manuscript received May 26, 1999; revised December 1, The authors are with Istituto Elettrotecnico Nazionale Galileo Ferraris, Torino, Italy ( lcallega@ien.it). Publisher Item Identifier S (00) Fig. 1. Typical application of the slave generator. A is the master generator supplying the metrologic network B; C is the slave two-phase generator, controlled by personal computer PC, which feeds a compensation network N (manual or automatic). cover cable voltage drops due to the capacitance and contact resistance, unload ratio transformers, etc. The small compensation signals require less demanding absolute characteristics (amplitude and phase stability, distortion, noise) than the main signals of the measurement network. A problem arises when one wants to apply DDS solutions to existing measurement systems: the DDS added generator has to be synchronized with the main generator, which usually does not accept an external clock or triggering. The circuit presented here is a two-phase DDS sinewave generator. It works in the audio range. It is based on two DDS single-chip generators providing 10-bit digital-to-analog converter outputs, with 12-bit phase resolution between the outputs. It can be directly synchronized to an existing main generator SYNC transistor transistor logic (TTL) output, either by coaxial cable or, even better, via an optical fiber link interface, which offers extreme isolation and avoids ground loop problems. The generator is programmed using a PC and its parallel printer interface. If continuous reprogramming is not required, the parallel printer cable can be disconnected after the power-on and setup. In the present version, the frequency range is 500 Hz 4 khz; the output voltage span is 10 V peak full range; amplitude stability is better than 500 V/V over 24 h; and distortion is 065 db. These characteristics can be easily modified or improved depending on the application. II. WORKING PRINCIPLE Fig. 1 shows the basic application: A is the sinusoidal master generator, whose OUT output excites (EXC) the metrological system B; its digital synchronization output SYNC is carried to /00$ IEEE

2 CALLEGARO AND D ELIA: SYNCHRONIZED TWO-PHASE SINEWAVE GENERATOR 321 Fig. 2. Block scheme of the internal structure of the generator. the slave generator C with a fiber optic interface or a standard coax cable. The slave generator C senses the SYNC output and produces two sinewave outputs Ph and Qd. Output Ph is in phase with SYNC; output Qd has the same frequency of Ph and can be shifted in phase over 360. Both outputs have a variable amplitude. In the application proposed, Ph and Qd are in quadrature and feed a combining network N, which creates a compensation voltage or current injected (COMP) into the metrological system B. An example of automated compensation is shown in [7]. Generator C parameters are controlled, via parallel printer interface, from a personal computer PC. Fig. 2 shows the internal structure of the generator. The square wave SYNC signal at frequency f is received via either optical fiber interface or coax input, and drives one input of the PLL phase-locked loop phase detector. The phase detector, via a low-pass filter L.P., drives through fcontrol a voltage-controlled oscillator VCO, whose output out is a square wave at frequency n f. The VCO output is used as clock CK for both DDS generators DDS-Ph and DDS-Qd, which create at their out outputs two sinewaves at frequency f (each constructed with n steps). The sinewaves are amplified with two ac-coupled amplifiers Ph amp and Qd amp and give outputs Ph out and Qd out. To maintain frequency and phase relationships between the SYNC signal and the Ph out, the latter is transformed again into a digital signal by the zero-crossing comparator Comp and fed back to the phase detector of the PLL. Whenever the SYNC signal is applied (or changed), the phase detector output of the PLL adjusts the VCO frequency until the Ph out has the same frequency and phase as the SYNC. Fig. 3. An application of the synchronized generator: definition of impedance standards Z s and Z x as four-terminal pair standards in an impedance comparison system. The synchronization condition is checked with an Unlocked LED lamp, which turns on if the SYNC input is absent or its frequency is outside the capture range of the PLL. Both DDS chips are controlled with a parallel interface PC parallel port LPT1, which sets the amplitude, frequency, and phase registers using a very simple ANSI C program. III. IMPLEMENTATION An implementation of the working principle shown in Fig. 2 has been developed for an input frequency range of 500 Hz 4 khz. The implementation was designed to work in an impedance comparison system [8], particularly suited for a resistance-inductance comparison at the level. A simplified schematic of the comparison system is shown in Fig. 3. The main generator G (a two-phase Clarke Hess Model 5500) supplies the four-terminal pair impedances Zs (standard) and Z x (unknown) in series. The slave generator Gc is synchronized to G with an optical fiber link. The outputs of Gc, ph,

3 322 IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 49, NO. 2, APRIL 2000 Fig. 4. Electrical schematic of the generator. and qd feed two automatic synchronous compensations [7] Cs and Cx, which continuously measure the low-terminal pair voltages Usl and Uxl of Z s and Z x and inject compensation voltages through two feedthrough transformers to keep U sl and U xl near zero. The complex ratio between high-terminal pair voltages U x=u s (measured with equipment not shown in Fig. 3) is then equal to Zx=Zs. A complete schematic diagram of the implementation of the synchronized generator is reported in Fig. 4, which should be followed keeping in mind the block scheme of Fig. 2.

4 CALLEGARO AND D ELIA: SYNCHRONIZED TWO-PHASE SINEWAVE GENERATOR 323 The sync signal is received via optical receiver or SYNC input. A clean reference signal is produced by the comparator U1B and fed to the first PLL input U2. In an unlocked condition, U3 drives the unlocked LED. The PLL generates a high-frequency clock (n 2 f out) and directly drives the CLK pin of both DDS generators U4 and U5. Their current outputs IOUT are converted into voltage signals Ph and Qd by R15/R18 and fed in to two equal ac-coupled amplifiers U6 and U7, whose outputs Ph out and Qd out are the external outputs of the generator. A detailed schematic of U6/7 is also reported in the figure. The output Ph out is converted into a square wave by comparator U1A (input ZC and output COMP SYNC) and fed back to the PLL, which adjusts its output frequency until the phase lock condition is achieved. Since the phase-lock signal is derived from the final in-phase output of the generator, the phase relation between Ph out and SYNC is independent of the bandwidth of the amplifier U6. Very small adjustments can be made with POT3. The phase relation between the Ph out and Qd out, moreover, is not controlled and is completely dependent on the settings of the phase register of U5 and can be modified by residual phase shift differences of U6 and U7 amplifiers. In fact, however, no errors above the rad level have been detected. Amplitude relationships between outputs can be adjusted with POT2/4. The registers of U4 and U5 are programmed with the aid of a PC running a short C program, which drives the parallel printer interface, buffered with latches U8 and U9. The TTL to CMOS level adjustment is performed by resistive dividers R4/5, R10/11, R23/24, and R32/33. U1C is a power-on reset circuit for U4 and U5. IV. RESULTS Tests of the generator have been conducted using a commercial synthesized generator as source for the SYNC signal. With appropriate programming of the DDS, the locking condition in the frequency range 500 Hz 4 KHz is obtained almost immediately. With a single setting of the DDS, a frequency variation of 630% can be followed while maintaining the locking condition. The amplitude stability has been measured with a high-precision Fluke 5790a ac voltmeter and for both outputs is below 500 V/V over 24 h. The total harmonic distortion and noise have been measured with a Hewlett-Packard 4333A distortion analyzer and are below 065 db for both outputs. A power spectrum of the output, measured with a Hewlett-Packard A spectrum analyzer, shows (Fig. 5) that the harmonic distortion is essentially due to a third harmonic at 069 db below the fundamental. Phase accuracy measurements have not been conducted, since the implementation is not optimized for this quantity; errors above a few parts in a thousand, however, are excluded by visual observations and measurements with the EG&G 7265 digital signal-processing lock-in amplifier. Initial tests on an actual metrological setup [7], [8] confirmed the effectiveness of compensation signals obtained from the generator synchronized to the main setup source. Fig. 5. Output power spectrum of the generator when locked to a 1 khz sync signal. A is the output sinewave, B the third harmonic, C is the fourth, and D is the fifth. Peak widths are due to the 100-Hz spectrum analyzer window. Actual widths are extremely small in this scale. Vertical scale is 10 db/div; thus the third harmonic (the strongest) is around 069 db with respect to the fundamental. ACKNOWLEDGMENT The authors would like to thank A. Godone of IEN for the power spectrum measurements of Fig. 5. REFERENCES [1] B. P. Kibble and G. H. Rayner, Coaxial AC Bridges. Bristol, U.K.: Adam Hilger, [2] W. Helbach and H. Schollmeyer, Impedance measuring methods based on multiple digital generators, IEEE Trans. Instrum. Meas., vol. IM-36, p. 400, [3] D. Tarach and G. Trenkler, High-accuracy N-port impedance measurement by means of modular digital AC compensators, IEEE Trans. Instrum. Meas., vol. 42, p. 622, [4] F. Cabiati and U. Pogliano, High-accuracy two-phase digital generator with automatic ratio and phase control, IEEE Trans. Instrum. Meas., vol. IM-36, p. 411, [5] A. Muciek, Digital impedance bridge based on a two-phase generator, IEEE Trans. Instrum. Meas., vol. 46, p. 467, [6] R. D. Cutkosky, Four-terminal-pair networks as precision admittance and impedance standards, IEEE Commun. Electron., vol. CE-83, p. 19, [7] L. Callegaro and V. D Elia, Automatic compensation technique for AC metrology based on synchronous filtering, Rev. Sci. Instrum., vol. 69, no. 12, p. 4238, [8] F. Cabiati, L. Callegaro, A. Muciek, G. C. Bosco, and V. D Elia, Impedance measurement by an improved three-voltage method, in Dig. IMEKO TC-4, Glasgow, U.K., Sept. 8-9, 1997, pp Luca Callegaro was born in Venice, Italy, in He received the degree in electronic engineering and the Ph.D. degree in physics from the Politecnico di Milano, Milano, Italy, in 1992 and 1996, respectively. His work then focused on thin-film magnetism. In 1996, he joined the Electrical Metrology Department, Istituto Elettrotecnico Nazionale Galileo Ferraris (IEN), Torino, Italy, where he works on precision ac measurements of impedances and the development of thin-film devices for electrical metrology. Dr. Callegaro is a member of the Scientific Council of IEN.

5 324 IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 49, NO. 2, APRIL 2000 Vincenzo D Elia was born in Torino, Italy, in He received the high school degree in electronics in After working in a telecommunication company in 1996, he joined the Electrical Metrology Department, Istituto Elettrotecnico Nazionale Galileo Ferraris, Torino. He is currently involved in impedance and ac dc transfer measurements.