UNIVERSITY of PENNSYLVANIA DEPARTMENT OF ELECTRICAL AND SYSTEMS ENGINEERING ESE Undergraduate Labs Electrical Circuits and Systems II Laboratory

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1 UNIVERSITY of PENNSYLVANIA DEPARTMENT OF ELECTRICAL AND SYSTEMS ENGINEERING ESE Undergraduate Labs Electrical Circuits and Systems II Laboratory Overview Analog-to-Digital (ADC) and Digital-to-Analog (DAC) Converter Goals Background Pre-lab assignment In-lab assignment Goals: To design and build a simple Analog-to-Digital (ADC) and Digital-to-Analog (DAC) converter using OpAmp circuits and resistors. You will apply Thévenin's theorem to analyze an R-2R ladder network. This is a 2 week lab. In first week, you are expected to finish building ADC as shown in Figure 7. In week 2 you will build DAC and connect ADC to DAC. You will compare the input signal to the reconstructed output signal. 1/9

Background: Digital-to-Analog converters (DACs) and Analog-to-Digital converters (ADC) are important building blocks which interface sensors (e.g. temperature, pressure, light, sound, cruising speed of a car) to digital systems such as microcontrollers or PCs.

2 Background: Digital-to-Analog converters (DACs) and Analog-to-Digital converters (ADC) are important building blocks which interface sensors (e.g. temperature, pressure, light, sound, cruising speed of a car) to digital systems such as microcontrollers or PCs. An ADC takes an analog signal and converts it into a binary one, while a DAC converts a binary signal into an analog value. Figure 1 gives a block diagram of such a system. An example of such a system is a PC sound card. Figure 1: Digital processing system with an ADC at the input and a DAC at the output Sensor signals vary continuously ("analog") between a specified voltage range. As an example, the output of a microphone gives a voltage between 0 (no speech) to 100mV (for loud speech). Any value between these two extremes are possible. The "analog" signal needs to be converted into a "digital" word of n-bits in order to be read into and processed by a computer (or digital signal processor - DSP). The "analog" and "digital" signals are shown in Figure 1. Analog-to-Digital Converter An ADC takes an analog input and generates a digital output as shown in Figure 2a. The more bits the output word has the better the resolution. For a 3-bit ADC, the number of steps will be 8 while a 10-bit ADC will divide the analog signal up 2/9

into 1024 (=2 10 ) steps. The input-output relationship of an ADC is shown in Figure 2b for a 3-bit converter.

the ADC as a function of the analog input. The maximum analog signal the ADC can accomodate is called the Full Scale (FS) as is shown in Fig. 2b.

5/8xFS, the new digital output code will be (101).

3 into 1024 (=2 10 ) steps. The input-output relationship of an ADC is shown in Figure 2b for a 3-bit converter. Notice that when the analog input signal (on the horizontal axis) reaches a certain level, a new digital code will be generated (see vertical axis in Figure 2b) which represents the digital output of the ADC as a function of the analog input. The maximum analog signal the ADC can accomodate is called the Full Scale (FS) as is shown in Fig. 2b. As an example, if the analog input is equal to 4/8xFS (Full Scale), the output code for the example of Figure 2b will be (100). However, if one increases the magnitude of the input signal above 4.5/8xFS, the new digital output code will be (101). Digital-to-Analog Converter: Figure 2: (a) ADC; (b) input-output characterisitic of an Analog-to-Digital Converter The input to a DAC is a binary word of n-bits and the output is an analog value, as schematically shown in Figure 3a. Figure 3: (a) DAC block diagram; (b) input-output characteristic of a DAC The n-bit word (or digital code) is a digital representation of a signal. The relationship between the analog output value and the binary word is for the case of a 3-bit code (b 2,b 1,b o ), as follows: V DAC = K 1 (b 2 /2 + b 1 /4 + b o /8) V ref V DAC =(b 2 /2 + b 1 /4 + b o /8) FS in which K 1 is a scale factor, V ref is a reference voltage, FS stands for Full Scale (=K 1 xv ref ) and b i is the ith bit of the digital word. The bit b o is called the least significant bit (LSB) and b 3 is the most significant bit (MSB). Each time the LSB changes the analog output will change by a value equal to FS/2 3 for a three bit DAC (or by FS/2 N for a N bit DAC). As an example, lets assume that the digital input is equal to (101), K 1 = 1 and the reference V ref = 5V. The output voltage will 3/9

then be: V DAC = K(1/2 + 0/4 +1/8) V ref = 5/8xV ref = 5/8xFS = 3.

Notice that only discrete values of the output signal are possible. The more bits the input word has, the smaller the steps of the output signal will be (or the better the resolution).

4 then be: V DAC = K(1/2 + 0/4 +1/8) V ref = 5/8xV ref = 5/8xFS = V For each digital input (b 2,b 1,b o ) there will be a corresponding output as shown in Figure 3b for a total of 2 3 = 8 possible digital words. Notice that only discrete values of the output signal are possible. The more bits the input word has, the smaller the steps of the output signal will be (or the better the resolution). Typical ADCs have at least 8 bits of resolution and even 12 to 16 bits are not uncommon. In order to keep the lab managable we will limit ourselves to building a simple 3-bit DAC and ADC. For more bits, one can extend the same principle by using more components. The scheme used in the lab to build these convereters is only one of many possible designs. For higher resolution converters more sophisticated architectures are used. You will learn more about this in other classes. Pre-lab assignment: DAC: 1. A practical circuit to implement a DAC converter is a R-2R ladder network, as shown in Figure 4a. Figure 4: (a) R-2R ladder network; (b) Thévenin's equivalent network Do a detailed circuit analysis in your notebook to show that the Thévenin's equivalent resistance and voltage, as shown in Figure 4b, is equal to: R T = R and V T = (V 2 /2+ V 1 /4 + V o /8) You can use the superposition principle to find Thévenin's equivalent voltage. 2. Assume that the voltages in the circuit of Fig. 4 can be either 0 or 5V, what is the smallest increment of the output voltage V out in the previous circuit of Fig. 4 (for one increment in binary number), i.e. the value of 1 LSB (as defined in Figure 3b)? 3. Design an OpAmp interface circuit whose input connects to the output of the R-2R ladder network so that each increment in the binary number produces 1V (or a -1V) increase (decrease) in output voltage V DAC (e.g. a (001) 2 gives a 1V output, a (011) 2 gives a 3V, while a (111) 2 gives a 7V output). Give the circuit and the calculations to find the resistor values. 4. In your lab notebook, calculate the expected analog output voltage (at the output of the OpAmp circuit) for each of the binary words of Table I Table 1 4/9

b2 b1 b0 VDAC (calc.) (Volt) Vout (meas.) (Volt) 0 0 0... 0 0 1... 0 1 0... 0 1 1... 1 0 0... 1 0 1... 1 1 0... 1 1 1 % diff. 5.

5 b2 b1 b0 VDAC (calc.) (Volt) Vout (meas.) (Volt) % diff. 5. Draw a diagram similar to the one of Figure 3b in your lab notebook, using the calculated values for V DAC. ADC: 6. Figure 5 shows a circuit that implements an Analog-to-Digital Converter (ADC). This circuit takes an analog signal and gives a digital ouput. Figure 5: Flash Analog-to-Digital Converter The circuit consists of 4 comparators whose inverting inputs are connected to a voltage divider. A comparator is basically an operational amplifer used without feedback. The outputs of the comparators in Figure 5 correspond to a digital word. When the input rises above V N1, the first comparator will switch to a high output voltage causing the LED to light up, indicating a (0001). For larger input voltages the output of other comparators will switch high as well. For large input voltages (above V n3 ) all comparators will be high corresponding to (1111) digital output. Thus the comparators encode the 5/9

6 analog input as a digital word on a thermometer scale. All comparators work in parallel which makes this ADC very fast. For that reason it is called a Flash Converter. Notice that a 1 kohm resistor has been added between the power supply and the output of the comparators. This has been done to ensure that the output voltage of the comparators is high enough (the comparators have an open collector - don't worry what that means at this point). Calculate and record in your notebook the values of V ni when each comparator will switch. In-lab assignment: A. Equipment: 1. Digital multimeter (HP34401A) 2. Triple output programmable power supply (HP E3631A): 5V, -5V 3. Protoboard 4. Blue box with cables and connectors 5. Resistors: 1kOhm, 3kOhm 6. Potentiometer 7. Ten LEDs 8. Quad Comparator LM 339 (quad=four devices in one package) B. Procedure ADC Build the flash ADC as shown in Figure 7. Use two LM339 comparators (specs) and a priority encoder (specs) for building the circuit. LM339 is a quad comparator that needs pull-up resistors to enable output voltages (what are pull-up resistors? ). 6/9

7 Figure 6: Pin-out of the priority encoder and LM339 Quad Comparator 7/9

8 Figure 7 : Design - Flash ADC using LM339 and Priority Encoder. (video)click here to open file in new window (for printing). Note the voltages and value of resistors required to build the ciruit. Vary the input voltage using a potentiometer R9 and make Vref=4V. Record the values of the input voltage when each LED switches on. To do this, connect the U8002 power suppy 8/9

9 instead of the input signal and vary the input slowly to 4V. Note down the value of the voltage when each of the LED lights up. Input voltage required for LEDs to turn ON Table II U1A U1B U1C U1D U2A U2B U2C Disconnect the power supply and connect the signal generator and set the signal output as shown in Figure 7. Give a demo to the lab instructor. Back to ESE206 Homepage Back to ESE Undergraduate Lab Homepage Created by Jan Van der Spiegel, Feb. 27, 1997; Updated by Sid Deliwala, Feb 8, /9

University of Pennsylvania. Department of Electrical and Systems Engineering. ESE Undergraduate Laboratory. Analog to Digital Converter

University of Pennsylvania. Department of Electrical and Systems Engineering. ESE Undergraduate Laboratory. Analog to Digital Converter University of Pennsylvania Department of Electrical and Systems Engineering ESE Undergraduate Laboratory Analog to Digital Converter PURPOSE The purpose of this lab is to design and build a simple Digital-to-Analog