DC-DC Converter Duty Cycle ANN Estimation for DG Applications

Transcription

1 Adel El Shahat,* J. Electrical Sytem 9- (3): 3-38 egular paper DC-DC Coverter Duty Cycle ANN Etimatio for DG Applicatio JES Joural of Electrical Sytem Thi paper propoe Artificial Neural Network (ANN) model for the required DC-DC Coverter Duty Cycle feedig Maximum Power to reitive load to be ued for ditributed geeratio (DG) applicatio. t propoe a PV module whe coupled to a load through DC-DC Coverter to upply thi reitive load with the maximum power from the PV module. Some of DC-DC coverter topologie are dicued i brief with cocetratio o Cúk ad SEPC Coverter operatio. The mechaim of load matchig i decribed to give the required coverter duty cycle at maximum power poit (MPP). elatio i 3D figure are itroduced for the mot probable ituatio for irradiace ad temperature with the correpodig PV voltage ad curret. Alo, 3D figure for the deired duty cycle, output voltage ad curret of DC-DC coverter to gai the maximum power to the reitive load at variou irradiace ad temperature value. Moreover; Artificial Neural Network (ANN) i ued to implemet a eural model with it algebraic fuctio to take the probable ytem ituatio ad out the propoed coverter duty cycle to give maximum power for the load. All the eural model are doe with their hidde ad output layer uitable euro umber ad uitable performace goal depedig o the 3D imulatio figure how i the paper. Keyword: Ditributed geeratio, Maximum Power, DC-DC Coverter, PV Module, ANN ad MATLAB... troductio A PV array i uually overized to compeate for a low power yield durig witer moth. Thi mimatchig betwee a PV module ad a load require further over-izig of the PV array ad thu icreae the overall ytem cot. To mitigate thi problem, a maximum power poit tracker (MPPT) ca be ued to maitai the PV module operatig poit at the MPP. MPPT ca extract more tha 97% of the PV power whe properly optimized. A typical photovoltaic ytem may coit of the olar geerator itelf ad other compoet that maybe ay oe of the followig: torage elemet (epecially i tad - aloe ytem); the utility grid; power coverter (DC/DC or verter) ad aociated cotrol circuitry [-7]. DC-DC coverter are electroic device that are ued wheever we wat to chage DC electrical power efficietly from oe voltage level to aother. all applicatio, we wat to perform the coverio with the highet poible efficiecy. DC- DC Coverter are eeded becaue ulike AC, DC ca t imply be tepped up or dow uig a traformer. may way, a DC-DC coverter i the DC equivalet of a traformer. They eetially jut chage the iput eergy ito a differet impedace level. So whatever the output voltage level, the output power all come from the iput; there o eergy maufactured iide the coverter. Quite the cotrary, i fact ome i ievitably ued up by the coverter circuitry ad compoet, i doig their job. The Boot coverter i aother imple power electroic coverter ad baically coit of a voltage ource, a iductor, a power electroic witch (uually a MOS -FET or a GBT) ad a diode. t uually alo ha a filter capacitor to moothe the output. Buck coverter provide loger * Correpodig author: Adel El Shahat, adel.elhahat@ieee.org; adel9@yahoo.com, Departmet, Faculty of Petroleum & Miig Egieerig, Suez Uiverity, Suez, Egypt Egieerig Sciece Copyright JES 3 o-lie : joural/ergroup.org/je

2 battery life for mobile ytem that ped mot of their time i tad-by. Buck regulator are ofte ued a witch-mode power upplie for baebad digital core ad the power amplifier [8-3]. Thi paper propoe the part of DC-DC Coverter coupled with reitive load ad upplyig it with Maximum Power a how i figure. Figure. Simple DG Sytem with DC-DC Coverter ad eitive Load. Maximum Power Poit for eitive Load Whe a PV module i directly coupled to a load, the PV module operatig poit will be at the iterectio of it V curve ad the load lie which i the -V relatiohip of load. For example i figure, a reitive load ha a traight lie with a lope of /Load a how i Figure 3. other word, the impedace of load dictate the operatig coditio of the PV module. geeral, thi operatig poit i eldom at the PV module MPP, thu it i ot producig the maximum power. A PV array i uually overized to compeate for a low power yield durig witer moth. Thi mimatchig betwee a PV module ad a load require further over-izig of the PV array ad thu icreae the overall ytem cot. To mitigate thi problem, a maximum power poit tracker (MPPT) ca be ued to maitai the PV module operatig poit at the MPP. MPPT ca extract more tha 97% of the PV power whe properly optimized. Thi ectio dicue the -V characteritic of PV module ad reitive load, matchig betwee the two, ad the ue of DC-DC coverter a a mea of MPPT. Figure. PV module with a reitive load. 4

3 Figure 3. -V curve of PV module ad variou reitive load ( kw/m, 5C). 3. DC-DC Coverter The heart of MPPT hardware i a witch-mode DC-DC coverter. t i widely ued i DC power upplie ad DC motor drive for the purpoe of covertig uregulated DC iput ito a cotrolled DC output at a deired voltage level [4]. MPPT ue the ame coverter for a differet purpoe: regulatig the iput voltage at the PV MPP ad providig load-matchig for the maximum power trafer. There are a umber of differet topologie for DC-DC coverter. They are categorized ito iolated or o-iolated topologie. The iolated topologie ue a mall-ized high-frequecy electrical iolatio traformer which provide the beefit of DC iolatio betwee iput ad output, ad tep up or dow of output voltage by chagig the traformer tur ratio. They are very ofte ued i witch-mode DC power upplie [5]. Popular topologie for a majority of the applicatio are fly-back, half-bridge, ad full-bridge. PV applicatio, the grid-tied ytem ofte ue thee type of topologie whe electrical iolatio i preferred for afety reao. No-iolated topologie do ot have iolatio traformer. Thee topologie are further categorized ito three type: tep dow (buck), tep up (boot), ad tep up & dow (buck -boot). The buck topology i ued for voltage tepdow. PV applicatio, the buck type coverter i uually ued for chargig batterie ad i LCB for water pumpig ytem. The boot topology i ued for teppig up the voltage. The grid-tied ytem ue a boot type coverter to tep up the output voltage to the utility level before the iverter tage. The, there are topologie able to tep up ad dow the voltage uch a: buck-boot, Cúk, ad SEPC (tad for Sigle Eded Primary ductor Coverter). For PV ytem with batterie, the MPP of commercial PV module i et above the chargig voltage of batterie for mot combiatio of irradiace ad temperature. A buck coverter ca operate at the MPP uder mot coditio, but it caot do o whe the MPP goe below the battery chargig voltage uder a low-irradiace ad high-temperature coditio. Thu, the additioal boot capability ca lightly icreae the overall efficiecy [6]. 3. Cúk ad SEPC Coverter The buck coverter i the implet topology ad eaiet to udertad ad deig, however it exhibit the mot evere detructive failure mode of all cofiguratio [5]. Aother diadvatage i that the iput curret i dicotiuou becaue of the witch located at the iput, thu good iput filter deig i eetial. Other topologie capable of voltage tep-dow are Cúk ad SEPC. Eve though their voltage tep-up fuctio i 5

4 optioal for LCB applicatio, they have everal advatage over the buck coverter. They provide capacitive iolatio which protect agait witch failure (ulike the buck topology). The iput curret of the Cúk ad SEPC topologie i cotiuou, ad they ca draw a ripple free curret from a PV array that i importat for efficiet MPPT. Figure 4 how a circuit diagram of the baic Cúk coverter. t i amed after it ivetor. t ca provide the output voltage that i higher or lower tha the iput voltage. The SEPC, a derivative of the Cúk coverter, i alo able to tep up ad dow the voltage. Figure 5 how a circuit diagram of the baic SEPC coverter. The characteritic of two topologie are very imilar. They both ue a capacitor a the mai eergy torage. A a reult, the iput curret i cotiuou. The circuit have low witchig loe ad high efficiecy [5]. The mai differece i that the Cúk coverter ha a polarity of the output voltage revere to the iput voltage. The iput ad output of SEPC coverter have the ame voltage polarity; therefore the SEPC topology i ometime preferred to the Cúk topology. SEPC may be alo preferred for battery chargig ytem becaue the diode placed o the output tage work a a blockig diode prevetig a advere curret goig to PV ource from the battery. The ame diode, however, give the diadvatage of high-ripple output curret. O the other had, the Cúk coverter ca provide a better output curret characteritic due to the iductor o the output tage [4]. Therefore, thi paper decide o the Cúk coverter becaue of the good iput ad output curret characteritic. Figure 4. Circuit diagram of baic Cúk Figure 5. Circuit diagram of baic SEPC coverter. 3. Baic Operatio of Cúk Coverter The baic operatio of Cúk coverter i cotiuou coductio mode i explaied here. teady tate, the average iductor voltage are zero, thu by applyig Kirchoff voltage law (KVL) aroud outermot loop of the circuit how i figure 4. Aume the capacitor ( C ) i large eough ad it voltage i ripple free eve though it tore ad trafer large amout of eergy from iput to output [4] (thi require a good low ES capacitor). The iitial coditio i whe the iput voltage i tured o ad witch ( SW ) i off. The diode (D) i forward biaed, ad the capacitor ( C ) i beig charged. The operatio of circuit ca be divided ito two mode. 3.. Mode : Whe SW tur ON, the circuit become oe The voltage of the capacitor ( C ) make the diode (D) revere-biaed ad tured off. The capacitor ( C ) dicharge it eergy to the load through the loop formed with SW, C, Load, 6

5 ad L. The iductor are large eough, o aume that their curret are ripple free. Thu, the followig relatiohip i etablihed. Figure 6. Baic Cúk coverter whe the witch i ON. 3.. Mode : Whe SW tur OFF, the circuit become oe Figure 7. Baic Cúk coverter whe the witch i OFF. The capacitor ( C ) i gettig charged by the iput (V ) through the iductor ( L ). The eergy tored i the iductor ( L ) i trafer to the load through the loop formed by D, C, ad Load. Thu, the followig relatiohip i etablihed. For periodic operatio, the average capacitor curret i zero. Thu, from the equatio () ad (3): - L. DT + L. ( D ) T =...(5) L / L = D / ( D )...(6) where: D i the duty cycle ( < D < ), ad T i the witchig period. Aumig that thi i a ideal coverter, the average power upplied by the ource mut be the ame a the average power aborbed by the load. P i = P out...(7) V. L = V o. L...(8) L / L = V o / V...(9) Combiig the equatio (6) ad (9), the followig voltage trafer fuctio i derived [4]. V o / V = D / ( D )...() t relatiohip to the duty cycle (D) i: f < D <.5 the output i maller tha the iput. f D =.5 the output i the ame a the iput. f.5 < D < the output i larger tha the iput. 3.3 Mechaim of Load Matchig A decribed before, whe PV i directly coupled with a load, the operatig poit of PV i dictated by the load (or impedace to be pecific). The impedace of load i decribed a below. Load = V o / o...() Where: V o i the output voltage, ad o i the output curret. The optimal load for PV i decribed a: opt = V MPP / MPP...() 7

6 Where: V MPP ad MPP are the voltage ad curret at the MPP repectively. Whe the value of Load matche with that of opt, the maximum power trafer from PV to the load will occur. Thee two are, however, idepedet ad rarely matche i practice. The goal of the MPPT i to match the impedace of load to the optimal impedace of PV. The followig i a example of load matchig uig a ideal (lo-le) Cúk coverter. From the equatio (): V D (3) D V o From the equatio (9) o L L V V From the equatio (3) ad (4) o o (4) D (5) D From the equatio (3) ad (5), the iput impedace of the coverter i: V ( D) ( D) o i.. D o D V Load A how i figure 8, the impedace eem by PV i the iput impedace of the coverter ( i ). By chagig the duty cycle (D), the value of i ca be matched with that of opt. Therefore, the impedace of the load ca be aythig a log a the duty cycle i adjuted accordigly. (6) + PV i DC-DC Coverter Load - Figure 8. The impedace ee by PV i i that i adjutable by duty cycle (D). 3.4 Maximum Power Poit Algorithm The locatio of the MPP i the V plae i ot kow beforehad ad alway chage dyamically depedig o irradiace ad temperature. Therefore, the MPP eed to be located by trackig algorithm, which i the heart of MPPT cotroller. The example of reitive load matchig i elaborated here to how how the output voltage ad curret chage with varyig irradiatio ad temperature. The maximum power trafer occur whe the iput impedace of coverter matche with the optimal impedace of PV module, a decribed i the equatio below. i opt V MPP MPP The required duty cycle (D) for the Cúk coverter i: (7) 8

7 D i Load The coverter output voltage i: V o V (8) D (9) D The coverter output voltage i: D () D o t hould be otified that, if the applicatio require a cotat voltage, it mut employ batterie to maitai the voltage cotat. Alo, of coure, i reality DC-DC coverter ued i MPPT i ot % efficiet. The efficiecy gai from MPPT i large, but the ytem eed to take efficiecy lo by DC-DC coverter ito accout. There i alo tradeoff betwee efficiecy ad the cot. t i eceary for PV ytem egieer to perform ecoomic aalyi of differet ytem ad alo eceary to eek other method of efficiecy improvemet uch a the ue of a u tracker. 4. PV Cell Model The ue of equivalet electric circuit make it poible to model characteritic of a PV cell. The method ued here i implemeted i MATLAB program for imulatio. The ame modelig techique i alo applicable for modelig a PV module. There are two key parameter frequetly ued to characterize a PV cell. Shortig together the termial of the cell, the photo geerated curret will follow out of the cell a a hort-circuit curret (c). Thu, ph = c, whe there i o coectio to the PV cell (ope-circuit), the photo geerated curret i huted iterally by the itriic p- juctio diode. Thi give the ope circuit voltage (Voc). The PV module or cell maufacturer uually provide the value of thee parameter i their dataheet [35]. The ASE-3-DGF/5 i a idutrial-grade olar power module built to the highet tadard. Extremely powerful ad reliable, the module deliver maximum performace i large ytem that require higher voltage, icludig the mot challegig coditio of military, utility ad commercial itallatio. For uperior performace, quality ad peace of mid, the ASE-3-DGF/5 i reowed a the firt choice amog thoe who recogize that ot all olar module are created equal [35]. The implet model of a PV cell equivalet circuit coit of a ideal curret ource i parallel with a ideal diode. The curret ource repreet the curret geerated by photo (ofte deoted a ph or L), ad it output i cotat uder cotat temperature ad cotat icidet radiatio of light. The PV pael i uually repreeted by the igle expoetial model or the double expoetial model. The igle expoetial model i how i fig. 9. The curret i expreed i term of voltage, curret ad temperature a how i equatio [36]. Figure 9. Sigle expoetial model of a PV Cell. 9

8 Figure. Double expoetial model of PV Cell. q( V AkT ) ph exp q( V ) AkT V p q( V ) AkT ph exp exp V p () Where ph : the photo geerated curret; o : the dark aturatio curret; : aturatio curret due to diffuio; : i the aturatio curret due to recombiatio i the pace charge layer; p : curret flowig i the hut reitace; : cell erie reitace; p : the cell (hut) reitace; A: the diode quality factor; q: the electroic charge,.6 9 C; k: the Boltzma cotat,.38 3 J/K; ad T: the ambiet temperature, i Kelvi. Eq. ad Eq. are both oliear. Furthermore, the parameter ( ph,,,, h ad A) vary with temperature, irradiace ad deped o maufacturig tolerace. Numerical method ad curve fittig ca be ued to etimate [36], [37]. There are three key operatig poit o the V curve of a photovoltaic cell. They are the hort circuit poit, maximum power poit ad the ope circuit poit. At the ope circuit poit o the V curve, V = V oc ad =. After ubtitutig thee value i the igle expoetial equatio () the equatio ca be obtaied [36]. qv V () oc oc ph o exp AkT (3) p At the hort circuit poit o the V curve, = c ad V =. Similarly, uig equatio (), we ca obtai. q c c c ph o exp AkT (4) p At the maximum power poit of the V curve, we have = mpp ad V = Vmpp. We ca ue thee value to obtai the followig: q( Vmpp mpp ) Vmpp mpp mpp ph oexp (5) AkT p The power traferred to the load ca be expreed a P = V (6) We ca etimate the diode quality factor a: Vmpp mppo V (7) oc A Vmpp V oc mpp VT l( c mpp) l( c ) ho o c ( Voc / o) Ad p = ho (8) o ( c V oc p ). exp( Voc AV T ) (9)

9 ph o c AV o T Voc.exp( AV c ( ) o (exp ) AV p T ) T A a very good approximatio, the photo geerated curret, which i equal to c, i directly proportioal to the irradiace, the iteity of illumiatio, to PV cell [38]. Thu, if the value, c, i kow from the dataheet, uder the tadard tet coditio, G o =W/m at the air ma (AM) =.5, the the photo geerated curret at ay other irradiace, G (W/m), i give by: G ( ) SC G c G G (3) t hould be otified that, i a practical PV cell, there i a erie of reitace i a curret path through the emicoductor material, the metal grid, cotact, ad curret collectig bu [39]. Thee reitive loe are lumped together a a erie reiter (). t effect become very copicuou i a PV module that coit of may erie-coected cell, ad the value of reitace i multiplied by the umber of cell. Shut reitace i a lo aociated with a mall leakage of curret through a reitive path i parallel with the itriic device [39]. Thi ca be repreeted by a parallel reiter (p). t effect i much le copicuou i a PV module compared to the erie reitace o it may be igored [39], [4]. The ideality factor deoted a A ad take the value betwee oe ad two (a to reach the omiated characteritic) [4]. 5. Photovoltaic Module Modelig A igle PV cell produce a output voltage le tha V, thu a umber of PV cell are coected i erie to achieve a deired output voltage. Whe erie-coected cell are placed i a frame, it i called a a module. Whe the PV cell are wired together i erie, the curret output i the ame a the igle cell, but the voltage output i the um of each cell voltage. Alo, multiple module ca be wired together i erie or parallel to deliver the voltage ad curret level eeded. The group of module i called a array. The pael cotructio provide protectio for idividual cell from water, dut etc, a the olar cell are placed ito a ecapulatio of flat gla. Our cae here depict a typical coectio of 6 cell that are coected i erie [35]. The trategy of modellig a PV module i o differet from modellig a PV cell. t ue the ame PV cell model. The parameter are the all ame, but oly a voltage parameter (uch a the ope -circuit voltage) i differet ad mut be divided by the umber of cell. A electric model with moderate complexity [7] i how i figure 3, ad provide fairly accurate reult. The model coit of a curret ource (c), a diode (D), ad a erie reitace (). The effect of parallel reitace (p) i very mall i a igle module, thu the model doe ot iclude it. To make a better model, it alo iclude temperature effect o the hort-circuit curret (c) ad the revere aturatio curret of diode (o). t ue a igle diode with the diode ideality factor et to achieve the bet -V curve match. (3) (3) Figure. Equivalet circuit ued i the imulatio.

10 The equatio (33) decribe the curret-voltage relatiohip of the PV cell. V c o (exp( q ( )) ) AkT (33) Where: i the cell curret ( the ame a the module curret); V i the cell voltage = {module voltage} /{No. of cell i erie}; T i the cell temperature i Kelvi (K). Firt, calculate the hort-circuit curret ( c ) at a give cell temperature (T): c T c T ref [ a ( T T ref )] (34) Where: c at T ref i give i the dataheet (meaured uder irradiace of W/m ), T ref i the referece temperature of PV cell i Kelvi (K), uually 98K (5 o C), a i the temperature coefficiet of c i percet chage per degree temperature alo give i the dataheet. The hort-circuit curret ( c ) i proportioal to the iteity of irradiace, thu c at a give irradiace (G) i itroduced by Eq. 3. The revere aturatio curret of diode ( o ) at the referece temperature ( T ref ) i give by the equatio (35) with the diode ideality factor added: c qv oc (exp( ) ) (35) AkT The revere aturatio curret ( o ) i temperature depedat ad the o at a give temperature (T) i calculated by the followig equatio [4]. 3 T qe A g ( ) exp( ( )) T T ref Tref Ak Tref Tref (36) The diode ideality factor (A) i ukow ad mut be etimated. t take a value betwee oe ad two; however, the more accurate value i etimated by curve fittig [4] alo, it ca be etimated by try ad error util accurate value achieved. E g i the Bad gap eergy (. V (Si);.4 (GaA);.5 (CdTe);.75 (amorphou Si)). The erie reitace ( ) of the PV module ha a large impact o the lope of the -V curve ear the ope-circuit voltage (V oc ), hece the value of i calculated by evaluatig the lope d/dv of the -V curve at the V oc [4]. The equatio for i derived by differetiatig the -V equatio ad the rearragig it i term of a itroduced i equatio (37). dv AkT / q Voc d qv oc exp( ) (37) AkT dv Where: i the lope of the -V curve at the V V oc (uig the -V curve i the dataheet d oc the divide it by the umber of cell i erie); V oc i the ope-circuit voltage of cell (Dividig V oc i the dataheet by the umber of cell i erie). Fially, the equatio of -V characteritic i olved uig the Newto method for rapid covergece of the awer, becaue the olutio of curret i recurive by icluio of a erie reitace i the model [4]. The Newto method i decribed a: f ( x ) x x f ' ( x ) (38) Where: f (x) i the derivative of the fuctio, f(x) =, x i a preet value, ad x + i a ext value.

11 V f ( ) c o (exp( q( )) ) AkT (39) By uig the above equatio the followig output curret () i computed iteratively. V c o (exp( q( )) ) AkT q V o ( ) exp( q( )) (4) AkT AkT The figure of -V characteritic at variou module temperature are imulated with the MATLAB model for our PV module are how. Alo, the P-V relatio at variou module temperature are preeted. All of thee are doe at variou irradiace value are itroduced. 6. Simulatio eult The calculatio reult are preeted by two way: oe i D figure, ad other with the ue of 3D figure. Thee reult are baed o PV module data ad the MATLAB imulatio model which implemeted i previou ectio. elatio betwee all poible predicted reitace value for all the etire -V curve with the deired optimum reitace value are preeted at the firt from figure to figure 5. We wat the coverter to make the load matchig at the poit of iterectio betwee the curve for the mot probable global value of the load reitace ad the traight lie of optimum load value i order to trafer the required maximum power for the reitive load. eitive Load & Optimum Value (Ohm) T = C T = 5C T = 5C T = 75C Module Voltage (Volt) Figure. eitive load & Optimum reitace value with Voltage at kw/m rradiace eitive Load & Optimum Value (Ohm) Module Voltage (Volt) Figure 3. eitive load & Optimum reitace with Voltage at.75 kw/m rradiace 3

12 eitive Load & Optimum Value (Ohm) Module Voltage (Volt) Figure 4. eitive load ad Optimum reitace with Voltage at.5 kw/m rradiace eitive Load & Optimum Value (Ohm) Module Voltage (Volt) Figure 5. eitive load ad Optimum reitace with Voltage at.5 kw/m rradiace After that, a et of 3 D figure (from fig. 6 to fig. 3) are propoed to cover the mot probable ituatio at variou irradiace, variou temperature with the curret, ad the voltage of the PV module. Thee urface face relatio will be coidered later a the iput learig or traiig data for the propoed eural etwork model. All thee figure are baed o the MATLAB PV module modelig itroduced before. rradiace (kw/m) Module Voltage (V) Figure 6. Voltage & Temp.& (KW/m ) rradiace 8 rradiace (kw/m) Module Curret (A) Figure 7. Curret & Temp.& (KW/m ) rradiace 8 4

13 rradiace (kw/m) Module Voltage (V) Figure 8. Voltage & Temperature& (.75KW/m ) 8 rradiace (kw/m) Module Curret (A) Figure 9. Curret & Temperature&(.75KW/m ) 8 rradiace (kw/m) Module Voltage (V) Figure. Voltage & Temperature&(.5KW/m ) 8.5 rradiace (kw/m) Module Curret (A) Figure. Curret & Temperature&(.5KW/m ) 8 5

14 .5 rradiace (kw/m) Module Voltage (V) Figure. Voltage & Temperature&(.5KW/m ) rradiace (kw/m).5.5 Module Curret (A) Figure 3. Curret & Temperature&(.5KW/m ) Fially, the relatio of coverter duty cycle, coverter output voltage, ad coverter output curret value to trafer the maximum power from the PV module to variou value of reitive load. The coverter duty cycle value from thee relatio are take a target or output value. Thee relatio are preeted with variable value of temperature ad irradiace i figure from 4 to 35. rradiace (kw/m) Duty Cycle Figure 4. Coverter Duty Cycle for max. power with Temperature ad kw/m rradiace 6

15 rradiace (kw/m) Coverter Output Voltage (Volt) Figure 5. Coverter Output Voltage for max. power with Temp. ad kw/m rradiace rradiace (kw/m) Coverter Output Curret (Amp.) Figure 6. Coverter Output Curret for max. power with Temp. ad kw/m rradiace rradiace (kw/m) Duty Cycle Figure 7. Coverter Duty Cycle for max. power with Temp. ad.75 kw/m rradiace rradiace (kw/m) Coverter Output Voltage (Volt) Figure 8. Coverter Output Voltage for max. power with Temp. ad.75 kw/m rradiace 7

16 rradiace (kw/m) Coverter Output Curret (Amp.) Figure 9. Coverter Output Curret for max. power with Temp. ad.75 kw/m rradiace.5 rradiace (kw/m) Duty Cycle Figure 3. Coverter Duty Cycle for max. power with Temp. ad.5 kw/m rradiace.5 rradiace (kw/m).5 5 Coverter Output Voltage (Volt) Figure 3. Coverter Output Voltage for max. power & Temp. ad.5 kw/m rradiace.5 rradiace (kw/m).5 5 Coverter Output Curret (Amp.) Figure 3. Coverter Output Curret for max. power with Temp. ad.5 kw/m rradiace 8

17 .5 rradiace (kw/m) Duty Cycle Figure 33. Coverter Duty Cycle for maximum power & Temp. ad.5 kw/m rradiace.5 rradiace (kw/m).5 5 Coverter Output Voltage (Volt) Figure 34. Coverter Output Voltage for max. power with Temp. ad.5 kw/m rradiace.5 rradiace (kw/m) Coverter Output Curret (Amp.) Figure 35. Coverter Output Curret for max. power with Temp. ad.5 kw/m rradiace 7. Artificial Neural Network (ANN) Techique A ANN coit of very imple ad highly itercoected proceor called euro. The euro are coected to each other by weighted lik over which igal ca pa. Each euro receive multiple iput from other euro i proportio to their coectio weight ad geerate a igle output which may propagate to everal other euro [7]. Amog the variou kid of ANN that exit, the Back-propagatio learig algorithm ha become the mot popular ued method i egieerig applicatio. t ca be applied to ay feed-forward etwork with differetiable activatio fuctio [8], ad it i the type of etwork ued i thi paper. 7. Fudametal of Neural Network The ANN modelig i carried out i two tep; the firt tep i to trai the etwork, wherea the ecod tep i to tet the etwork with data, which were ot ued for traiig. t 9

18 i importat that all the iformatio the etwork eed to lear i upplied to the etwork a a data et. Whe each patter i read, the etwork ue the iput data to produce a output, which i the compared to the traiig patter. f there i a differece, the coectio weight are altered i uch a directio that the error i decreaed. After the etwork ha ru through all the iput patter, if the error i till greater tha the maximum deired tolerace, the ANN ru through all the iput patter repeatedly util all the error are withi the required tolerace [9], []. 7. Data Collectio, Aalyi ad Proceig Quality, availability, reliability, repeatability, ad relevace of the data ued to develop ad ru the ytem i critical to it ucce. Data proceig tart from the data collectio ad aalyi followed by pre-proceig ad the feed to the eural etwork. 7.3 Network Structure Deig Though theoretically there exit a etwork that ca imulate a problem to ay accuracy, there i o eay way to fid it. To defie a exact etwork architecture uch a how may hidde layer hould be ued, how may uit hould there be withi a hidde layer for a certai problem i a paiful job Number of Hidde Layer Becaue etwork with two hidde layer ca repreet fuctio with ay kid of hape, there i o theoretical reao to ue etwork with more tha two hidde layer. geeral, it i trogly recommeded that oe hidde layer be the firt choice for ay feedforward etwork deig [7-] Number of Hidde Uit (ode) Aother importat iue i deigig a etwork i how may uit to place i each layer. Uig too few uit ca fail to detect the igal fully i a complicated data et, leadig to uder fittig. Uig too may uit will icreae the traiig time, perhap o much that it become impoible to trai it adequately i a reaoable period of time. The bet umber of hidde uit deped o may factor the umber of iput ad output uit, the umber of traiig cae, the amout of oie i the target, the complexity of the error fuctio, the etwork architecture, ad the traiig algorithm. The bet approach to fid the optimal umber of hidde uit i trial ad error itializig Back-Propagatio feed-forward etwork Back-propagatio i the mot commoly ued method for traiig multi-layer feedforward etwork. For mot etwork, the learig proce i baed o a uitable error fuctio, which i the miimized with repect to the weight ad bia. The algorithm for evaluatig the derivative of the error fuctio i kow a back-propagatio, becaue it propagate the error backward through the etwork. 8. ANN equired Duty Cycle Model with it regreio fuctio All the eural model i thi ectio ue the previou techique which ued ad verified before like i [-34] for the author i the field of gree eergy. Firt, ANN PV module model i preeted with it regreio fuctio which i verified before by the author [4]. Thi model ue the previou 3D graph illutrated before a traiig or learig data for iput ad deired target. The iput i thi model are the rradiace ad 3

19 Temperature; the output are: Module Voltage, Curret, ad Power. Thi model with it hidde ad output layer uitable euro umber i depicted i figure 36. Alo, the geeral eural etwork, ad traiig tate are preeted i figure 37, ad 38 repectively. Thi model would be ued i ome cae to help i predictig the required duty cycle a it will be ee. Figure 36. ANN PV Cell Module Model Figure 37. Neural Network Figure 38. Traiig State The ormalized iput G : (Normalized rradiace); T : ( Normalized Temperature) are : (4) G (G -.65)/ (.797) T (T ) Equatio (4) ad (4) preet the ormalized iput for irradiace ad temperature, alo the followig equatio lead to the required derived output equatio. E G.8968T.84 (43) F/ ( exp (- E)) E.8336 G. T 4.76 (44) F / ( exp (- E)) E G 9.67T (45) F3 / ( exp (- E3)) (4) 3

20 E G 9.475T F4 / ( exp (- E4)) E G.353T F5 / ( exp (- E5)) E6 -.6G T F6 / ( exp (- E6)) E7.8 G 4.37 T F7 / ( exp (- E7)) E8.653G.94 T F8 / ( exp (- E8)) E9.37 G.8735T F9 / ( exp (- E9)) (46) (47) (48) (49) (5) (5) The ormalized output are: V =.466 F +.8 F +.66 F3.3 F4.7 F F F7 +.9 F8 -.7 F (5) = 6.97 F +.55 F +.88 F F F F F F F (53) P = 7.49 F +.78 F +.6 F F F F F F F (54) The u- ormalized out put V = 5.6 V (55) = (56) P = P (57) The, the firt ANN model for predictig the required duty cycle for maximum power upply i preeted a follow. The iput i thi model are the rradiace ad Temperature; the output i the required duty cycle to drive the DC/DC coverter at maximum power trafer for the reitive load matchig. Thi model with it hidde ad output layer uitable euro umber i well depicted i figure 39. Alo, the geeral eural etwork, ad traiig tate are preeted i figure 37, ad 4 repectively. Figure 39. Duty cycle ANN Model 3

21 Figure 4. Traiig State The algebraic equatio of thi eural model i deduced a the followig: E -.359G.384 T.384 F/ ( exp (- E)) E -.4G T F / ( exp (- E)) E3 -.35G.989 T F3 / ( exp (- E3)) E G T F4 / ( exp (- E4)) E G.63T F5 / ( exp (- E5)) E G 4.84T F6 / ( exp (- E6)) (58) (59) (6) (6) (6) (63) The ormalized output are: D =.645 F -.35 F -.88 F3 -.7 F4 -. F5 -.8 F (64) The u- ormalized out put D =.387 D (65) After that, the ecod ANN model for predictig the required duty cycle for maximum power upply i preeted a follow. The iput i thi model are the module voltage ad module curret; the output i the required duty cycle to drive the DC/DC coverter at maximum power trafer for the reitive load matchig. Thi model with it hidde ad output layer uitable euro umber i well depicted i figure 4. Alo, the geeral eural etwork, ad traiig tate are preeted i figure 37, ad 4 repectively. Figure 4. Duty cycle ANN Model 33

22 Figure 4. Traiig State The algebraic equatio of thi eural model i deduced a the followig: The ormalized iput V : (Normalized Voltage); : ( Normalized Curret) are a follow: (66) V (V )/ (5.6) ( ) Equatio (66) ad (67) preet the ormalized iput for irradiace ad temperature, alo the followig equatio lead to the required derived output equatio. E.78 V F/ ( exp (- E)) (68) E -.39 V F / ( exp (- E)) (69) E V F3 / ( exp (- E3)) (7) E V F4 / ( exp (- E4)) (7) The ormalized output are: D = F F F F (7) The u- ormalized out put D =.387 D (73) Fially, the third ANN model for predictig the required duty cycle for maximum power upply i preeted a follow. The iput i thi model are the irradiace, temperature, module voltage ad module curret; the output i the required duty cycle to drive the DC/DC coverter at maximum power trafer for the reitive load matchig. Thi model with it hidde ad output layer uitable euro umber i well depicted i figure 43. Alo, the geeral eural etwork, ad traiig tate are preeted i figure 37, ad 44 repectively. (67) Figure 43. Duty cycle ANN Model 34

23 Figure 44. Traiig State The algebraic equatio of thi eural model i deduced a the followig: The ormalized iput G : (Normalized rradiace); T : ( Normalized Temperature); V : (Normalized Voltage); : ( Normalized Curret) are a follow: (74) G (G -.65)/ (.797) T (T ) V (V )/ (5.6) ( ) Equatio (74), (75), (76) ad (77) preet the ormalized iput for irradiace, temperature, voltage, ad curret. The followig equatio lead to the required derived output equatio. E.5936 G -.564T.43V F/ ( exp (- E)) E.5943G -.479T F / ( exp (- E)) E G T F3 / ( exp (- E3)).37 V.5644 V The ormalized output are: D =.e+3 * (-.53 F +.65 F +.4 F3) (8) The u- ormalized out put D =.387 D (8) 9. Cocluio Thi paper itroduce Cúk DC-DC coverter coupled to reitive load by maximum power from PV module. elatio which gover the proce of load matchig are dicued to give the required coverter duty cycle at maximum power poit (MPP). The imulatio reult are itroduced by two way firt by D figure for the optimum reitive load value ad for the predicted whole probable rage of reitive load to give a poit of view about the iterectio betwee them i.e. poit of MPP. Secod, the ret of the reult are well depicted i the form of 3D figure for the PV module relatio -V with the variou value of irradiace ad temperature baed o PV module data ad the implemeted MATLAB (75) (76) (77) (78) (79) (8) 35

24 imulatio model. The, the relatio of coverter duty cycle, coverter output voltage, ad coverter output curret value to trafer the maximum power from the PV module to variou value of reitive load with variable value of temperature ad irradiace. The eural etwork ha the ability to deal with previou relatio a urface or mappig face, due to thi techique ability for iterpolatio betwee poit with each other ad alo curve. Thi eural etwork uit i implemeted, uig the back propagatio (BP) learig algorithm due to it beefit to have the ability to predict value i betwee learig value, alo make iterpolatio betwee learig curve data. Thi i doe with uitable umber of etwork layer ad euro at miimum error ad precie maer. The ANN regreio fuctio for each uit i itroduced to be ued directly without operatig the eural model each time. Firt, ANN PV module model i preeted with it regreio fuctio, it iput are the rradiace ad Temperature; the output are: Module Voltage, Curret, ad Power. The, the firt ANN model for predictig the required duty cycle for maximum power upply i itroduced with it regreio fuctio, it iput the rradiace ad Temperature; the output i the required duty cycle to drive the DC/DC coverter at maximum power trafer for the reitive load matchig. After that, the ecod ANN model for predictig the required duty cycle for maximum power upply i illutrated with it regreio fuctio, it iput are the module voltage ad module curret; the output i the required duty cycle to drive the DC/DC coverter at maximum power trafer for the reitive load matchig. Fially, the third ANN model for predictig the required duty cycle for maximum power upply i propoed with it regreio fuctio, it iput are the irradiace, temperature, module voltage ad module curret; the output i the required duty cycle to drive the DC/DC coverter at maximum power trafer for the reitive load matchig. eferece [] T. Markvart ad L. Cataer, Practical Hadbook of Photovoltaic, Fudametal ad Applicatio. Elevier, 3. [] K. Huei,. Muta, T. Hohio, ad M. Oakada, Maximum photovoltaic power trackig: a algorithm for rapidly chagig atmopheric coditio, Geeratio, Tramiio ad Ditributio, EE Proceedig-, vol. 4, pp , Ja 995. [3] Hohm, D. P. & M. E. opp Comparative Study of Maximum Power Poit Trackig Algorithm Progre i Photovoltaic: eearch ad Applicatio November, page 47-6 [4] G.Walker, \Evaluatig mppt coverter topologie uig a matlab pv model," Joural of Electrical ad Electroic Egieerig, vol., o., p. 4956,. [5] Adel El Shahat, Maximum Power Poit Geetic detificatio Fuctio for Photovoltaic Sytem, teratioal Joural of eearch ad eview i Applied Sciece, Jue, ( Pre). [6] Mi Dai, M.N. Marwali, Ji-Woo Jug, A. Keyhai, "A Three-Phae Four-Wire verter Cotrol Techique for a Sigle Ditributed Geeratio Uit i lad Mode", EEE Traactio o Power Electroic, Vol. 3, ue, Ja. 8, pp [7] Ji-Woo Jug ad Ali Keyhai, "Cotrol of a Fuel Cell Baed Z-Source Coverter", EEE Traactio o Eergy Coverio, Volume, No., Jue 7, pp [8] Michael D. Mulliga, Bill Broach, ad Thoma H. Lee, A Cotat-Frequecy Method for mprovig Light-Load Efficiecy i Sychroou Buck Coverter, Power Electroic Letter, EEE Volume 3, ue, March 5 Page(): 4-9 [9].D. Middlebrook ad S. Cuk, "A Geeral Uified Approach To Modellig Switchig-Coverter Power Stage", EEE Power Electroic Specialit Coferece, 976 ecord, pp [] Mikkel C. W. Høyerby, Michael A.E. Adere, Evelope Trackig Power Supply with fully cotrolled 4th order Output Filter, Applied Power Electroic Coferece ad Expoitio, 6. Twety-Firt Aual EEE, 9-3 March 6 Page(): 8 pp. - [] Chi Chag, obut Cotrol of DC-DC Coverter: The Buck Coverter, Power Electroic Specialit Coferece, th Aual EEE Volume, ue, 8- Ju 995 Page():94-97 vol. [] Mika Sippola ad aimo Seppoe, DC/DC Coverter techology for ditributed telecom ad microproceor power ytem a literature review, Heliki Uiverity of Techology Applied Electroic Laboratory, Serie E: Electroic Publicatio E 3, 36

25 [3] Chag, C., Mixed Voltage/Curret Mode Cotrol of PWM Sychroou Buck Coverter, Power Electroic ad Motio Cotrol Coferece, 4. PEMC 4. The 4th teratioal, Publicatio Date: 4-6 Aug. 4, Volume: 3, O page(): Vol.3. [4] Moha, Udelad, obbi Power Electroic Coverter, Applicatio, ad Deig 3rd Editio Joh Wiley & So Ltd, 3 [5] ahid, Muhammad H. Power Electroic - Circuit, Device, ad Applicatio 3rd Editio Pearo Educatio, 4 [6] Walker, Geoff. Evaluatig MPPT coverter topologie uig a MATLAB PV model Autralaia Uiveritie Power Egieerig Coferece, AUPEC,Bribae, [7] TT Chow, Zhag GQ, Li Z, Sog CL.: Global optimizatio of aborptio chiller ytem by geetic algorithm ad eural etwork. Eergy Buildig ;34:3 9. [8] SA Kalogirou Applicatio of artificial eural etwork i eergy ytem: a review, Eergy Cover Maage 999; 4: [9] SA. Kalogirou Applicatio of artificial eural etwork for eergy ytem, Appl Eergy ; 67:7 35. [] SA. Kalogirou Log-term performace predictio of forced circulatio olar dometic water heatig Sytem uig artificial eural etwork, Appl Eergy ; 66: [] Arzu Seca, Kemal A.Yakut, Soteri A.Kalogirou Thermodyamic aalyi of aborptio ytem uig artificial eural etwork, eewable Eergy, Volume 3, iue, Ja. 6, page [] A. El Shahat, ad H. El Shewy, PM Sychroou Motor Cotrol Strategie with Their Neural Network egreio Fuctio, Joural of Electrical Sytem, Vol. 5, ue 4, Dec. 9. [3] Adel El Shahat ad Hamed El Shewy, High Fudametal Frequecy PM Sychroou Motor Deig Neural egreio Fuctio, Joural of Electrical Egieerig, Vol. / Editio, Article..4. [4] Adel El Shahat, ad Hamed El Shewy, High Speed Sychroou Motor Baic Sizig Neural Fuctio for eewable Eergy Applicatio, MDGEN5, The teratioal Coferece o Milleium Developmet Goal (MDG): ole of CT ad other techologie December 7 9, 9 i Cheai, dia. [5] Adel El Shahat, ad Hamed El Shewy, High Speed PM Sychroou Motor Baic Sizig Neural egreio Fuctio for eewable Eergy Applicatio, Paper D: X34, Accepted i d teratioal Coferece o Computer ad Electrical Egieerig (CCEE 9); Dubai, UAE, December 8-3, 9. [6] A. El Shahat, Geeratig Baic Sizig Deig egreio Neural Fuctio for HSPMSM i Aircraft EP- 7, 3th teratioal Coferece o Aeropace Sciece & Aviatio Techology, May 6 8, 9, ASAT 9 Military Techical College, Cairo, Egypt. [7] Adel El Shahat, ad Hamed El Shewy, High Speed PM Sychroou Motor Baic Sizig Neural egreio Fuctio for eewable Eergy Applicatio, Paper D: X34, Accepted i d teratioal Coferece o Computer ad Electrical Egieerig (CCEE 9); Dubai, UAE, December 8-3, 9. [8] El Shahat, A ad El Shewy, H, Neural Uit for PM Sychroou Machie Performace mprovemet ued for eewable Eergy, ef: 93, The Third Ai Sham Uiverity teratioal Coferece o Evirometal Egieerig (Acee- 3 ), April 4-6 9, Cairo, Egypt. [9] A. El Shahat, H. El Shewy, Neural Uit for PM Sychroou Machie Performace mprovemet ued for eewable Eergy, Paper ef.: 9, Global Coferece o eewable ad Eergy Efficiecy for Deert egio (GCEEDE9), Amma, Jorda. [3] S. Nafey, A. El Shahat ad M. A. Sharaf, A Neural Model for Flat Plate Collector, EGY- 38, 6th teratioal Coferece o ole of Egieerig toward a Better Eviromet, ETBE 6 Coferece i Alexadria, 6-8 December 6. [3] Adel T. Y. Tawfik, ad Adel El Shahat, A Neuro Modelig for New Biological Techique of Water Pollutio Cotrol, EGY- 37, 6th teratioal Coferece o ole of Egieerig toward a Better Eviromet, ETBE 6 Coferece i Alexadria, 6 8 December 6. [3] Adel T. Y. Tawfik ad Adel El Shahat, A Neural Model for New Biological Techique of Water Pollutio Cotrol: Experimetal Project, The 6th Syria Egyptia Coferece of Chemical & Petroleum Egieerig, 8 - November, 5, Syria. [33] A.Y. Tawfik ad A. El Shahat, Speed Seorle Neural Cotroller for ductio Motor Efficiecy Optimizatio, t teratioal Coferece o Advaced Cotrol Circuit ad Sytem (ACCS 5), ACCS Catalog No: 86 M 5, SBN: , March 6, 5, Cairo, Egypt. [34] H. El Shewy, A.Y. Tawfik ad A. El Shahat, Neural Model of 3 phae ductio Motor, t teratioal Coferece o Advaced Cotrol Circuit ad Sytem (ACCS 5), ACCS Catalog No: 86 M 5, SBN: , March 6, 5, Cairo, Egypt. [35] Schott ASE-3-DGF PV pael data heet. Source (Affordable Solar webite); [36] Ali Keyhai, Mohammad N. Marwali, ad Mi Dai, "tegratio of Gree ad eewable Eergy i Electric Power Sytem," Wiley, Jauary [37] Mater, Gilbert M. eewable ad Efficiet Electric Power Sytem Joh Wiley & So Ltd, 4 [38] Meeger, oger & Jerry Vetre Photovoltaic Sytem Egieerig d Editio CC Pre, 3 [39] Catañer, Lui & Satiago Silvetre Modellig Photovoltaic Sytem, Uig PSpice Joh Wiley & So Ltd, 37

26 [4] Gree, Marti A. Solar Cell; Operatig Priciple, Techology, ad Sytem Applicatio Pretice Hall c., 98 [4] Walker, Geoff. Evaluatig MPPT coverter topologie uig a MATLAB PV model Autralaia Uiveritie Power Egieerig Coferece, AUPEC,Bribae, [4] Adel El Shahat, PV Cell Module Modelig & ANN Simulatio for Smart Grid Applicatio, Joural of Theoretical ad Applied formatio Techology, Vol. 6, No., Jue, pp