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1 9-70; Rev 0; 0/0 MAXIM MAX/MAX Evaluation Kits General Description The MAX/MAX evaluation kits (EV kits) demonstrate the high-power, dynamically adjustable multiphase notebook CPU application circuit. This DC-DC converter steps down high-voltage batteries and/or AC adapters, generating a precision, low-voltage CPU core VCC rail. The MAX EV kit meets the mobile and desktop AMD Hammer CPU transient voltage specification. The MAX EV kit meets the desktop and mobile Pentium (P) CPUs transient voltage specification. The MAX/MAX kits consist of the MAX or MAX Dual-Phase Quick-PWM stepdown controller, two MAX90 slave controllers and the MAX690 temperature sensor. The MAX/MAX kits include active voltage positioning with adjustable gain and offset, reducing power dissipation and bulk output capacitance requirements. The kit features independent four-level logic inputs for setting the suspend voltage (S0/S). The MAX90 provides additional gate drive circuitry, phase synchronization, current limit, and current balancing. Precision slew-rate control provides just-in time arrival at the new DAC setting, minimizing surge currents to and from the battery. This fully assembled and tested circuit board provides a - bit digitally adjustable output voltage from a 7V to V battery input range. The EV kit operates at 00kHz switching frequency and has superior line- and loadtransient response. Pentium is a registered trademark of Intel Corp. Hammer is a trademark of Advanced Micro Devices, Inc. QuickPWM is a trademark of Maxim Integrated Products, Inc. Features Quad-Phase Quick-PWM TM EV Kit Mobile and Desktop P or AMD Hammer Compatible Active Voltage Positioning with Adjustable Gain, Offset and Remote Sensing High Speed, Accuracy and Efficiency Low Bulk Output Capacitor Count Multiphase Fast-Response Quick-PWM Architecture MAX/MAX Dual-Phase Controller Two MAX90 Slave Controllers 7V to V Input Voltage Range -Bit On-Board DAC Mobile P: 0.60V to.7v Output Range Desktop P:.0V to.v Output Range AMD Hammer: 0.67V to.v Output Range 6A Load-Current Capability (7A Each Phase) 00kHz Switching Frequency MAX609 Temperature Sensor 0-Pin Thin QFN Package (MAX/MAX) 0-Pin Thin QFN Package (MAX90) Fully Assembled and Tested Ordering Information PART TEMP RANGE IC PACKAGE MAXEVKIT MAXEVKIT 0 C to +70 C 0 QFN (MAX_) 0 QFN (MAX90) Evaluates: MAX/MAX Component List DESIGNATION QTY DESCRIPTION C-C, C7, C0, C, C6, C, C, C6, C6 C, C, C6, C9 C6, C, C, C, C9, C, C60 0 Not Installed (060) 7 00pF % 0V C0G ceramic capacitor (060) Murata GRMCH0J 0.µF 6V XR ceramic capacitor (00) Taiyo Yuden EMKBJKG DESIGNATION QTY DESCRIPTION C-C, C, C, C7 or C-C, C, C, C7 or 0µF,.V 9mΩ Low-ESR polymer capacitor (D case) Sanyo RTPE0M9 0µF, V 7mΩ Low-ESR specialty polymer capacitor (D case) Panasonic EEFSD0DXR C 0 Not installed (E case) C, C9, C, C9 000pF 0% 0V C0G ceramic capacitor (060) Murata GRMR7H0K MAXIM Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at , or visit Maxim s website at

2 MAX/ /MAX Evaluation Kits Evaluates: MAX/MAX Component List (continued) DESIGNATION QTY DESCRIPTION C, C, C, C C6 C7, C, C9, C, C, C, C, C, C6 9 C7, C0, C C C0, C7, C0, C6, C6 C, C, C, C7 C6 C67, C69, C70, C, C, C, C7, C97-C0 C7-C7, C0- C, C-C9 6 D D, D, D, D D, D D6, D D7, D0 0 J JUA0-JUA 6 -pin header JU, JU, JU -pin header JU 0 -pin header 700pF 0% 0V X7R ceramic capacitor (060) Murata GRMR7H7K (Not installed when using Si7DP).µF 0V XR ceramic capacitor (06) TDK C6XRAKTB09N µf 0% V XR ceramic capacitor () TDK CXRE6M µf 0% 0V XR ceramic capacitor (00) Taiyo Yuden LMKBJ0KG or TDK C0X7RC0MKT 7pF % 0V C0G ceramic capacitor (060) Murata GRMCH70J 70pF 0% 0V X7R ceramic capacitor (060) Murata GRMR7H7K µf 0% V X7R ceramic capacitor (00) TDK C0X7RE0K 0.µF 0% 0V X7R ceramic capacitor (00) Murata GRMBR7H0K 0µF 0% 6.V XR ceramic capacitor (00) TDK C0XR0J06M or Taiyo Yuden AMKBJ06MG µf 6.V XR ceramic capacitor (06) TDK C6XR0J6MT 00mA, 0V Dual Schottky Diode Central Semiconductor CMPSH-A A Schottky Diode Central Semiconductor CMSH-0 00mA, 0V Schottky Diode Central Semiconductor CMPSH- 00mA Switching Diode Central Semiconductor CMPD Not Installed 00mA, 0V Dual Schottky Diode Central Semiconductor CMPSH-C -pin header Molex DESIGNATION QTY DESCRIPTION JU -pin header L-L 0.6µH 6A 0.9mΩ Power Inductors Panasonic ETQPH0R6BFA or Sumida CDEPH-0R6 N-channel MOSFET (SO-) N, N, N, N6, International Rectifier IRF7W N7, N0, N, or N6 Fairchild FDS669 or or N, N7, N0, Vishay/Siliconix Si76DP N6 (Power PAK) N, N, N, N9, N, N, N, N Q, Q R, R, R, R, R, R7, R0, R7, R0, R, R6, R6, R7, R9, R0 R, R9, R9, R R, R-R, R0, R, R6, R, R9, R07 R, R6, R, R 0 N-channel MOSFET (SO-) International Rectifier IRF7 or Fairchild FDS66 or Vishay/Siliconix Si7DP (Power PAK) N-channel MOSFET Central Semiconductor N700 Not Installed, (short PC trace) (060) 0.00Ω ±% W resistor () Panasonic ERJMWTFM0U 0 00Ω ±% resistor (060) kω ±% resistor (060) R7 60.kΩ ±% resistor (060) R0 00kΩ ±% resistor (060) R 0kΩ ±% resistor (060) R6, R, R 0Ω ±% resistor (060) R9, R, R7, R0, R6, R, R, R6, R6, R6-R67, R7, R7, R, R7, 0 Not Installed (060) R9, R99-R0, R0-R06, R0, R09 R6, R, R7, R76, R77, R79, R0 7 0Ω ±% resistor (060) R9, R 0.kΩ ±% resistor (060) R, R 0kΩ ±% resistor (060) R, R7 0Ω ±% resistor (060) R, R 0kΩ ±% resistor (060) R-R9, R70, R9-R97, R0 00kΩ ±% resistor (060) R60 kω ±% resistor (060) R MΩ ±% resistor (060) U, U MAX90ETP (0-TQFN) MAXIM

3 MAX/MAX Evaluation Kits Component List (continued) DESIGNATION QTY DESCRIPTION U MAX609HAUK-T (-SOT) U 0 MAX609HAUK-T (-SOT) None 0 Shunts None MAX/MAX PC Board MAX EV Kit Additional Components DESIGNATION QTY DESCRIPTION R, R.6kΩ ±% resistor (060) R.9kΩ ±% resistor (060) R 00kΩ ±% resistor (060) U MAXETL (0-TQFN) U Socket 7 Quick Start Recommended Equipment 7V to V, >00W power supply, battery, or notebook AC adapter DC bias power supply, V at A One or more dummy loads capable of sinking 6A total Digital multimeter (DMM) 00MHz dual-trace oscilloscope Procedure ) Ensure that the circuit is connected correctly to the supplies and dummy load prior to applying any power. ) Verify that the shunts are across JU pins and (S0) and JU pins and (S), JU pins and (SHDN) and JU pins and (TON). The DAC code settings (D D0) are set for.0v output through installed jumpers JUA and JUA. A fixed +0mV offset fsets the final no load output voltage at.v for the MAX EV kit. A fixed -mv offset sets the final no load output voltage at.v for the MAX EV kit. DESIGNATION QTY DESCRIPTION None MAX/MAX EV kit data sheet None MAX/MAX data sheet None MAX90 data sheet None MAX609 data sheet MAX EV Kit Additional Components* DESIGNATION QTY DESCRIPTION R, R.0kΩ ±% resistor (060) R kω ±% resistor (060) R 0kΩ ±% resistor (060) U MAXETL (0-TQFN) U None *Contact Intel for the Mobile P specifications and contact Maxim for a reference schematic. Component Suppliers SUPPLIER PHONE FAX WEBSITE Central Semiconductor Fairchild Semiconductor International Rectifier Panasonic Sumida Taiyo Yuden TDK Vishay/Siliconix Note: Please indicate that you are using the MAX and MAX when contacting these component suppliers. ) Turn on the battery power before turning on the +V bias power; otherwise, the output UVLO timer times out and the FAULT latch is set, disabling the regulator until +V power is cycled or shutdown is toggled. ) Observe the output voltage with the DMM and/or oscilloscope. Look at the LX switching nodes and MOSFET gate-drive signals while varying the load current. Detailed Description This 6A multiphase buck-regulator design is optimized for a 00kHz frequency and output voltage settings from.0v to.v. At =.V and VIN=V, the inductor ripple is approximately 0% (LIR=0.). The MAX/MAX controller shares the current between its two phases that operate 0 out-of-phase, supplying 7A per phase. Each MAX90 slave is triggered by one side of the MAX/MAX low-side gate driver, supplying another 7A per slave. Evaluates: MAX/MAX MAXIM

4 MAX/ /MAX Evaluation Kits Evaluates: MAX/MAX Setting the Output Voltage The MAX/MAX has two unique internal VID input multiplexers that can select one of three different VID DAC code settings for different processor states. On startup, the controller selects the DAC code from the D0 D input decoder when SUS=GND. A second multiplexer selects the lower S0-S DAC code when SUS is high (SUS=.V or VCC), or the higher S0-S DAC code when SUS=REF. The output voltage can be digitally set by the D0-D pins (Table ) or the S0-S pins (Table ). There are five different ways of setting the output voltage: ) Drive the external VID0 VID inputs (no jumpers installed): The output voltage can be set by driving VID0 VID with open-drain drivers (pullup resistors are included on the board) or V/V CMOS output logic levels (DPSLPVR = GND). ) Install jumpers JUA0 JUA: SUS=low. When JUA0 JUA are not installed, the MAX/MAX s D0 D inputs are at logic (connected to VID_VCC). When JUA0 JUA are installed, D0 D inputs are at logic 0 (connected to GND). The output voltage can be changed during operation by installing and removing jumpers JUA0 JUA. As shipped, the EV kit is configured with jumpers JUA0 JUA set for.0v output (Table ). Refer to the MAX and MAX data sheets for more information. ) Drive DPSLPVR (suspend mode configuration): As shipped, the EV kit is configured for operation in the suspend mode S0-S set for.000v output (Table ). ) Drive DPSLP: DPSLP can be driven by an external driver to introduce offsets to the output voltage (Table ). ) Drive header J for full system control: VID0-VID, DPSLP, DPRSLPVR, VRON, and VROK are all available directly on header connections J (Figure c). Do not install jumper JU in this mode. Table. MAX/MAX Output Voltage Adjustment Settings (SUS=GND) D D D D D0 MAX (V) MAX CODE=VCC (V) MAX CODE=GND (V) D D D D D0 MAX (V) MAX CODE=VCC (V) MAX CODE=GND (V) OFF OFF MAXIM

5 MAX/MAX Evaluation Kits Table. MAX/MAX Output Voltage Adjustment Settings (SUS=High or REF) LOWER SUSPEND CODES UPPER SUSPEND CODES SUS* S S0 (V) SUS* S S0 (V) High GND GND 0.67 REF GND GND.07 High GND REF REF GND REF.00 High GND 0.7 REF GND. High GND VCC 0.70 REF GND VCC.0 High REF GND 0.77 REF REF GND.7 High REF REF 0.00 REF REF REF.00 High REF 0. REF REF. High REF VCC 0.0 REF REF VCC.0 High GND 0.7 REF GND.7 High REF REF REF.00 High 0.9 REF. High VCC 0.90 REF VCC.0 High VCC GND 0.97 REF VCC GND.7 High VCC REF.000 REF VCC REF.00 High VCC.0 REF VCC. High VCC VCC.00 REF VCC VCC.0 *Note: Connect the -level SUS input to a.7v or greater supply (.V or V CC) for an input logic level high. Table. MAX/MAX Operating Mode Truth Table SHDN SUS SKIP OFS OUTPUT VOLTAGE GND x x x GND V CC GND V CC GND or REF V CC x REF GND or REF V CC x GND GND or REF V CC GND x V CC REF or High x 0 to 0.V or.v to.0v x D0-D (No offset) D0-D (No offset) D0-D (No offset) D0-D (Plus offset) SUS, S0-S (Offset disabled) V CC x x x GND OPERATING MODE Low-Power Shutdown Mode. DL_ is forced high, DH_ is forced low, and the PWM controller is disabled. The supply current drops to µa (typ). Normal Operation. The no load output voltage is determined by the selected VID DAC code (D0-D, Table ). Dual-Phase Pulse Skipping Operation. When SKIP is set to V, the MAX/MAX immediately enters dual-phase pulse skipping operation allowing automatic PWM/PFM switchover under light loads. Both MAX90 slaves are disabled. The VROK upper threshold is blanked. Single-Phase Pulse Skipping Operation. When SKIP is pulled to GND, the MAX/MAX immediately enters single-phase pulse skipping operation allowing automatic PWM/PFM switchover under light loads. Both MAX90 slaves are disabled. The VROK upper threshold is blanked. Deep Sleep Mode. The no load output voltage is determined by the selected VID DAC code (D0-D, Table ) plus the offset voltage set by OFS. Suspend Mode. The no load output voltage is determined by the selected suspend code (SUS, S0-S, Table ), overriding all other active modes of operation. Fault Mode. The fault latch has been set by either UVP, OVP (if enabled), or thermal shutdown. The controller will remain in FAULT mode until V CC power is cycled or SHDN toggled. Evaluates: MAX/MAX MAXIM

6 MAX/ /MAX Evaluation Kits Evaluates: MAX/MAX Reduced Power Dissipation Voltage Positioning The MAX/MAX EV kit uses voltage positioning to decrease the size of the output capacitor and to reduce power dissipation at heavy loads. Current-sense resistors (R and R9=mΩ) are used to sense the inductor current and adjust the output voltage. The current-sense resistors dissipate some power but the net power savings are substantial. This EV kit further improves efficiency by using an internal op-amp gain stage to allow a reduction in the sense resistor value. The MAX op amp is configured for a gain of. (only phases sensed) providing a -.mv/a voltage-positioning slope at the output when all four phases are active. The MAX op amp is configured for a gain of providing a slope of -.mv/a. Remote output and ground sensing eliminate any additional PC board voltage drops. Dynamic Output Voltage Transition Experiment Observe the output voltage transition between.00v and.0v by setting jumpers JUA0 JUA to.0v and toggling the SUS input between GND and VCC, respectively. This is the worst-case transition and should complete within 00µs. This EV kit is set to transition the output voltage at -LSB per µs. The speed of the transition can be altered by changing resistor R7 (60.kΩ). During the voltage transition, watch the inductor current by looking across R and/or R9 with a differential scope probe or by inserting a current probe in series with the inductor. Observe the low, well-controlled inductor current that accompanies the voltage transition. The same slew rate and controlled inductor current are used during shutdown and startup, resulting in well-controlled currents into and out of the battery (input source). There are two other methods to create an output voltage transition. Select D0 D (JUA0 JUA). Then either manually change the JUA0 JUA jumpers to a new VID code setting (Table ), or remove all jumpers and drive the VID0 VID PC board test points externally to the desired code settings. Load-Transient Experiment One interesting experiment is to subject the output to large, fast load transients and observe the output with an oscilloscope. This necessitates careful instrumentation of the output, using the supplied scope-probe jack. Accurate measurement of output ripple and load-transient response invariably requires that ground clip leads be completely avoided and that the probe must be removed to expose the GND shield, so the probe can be plugged directly into the jack. Otherwise, EMI and noise pickup corrupt the waveforms. Most benchtop electronic loads intended for power supply testing lack the ability to subject the DC-DC converter to ultrafast load transients. Emulating the supply current di/dt at the CPU VCORE pins requires at least 0A/µs load transients. One easy method for generating such an abusive load transient is to solder a power MOSFET directly across the scope-probe jack. Then drive its gate with a strong pulse generator at a low duty cycle (< %) to minimize heat stress in the MOSFET. Vary the high-level output voltage of the pulse generator to vary the load current. To determine the load current, you might expect to insert a meter in the load path, but this method is prohibited here by the need for low resistance and inductance in the path of the dummy load MOSFET. There are two easy alternative methods of determining how much load current a particular pulse-generator amplitude is causing. The easiest method is to observe the currents through inductors L and L with a calibrated AC current probe, such as a Tektronix AM0, or by looking across R and R9 with a differential probe. In the buck topology, the load current is approximately equal to the average value of the inductor currents. TON Settings Jumper JU selects the MAX/MAX switching frequency. Note: Always set the MAX90 slaves to the same switching frequency as the MAX/MAX. Note: When changing the switching frequency, recalculate the inductor and output capacitor values using the equations in the MAX/MAX and MAX90 datasheets. Table. Jumper JU Function (TON Setting) SHUNT POSITION TON PIN MAX/MAX SWITCHING FREQUENCY and Connected to GND 0kHz. Short R0 and R0 to set the MAX90s to 0kHz. and (Default) Connected to REF 00kHz. and Connected to V CC 00kHz. Short R0 and R09 to set the MAX90s to 00kHz. Not installed VR_ON driven by external signal 00kHz. Not supported by MAX90. Disable MAX90 when setting MAX/MAX at 00kHz for highest suspend mode efficiency. Table. PIN9 Function and Setting PIN 9 MAX (OVP PIN) MAX (CODE PIN) High Overvoltage Protection Enabled Selects Mobile P VID code set Low Overvoltage Protection Disabled Selects Desktop P VID code set 6 MAXIM

7 MAX/MAX Evaluation Kits MAX MAX PIN 9 OVP CODE C7 µf 0V REF JU VCC R7 0Ω JU DPRSLPVR SUS R70 00kΩ PIN 9 VID0 VID VID VID VID R7 60.kΩ % 9 0 PIN 9 D0 D D D D S0 S TIME C 7pF CCV REF R0 00kΩ % R 0kΩ % C 00pF ILIM VCC=00kHz =00kHz REF=00kHz GND=0kHz REF DPRSLPVR VR_ON JU DISABLE VCC JU VCC VCC R76 0Ω REF GND_SENSE R97 00kΩ C0 R 00Ω C 0.µF R77 0Ω Q N700 C 00pF SKIP 9 C6 70pF REF TON SKIP SHDN VROK VROK 6 GNDS GND VCC VDD R6 0Ω 0 0 V CC V DD V+ BSTM DHM LXM DLM MAX U* (BACKSIDE PAD IS CONNECTED TO GND) BSTS DHS LXS DLS PGND CMP CMN CSN CSP OAIN+ OAIN- FB CCI OFS +V VBIAS C6.µF 0V R DHM DLM C 700pF C6 0.µF 7 6 D CMPSH-A N BSTS 7 6 N N DHM 6 7 N DLM 6 7 C µf V D VBATT C µf V L 0.6µH R CM+ R 0.00Ω C C7 µf V C0 0µF.V C6 µf V C 0µF.V VBATT 7V TO V C R DLS C 700pF C6 C R*.9kΩ % R0 C0 70pF DHS R7 R C7 C 0.µF BSTS 7 6 N R R R MΩ 7 6 R kω % R kω % N6 N7 DHS 6 7 N9 DLS R9 CM+ CS+ 6 7 CS- CM- CS- CM- CS- R* kω % R C µf V D R*.9kΩ % R kω % R6 kω % VBATT REF C7 µf V L 0.6µH R LM CS+ LM CM+ CS+ R9 0.00Ω C _SENSE GND_SENSE C µf V C 0µF.V _SENSE R7 CM- C9 µf V GND_SENSE C 0µF.V _SENSE R 0Ω R 0Ω R0 GND GND C6 70pF R* 0kΩ % Q N700 DPSLP# AGND AGND * See MAX EV Kit Additional Components for Desktop P Solution. Evaluates: MAX/MAX Figure a. MAX EV Kit Schematic (Sheet of ) MAXIM 7

8 MAX/ /MAX Evaluation Kits DISABLE VCC=00kHz =00kHz GND=0kHz DLM D7 BATA DLS DISABLE VCC=00kHz =00kHz GND=0kHz DLM D0 BATA DLS R79 00Ω VCC R0 R0 AGND R6 0Ω R7 R0 0Ω VCC R09 R0 AGND R0 R 0Ω VCC VBATT C 0.µF R00 AGND 7 R6 AGND CM+ REF R0 R0 AGND C7 70pF R 0kΩ % VCC D6 CMPD R9 0.kΩ R 0kΩ % C6 AGND VDD R pF 7 0 AGND C VCC VBATT C60 0.µF R06 AGND 7 R AGND CS+ REF R9 R99 AGND C0 70pF R 0kΩ % VCC D CMPD R 0.kΩ R 0kΩ % C9 AGND VDD R pF 7 0 AGND C VCC VDD R7 0Ω V CC V DD V+ DD LIMIT BST MAX90 DH LX COMP TON ILIM U (BACKSIDE PAD IS CONNECTED TO AGND) DL PGND CS+ GND POL CM+ TRIG CS- CM- VCC VDD R 0Ω V CC V DD V+ DD LIMIT BST MAX90 DH LX COMP TON ILIM U (BACKSIDE PAD IS CONNECTED TO AGND) DL PGND CS+ GND POL CM+ TRIG CS- CM- Evaluates: MAX/MAX 6 0 R7 C 700pF DHS DLS D CMPSH- C9 0.µF 7 6 N 7 6 C0 µf 0V N N0 DHS 6 7 N DLS 6 7 C µf V D VBATT C µf V L 0.6µH R7 CS+ R 0.00Ω C C9 0µF.V C 0µF.V 9 LS GND C 000pF R 00Ω CS+ R 00Ω C9 000pF R6 00Ω CM+ R 00Ω CS- CS- CM- 6 0 R C 700pF DHS DLS D CMPSH- C 0.µF 7 6 N 7 6 C µf 0V N N6 DHS 6 7 N DLS 6 7 C µf V D VBATT C µf V L 0.6µH R9 CS+ R9 0.00Ω C C 0µF.V C7 0µF.V 9 LS GND C9 000pF R9 00Ω CS+ R 00Ω C 000pF R0 00Ω CS+ R 00Ω CS- CS- CS- Figure b. MAX EV Kit Schematic (Sheet of ) MAXIM

9 MAX/MAX Evaluation Kits VID_VCC JU J VDD R 00kΩ VID0 R 00kΩ VID R6 00kΩ VID R7 00kΩ VID R 00kΩ VID R9 00kΩ PIN 9 JUA0 JUA JUA JUA JUA JUA VBATT C µf V VID0 VID VID VID VID PIN 9 GND VDD VDD VDD R0 R07 00Ω R6 R66 MAX609 HYST GND V CC U OUT SET C6 R67 VRHOT# R6 R6 MAX609 HYST GND V CC U OUT SET C6 0.µF R60 kω % VRHOT# R0 00kΩ DPSLP# DPSLP# C69 0µF C70 0µF C 0µF C 0µF C 0µF R9 00kΩ VRHOT# VRHOT# R96 00kΩ C97 0µF C9 0µF C99 0µF C00 0µF C0 0µF VROK VROK VR_ON VR_ON C7 µf C7 µf C7 µf C7 µf C7 µf C76 µf C77 µf C7 µf DPRSLPVR DPRSLPVR C0 µf C µf C µf C µf C9 µf C90 µf C9 µf C9 µf Evaluates: MAX/MAX MAX MAX +V VBIAS PIN 9 OVP CODE Figure c. MAX EV Kit Schematic (Sheet of ) MAXIM 9

10 MAX/ /MAX Evaluation Kits Evaluates: MAX/MAX A A B B C C D D E E F F G G H H J J K K L L M M N N P P R R T T U U V V W W Y Y AA AA AB AB AC AC AD AD AE AE AF AF AG AG AH AH AJ AJ GND A GND_SENSE AE VID[0] A _SENSE AF VID[] AG VID[] AF VID[] AG VID[] Figure. CPU Socket (U) pinout 0 MAXIM

11 MAX/MAX Evaluation Kits Evaluates: MAX/MAX Figure. MAX/MAX EV Component Placement Guide - Top Side MAXIM

12 MAX/ /MAX Evaluation Kits Evaluates: MAX/MAX Figure. MAX/MAX EV Kit Component Placement Guide - Bottom Side MAXIM

13 MAX/MAX Evaluation Kits Evaluates: MAX/MAX Figure 6. MAX/MAX EV Kit PC Board Layout Top Side MAXIM

14 MAX/ /MAX Evaluation Kits Evaluates: MAX/MAX Figure 7. MAX/MAX EV Kit PC Board Layout GND Layer MAXIM

15 MAX/MAX Evaluation Kits Evaluates: MAX/MAX Figure. MAX/MAX EV Kit PC Board Layout Signal Layer MAXIM

16 MAX/ /MAX Evaluation Kits Evaluates: MAX/MAX Figure 9. MAX/MAX EV Kit PC Board Layout Layer 6 MAXIM

17 MAX/MAX Evaluation Kits Evaluates: MAX/MAX Figure 0. MAX/MAX EV Kit PC Board Layout Layer MAXIM 7

18 MAX/ /MAX Evaluation Kits Evaluates: MAX/MAX Figure. MAX/MAX EV Kit PC Board Layout Layer 6 MAXIM

19 MAX/MAX Evaluation Kits Evaluates: MAX/MAX Figure. MAX/MAX EV Kit PC Board Layout Layer 7 MAXIM 9

20 MAX/ /MAX Evaluation Kits Evaluates: MAX/MAX Figure. MAX/MAX EV Kit PC Board Layout Bottom Layer 0 MAXIM

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