MAX19586/MAX19588 Evaluation Kits

Transcription

1 9-405; Rev ; /06 MAX9586/MAX9588 Evaluation Kits General Description The MAX9586/MAX9588 evaluation kits (EV kits) are fully assembled and tested PCBs that contain all the components necessary to evaluate the performance of the MAX9586 and MAX9588. The MAX9586 is a 6-bit, 80Msps analog-to-digital converter (ADC), while the MAX9588 is a 6-bit, 00Msps ADC. The MAX9586/MAX9588 EV kits can accept a differential or single-ended analog input. For applications with a single-ended signal source, the MAX9586/MAX9588 EV kits feature an on-board transformer that converts this signal to the required differential signal. The digital outputs produced by the MAX9586/MAX9588 can be captured with a logic analyzer or data-acquisition system. The EV kits operate from a.v and a.8v power supply. Part Selection Table PART NUMBER BITS SPEED (Msps) MAX9586ETN MAX9588ETN+ 00 DESIGNATION QTY DESCRIPTION C, C6, C0, C8, C8 C C C5, C8, C9, C, C 0 C, C4 C9, C, C5 C0, C, C6 C, C4, C7 ±0%, 50V X7R ceramic capacitors (060) TDK C608X7RH04K 0 Not installed capacitors (060) µf ±0%, 6V X5R ceramic capacitors (060) TDK C608X5RC05K 0µF ±0%, 6.V low-esr tantalum capacitors (D-case) AVX TPSD7M006R000 47µF ±0%, 6.V X5R ceramic capacitors (0) TDK C5X5R0J476M.µF ±0%, 6.V X5R ceramic capacitors (060) TDK C608X5R0J5M Features Fully Assembled and Tested Up to 80Msps/00Msps Sampling Rate Single-Ended-to-Differential Clock Conversion Circuitry Configurable for Differential or Single-Ended Analog Input Signals On-Board Digital Output Buffer Low-Voltage and Low-Power Operation Simplifies Evaluation of the MAX9586/MAX9588 Ordering Information PART TEMP RANGE IC PACKAGE MAX9586EVKIT+ 0 C to +70 C* 56 Thin QFN-EP** MAX9588EVKIT+ 0 C to +70 C* 56 Thin QFN-EP** +Denotes a lead-free and RoHS-compliant EV kit. *This limited temperature range is for the EV kit PCB only. The MAX9586MAX9588 IC temperature range is -40 C to +85 C. **EP = Exposed paddle. Component List DESIGNATION QTY DESCRIPTION C4, C8, C9, C40 C5, C6, C4, C4, C4 4 5 C7 D 0.0µF ±0%, 6V X7R ceramic capacitors (006) TDK C086X7RC0K ±0%, 6V X7R ceramic capacitors (006) TDK C086X7RC04M ±0%, 6.V X5R ceramic capacitor (00) TDK C060X5R0J04K Murata GRMR60J04K 5mA, 70V, d ual S chottky d iod e ( S OT) Diodes Inc. BAS70-04 or Central Semiconductor CMPD66S C LOC K, IN P U T+ SMA PC mount connectors INPUT- 0 N ot i nstal l ed S M A P C m ount connector J, J -pin headers J, J4 x 8-pin headers Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at , or visit Maxim s website at

2 DESIGNATION QTY DESCRIPTION J5 x 0-pin header J6 L, L, L L4 0 R R5, R8, R9, R R6, R7, R0, R PCB pin strip, 6 pins, 5mm pitch, 50V, 0A EMI filters (806) Murata NFM4PC04FHB Not installed, high-q chip inductor (060) 0 Not installed, resistors (060) Ω ±% resistors (060) R 0kΩ ±% resistor (060) R4 0Ω ±5% resistor (060) R5 49.9Ω ±% resistor (040) RA, RA EV KIT PART NUMBER MAX9586EVKIT+ MAX9588EVKIT+ **EP = Exposed paddle. 0Ω ±5% resistor arrays Panasonic EXB-HV-J REFERENCE DESIGNATOR U Component List (continued) DESIGNATION QTY DESCRIPTION T, T T U U U : RF transformers Mini-Circuits ADT-T+ : RF transformer Mini-Circuits T-T-KK8+ See the EV Kit-Specific Component List section Low-voltage, -bit register (64-pin TSSOP) Fairchild 74VCX67MTD TinyLogic ULP-A inverter with Schmitt trigger input (SC70-5) Fairchild NC7SV4P5X P C b oar d ter m i nal b l ock ( p l ug onto the J6 p i n str ip ) 6 p i ns, 5m m pi tch, 50V, 0A PCB: MAX9586/MAX9588 evaluation kits+ EV Kit-Specific Component List DESCRIPTION MAX9586ETN+ (56-pin, 8mm x 8mm x 0.8mm Thin QFN-EP**) MAX9588ETN+ (56-pin, 8mm x 8mm x 0.8mm Thin QFN-EP**) Component Suppliers SUPPLIER PHONE WEBSITE AVX Corp Central Semiconductor Corp Diodes Inc Fairchild Semiconductor Mini-Circuits Murata Mfg. Co., Ltd Panasonic Corp TDK Corp Note: Indicate that you are using the MAX9586/MAX9588 when contacting these component suppliers.

3 Quick Start Recommended Equipment DC power supplies: Analog ().V, 500mA Digital (DVDD).8V, 00mA Logic (VL).8V, 00mA Signal generator with low phase noise and low jitter for clock input (e.g., HP/Agilent 8644B) Signal generator for analog signal input (e.g., HP/Agilent 8644B) Analog bandpass filters for input signal and clock signal (e.g., Allen Avionics, K&L Microwave) Logic analyzer or data-acquisition system (e.g., HP/ Agilent 6500C, Tektronix TLA6) Note: The Quick Start procedure in this section only provides a quick functional check for the MAX9586/MAX9588 EV kits. To verify the full dynamic performance of the MAX9586/MAX9588, refer to the Testing the MAX958_ sections in the respective IC data sheets. Procedure The MAX9586/MAX9588 EV kits are fully assembled and tested PCBs. Follow the steps below to verify board operation (Figure ). Caution: Do not turn on power supplies or enable signal generators until all connections are completed. ) Connect the output of the clock signal generator to the input of the clock bandpass filter. ) Connect the output of the clock bandpass filter to the CLOCK SMA connector on the EV kit. ) Connect the output of the analog signal generator to the input of the analog bandpass filter. 4) Connect the output of the analog bandpass filter to the INPUT+ SMA connector on the EV kit. 5) Connect header J5 to the HP/Agilent logic analyzer. Alternatively, for Tektronix-type logic analyzers, connect to headers J, J, and J4. To capture the DOR bit (data over-range), connect a free logic analyzer data line to header J. See the Digital Output Signals section in this document for bit locations and all header designations. 6) Connect the.v, 500mA power supply to the terminal. Connect the ground terminal of this supply to the terminal. 7) Connect a.8v, 00mA power supply to the DVDD terminal. Connect the ground terminal of this supply to the terminal. 8) Connect another.8v, 00mA power supply to the VL terminal. Connect the ground terminal of this supply to the corresponding terminal. 9) Turn on the power supplies. 0) Enable the signal generators. Set the clock signal generator output power to +9dBm and the frequency (f CLK ) to 80MHz for the MAX9586 EV kit, or 00MHz for the MAX9588 EV kit. Set the analog input signal generator output to the desired frequency and amplitude. For coherent data capture, the signal generators should be phase-locked. Adjust the analog input signal level to overcome cable and filter losses that may exist in the signal s input path. Note that the ADC full scale is +9.dBm. ) Enable the logic analyzer and start collecting data.

4 Detailed Description The MAX9586/MAX9588 EV kits are fully assembled and tested PCBs that contain all the components necessary to evaluate the performance of the MAX9586 or the MAX9588 ADCs. Digital data generated by the ADCs is captured on a 6-bit bus (+ DOR bit). The EV kits can be evaluated with a maximum clock frequency (f CLK ) of 80MHz for the MAX9586, or 00Msps for the MAX9588. The EV kits are designed as six-layer PCBs to optimize the performance of the converter. The EV kits are specified to have.v and.8v power supplies applied to the analog () and digital (DVDD, VL) power planes, respectively. The digital outputs are available on connectors J5 or J and J4. J5 is a 40-pin connector, which can directly interface with a user-provided logic analyzer or dataacquisition system. The digital output clock signal, which is used to synchronize the output data to the logic analyzer, is available at the CLKO pins on J5- and J-. Power Supplies The MAX9586/MAX9588 EV kits require separate analog and digital power supplies. A.V power supply is used to power the analog portion of the ADC. Two separate.8v power supplies are recommended: DVDD powers the digital portion of the MAX9586/MAX9588, and VL powers the buffer/ driver U. Reference Voltage The full-scale range for the MAX9586/MAX9588 is set to.56v P-P by an internal reference voltage. The MAX9586/MAX9588 s internal reference voltage is.8v, and can be monitored at the REFOUT pad on the EV kit. To use the internal reference voltage, the reference input (REFIN) must be connected to the reference output (REFOUT) through resistor R. The MAX9586/MAX9588 EV kits also provide a REFIN pad, allowing an external reference source to be connected to the ADC. An external reference source can be in the range of.8v ±0%. Clock A user-provided single-ended clock signal is converted to a differential clock signal through transformer T. To reduce clock jitter, the clock signal should have high slew rates at its zero crossings. A large clock signal amplitude can be used to maximize the slew rate at its zero crossings. Diode D limits the differential signal swing at the clock input when a large clock signal is used to maximize the slew rate. The MAX9586/MAX9588 EV kits are tested with a +6dBm to +9dBm clock signal, with about 6dB loss in the bandpass filter that follows the clock signal generator. Analog Input Signal The MAX9586/MAX9588 require a differential analog input signal of less than or equal to +9.dBm (.56V P-P into 00Ω). The EV kits feature on-board transformer.v.8v.8v AV DD DV DD VL HP/AGILENT 8644B SYNC OUTPUT CLOCK BANDPASS FILTER INPUT OUTPUT MAX9586 EV KIT OR MAX9588 EV KIT J CLOCK DOR J5 6 LOGIC ANALYZER HP/AGILENT 8644B ANALOG BANDPASS FILTER (OPTIONAL) SYNC OUTPUT INPUT OUTPUT db PAD INPUT+ Figure. MAX9586/MAX9588 EV Kits Quick Start Setup and Connections 4

5 T that converts the output of a user-provided singleended signal to a differential signal for the ADC. Transformer T has a primary-to-secondary turns ratio of :.44. Therefore, the single-ended signal should have a power level of less than or equal to +9.dBm (.8V P-P into 50Ω). Cable and bandpass filter losses affect the amplitude of the received signal at the ADC. Therefore, account for these losses when configuring the signal input generator amplitude. The EV kits accept a fully differential input signal after making the following modifications: Cut the trace between resistor R PCB pads. Remove transformers T and T. Install a (060) ceramic capacitor on C. Install 0Ω (060) resistors on R, R, R4, and R5. Install an SMA connector on the INPUT- PCB footprint. Digital Output Signals The MAX9586/MAX9588 feature a 6-bit, parallel, CMOS-compatible digital output bus and a DOR bit. The digital outputs of the ADC and the DOR bit are applied to a latch that is capable of driving large capacitive loads that may be present at the logic analyzer connection. The outputs of the buffer are connected to two sets of connectors. The first set of connectors includes J for the digital output clock signal, J for the DOR bit, J and J4 for the digital output signals. This set of connectors accommodates the dataacquisition and logic-analyzer systems such as Tektronix s TLA6. The second set of connectors consists of a single 40-pin header, J5, which provides all signals, except for the DOR bit, for logic-analyzer systems such as HP/Agilent 6500C. See Table for headers J J5 bit locations. Note that a poor-quality connection may lead to apparent performance degradation. To optimize dynamic performance, avoid using flying (or individual) lead logic-analyzer probes for collecting data from the MAX9586/MAX9588 EV kits. Table. Digital Output Bit Locations BIT HEADERS J J4 HEADER J5 CLKO J- J5- DOR J- D5 J- J5-7 D4 J- J5-9 D J-5 J5- D J-7 J5- D J-9 J5-5 D0 J- J5-7 D9 J- J5-9 D8 J-5 J5- D7 J4- J5- D6 J4- J5-5 D5 J4-5 J5-7 D4 J4-7 J5-9 D J4-9 J5- D J4- J5- D J4- J5-5 D0 J4-5 J5-7 Note: All even numbered pins are connected to ground. 5

6 MAX9586/MAX9588 Evaluation Kits 6 MAX9586/MAX9588 U 74VCX67 U NC7SV4 U INP DAV (MSB) (LSB) DOR 5 D5 49 O5 R8 SHORT C4 R6 49.9Ω % R7 49.9Ω % C5 R4 R INPUT+ C A A DVDD 4 DVDD 4 DVDD 5 DVDD DVDD 6 A A 7 A 8 A 9 A A A 4 A 0 A A A 8 A 0 D D 5 D C C6 L T T INN CLKP 4 CLKN 5 R9 SHORT C SHORT C9 C SHORT REFOUT R L D R5 R R SHORT INPUT- C C8 SHORT R0 49.9Ω % R 49.9Ω % C T CLOCK REFOUT 6 REFIN REFIN 7 C µf C4 µf C8 R 0kΩ % R CLK 64 7 VCC VCC 8 VCC 47 VCC 4 58 VCC VCC VL D 5 D0 6 D9 8 D8 9 D7 4 D6 4 OE CE D5 44 D4 48 D4 45 D 47 D 46 D 46 D 48 D 45 D 49 D0 44 D0 50 D9 4 D9 5 D8 40 D8 5 D7 9 D7 5 D6 8 D6 55 D5 7 D5 56 D4 6 D4 57 D 5 D 59 D 4 D 60 D D 6 D0 D0 6 N.C. 54 N.C. 5 N.C O4 0 O 9 O 7 O 6 O0 5 O 0 O0 9 O9 7 R4 0Ω O8 6 O7 4 O6 O9 4 O8 6 J- J RA 0Ω CLKO 4 N.C. Y VCC A 5 VL J DOR J J- J-5 J-7 J-9 J- J- J-5 J- J-4 J-6 J-8 J-0 J- J-4 J-6 J5-7 J5-9 J5- J5- J5-5 J5-7 J5-9 J5- J5-8 J5-0 J5- J5-4 J5-6 J5-8 J5-0 J5- J5- J5 J5- J5-5 J5- J5-4 J5-6 O7 O6 0 O5 9 O4 8 O 6 O 5 O O0 6 J4- J RA 0Ω NC J4- J4-5 J4-7 J4-9 J4- J4- J4-5 J4- J4-4 J4-6 J4-8 J4-0 J4- J4-4 J4-6 J5- J5-5 J5-7 J5-9 J5- J5- J5-5 J5-7 J5-4 J5-6 J5-8 J5-0 J5- J5-4 J5-6 J5-8 J5-9 J5-40 R5 49.9Ω % Figure a. MAX9586/MAX9588 EV Kits Schematic (Sheet of )

7 J6 6 VL 5 4 DVDD C9 0µF 6.V C 0µF 6.V C5 0µF 6.V L VL VL C0 47µF C.µF C8 C9 C0 C C C PLACE CAPACITORS NEXT TO U PINS 7,, 8, 7, 4, AND 58, RESPECTIVELY. L DVDD DVDD C 47µF C4.µF C4 0.0µF C5 C6 C7 PLACE CAPACITORS NEXT TO U PINS 4, 4, 9, AND 5, RESPECTIVELY. L C6 47µF C7.µF C8 0.0µF C9 0.0µF C40 0.0µF C4 C4 C4 PLACE CAPACITORS C8 AND C4 NEXT TO U PINS 55 AND 56. PLACE CAPACITORS C9 AND C4 NEXT TO U PINS 7, 8, AND 9. PLACE CAPACITORS C40 AND C4 NEXT TO U PINS, 4, AND 5. Figure b. MAX9586/MAX9588 EV Kits Schematic (Sheet of ) 7

8 Figure. MAX9586/MAX9588 EV Kits Component Placement Guide Component Side 8

9 Figure 4. MAX9586/MAX9588 EV Kits PCB Layout Component Side 9

10 Figure 5. MAX9586/MAX9588 EV Kits PCB Layer 0

11 Figure 6. MAX9586/MAX9588 EV Kits PCB VDD Layer

12 Figure 7. MAX9586/MAX9588 EV Kits PCB VDD Layer 4

13 Figure 8. MAX9586/MAX9588 EV Kits PCB Layer 5

14 Figure 9. MAX9586/MAX9588 EV Kits PCB Solder Side 4

15 Figure 0. MAX9586/MAX9588 EV Kits Component Placement Guide Solder Side Pages changed at Rev : 4 Revision History Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 0 San Gabriel Drive, Sunnyvale, CA Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.