ISL8112EVAL1Z Evaluation Board Setup Procedure

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1 Application Note 9 ISLEVALZ Evaluation Board Setup Procedure The ISL is a dual-output Synchronous Buck controller with A integrated driver. It features high light load efficiency which is especially preferred in systems concerned with high efficiency in wide load range, like the battery powered system. ISL includes two constant on-time PWM controllers. Both outputs can operate in an output fixed mode or an adjustable mode. In fixed mode, one output can be V or.v and the other.v or.v. In adjustable mode, one output can range from.7v to.v, and the other from V to.v (sensing output voltage directly) or up to V (using resistor divider voltage for voltage sensing). This device also features a linear regulator providing.v/v, or adjustable from.7v to.v via REF. The linear regulator provides up to ma output current with automatic linear-regulator bootstrapping to the BYP input. When in switchover, the output can source up to ma. ISL includes on-board power-up sequencing, the power-good (PGOOD_) outputs, digital soft-start, and internal soft-stop output discharge that prevents negative voltages on shutdown. ISL is implemented with constant on-time PWM control scheme which need no sense resistors and provides ns response to load transients while maintaining a relatively constant switching frequency. The unique ultrasonic pulse-skipping mode maintains the switching frequency above khz, eliminating undesired audible noises in low frequency operation at light load. Other features include pulse skipping which maximizes efficiency in light-load applications, and fixed-frequency PWM mode which reduces RF interference in sensitive applications. Recommended Equipment V to V power supply with at least A source current capability, battery, or notebook AC adapter. Two electronic loads capable of sinking current up to A. Dummy loads for the s. Digital multimeters (DMMs). MHz quad-trace oscilloscope. Signal generator. Quick Start. Ensure that the circuit is correctly connected to the supply and loads prior to applying any power.. Verify that position s are ON for SW, SW, SW, SW, and SW. Make sure that no other position of each switch is ON at the same time.. Turn on the input power supply.. Verify the output voltages are correct.. Verify the s output voltages are correct. Evaluating the Other Output Voltage The ISLEVALZ board outputs are preset to V/7A,.V/7A and V/mA on. The V OUT can also be adjusted between.7v to.v by changing the value of R 9 and R or R and R given by Equation : R R = (EQ. ) ( V OUT V FB ) where V FB =.7V The V OUT can track OUTREF at : ratio with input voltage range from.7v to.v. Likewise, the output can also track REF at : with voltage range from.v to.v. FIGURE. TOP VIEW FIGURE. BOTTOM VIEW February, AN9. CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. --INTERSIL or Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc.. All Rights Reserved All other trademarks mentioned are the property of their respective owners.

2 Application Note 9 ISLEVALZ Board Schematic P VREF SW EN IN P P P SW VREF MODE R P R R9 P VREF R7 R R7 R C9.UF R FS C7 UF R7 P C P9 P R C UF FS EN_ R C9 R9 SW C.UF EN VREF C PF R R P VREF FS EN_ VREF REF EP R K R K U ISL BYP VOUT R FB R R K VOUT MODE PGOOD EN OUTREF ILIM VSEN MODE PGOOD EN UG PH BYP VSEN FB ILIM PGOOD EN UG PH R K PGOOD EN R R SW R R BOOT LG PGND GND NC P LG BOOT VOUT P R D C.UF R P P P PGOOD PGOOD P7 EN_ P7 BYP D NC P C UF C.UF D9 SW VOUT VOUT IRF77V Q 7 C UF Q C.UF P C.UF NC R D C UF IRF7AV Q 7 D 7 IRF7AV IRF77V Q 7 PH P9 C PF R DNP C7 PF R DNP C.UF D7 BATS D BATS L PH P R K R C 9.K.UF C DNP P R. C7 C9 DNP UF L.7UH C UF C C UF UF C.7UF D D C.UF C.UF C.UF P VOUT P VOUT P P P P.V P P7 P V FIGURE. ISLEVALZ REV A BOARD SCHEMATIC TABLE. SW EN V OUT OUTPUT CONTROL Connect to GND. V OUT output shutdown. Connect to. V OUT output active. Connect to VREF. V OUT sequence to V OUT output. TABLE. SW MODE OPERATING MODE Connect to GND. Normal operation mode, allow automatic PWM/PFM switchover for pulse-skipping at light load. Connect to. Low noise, fixed-frequency PWM mode. Connect to VREF. Ultrasonic pulse-skipping mode (khz min.) AN9. February,

3 Application Note 9 TABLE. SW EN_ CONTROL Connect to GND. output shutdown. Connect to. output active. N/C No Connect. TABLE. SW BYP OPERATING MODE Connect to GND. Set BYP to V. No switchover. Connect to V OUT. SET BYP to V OUT. Connect to V OUT. SET BYP to V OUT. TABLE. SW EN V OUT OUTPUT CONTROL Connect to GND. V OUT output shutdown. Connect to. V OUT output active. Connect to VREF. V OUT sequence to V OUT output. Components List REF DES PART NUMBER QTY MANUFACTURER DESCRIPTION C, C7, C DKATA AVX µf, V, X7R, C H-7-V GENERIC.7µF, V XR C, C TMKBJKM TAIYO-YUDEN µf, V XR C, C, C, C, C, C, C, C, C, C H--V GENERIC.µF, V, X7R, C7, C - - C9, C TPDM POSCAP SANYO µf,.v, POS CAP 9mΩ, D size C, C9, C, C7, C, C9 - - C, C POSCAP - D, D-D DIODES-INC - D, D ON-SEMI - D7, D DIODES - D9 ON-SEMI.A, V, Schottky SOT L, L DR-R7-R COOPER/COILTRONICS.7µH,.mΩ,.x.mm Shielded P, P, P-P - KEYSTONE Test Point Turret. Pad. Thole P9-P -- TEKTRONIX Scope Probe Test Point PCB Mount P, P, P, P-P, P, P-P9 KEYSTONE Miniature Red Test Point. Pad. Thole P, P KEYSTONE Miniature Black Test Point. Pad. Thole AN9. February,

4 Application Note 9 Components List (Continued) REF DES PART NUMBER QTY MANUFACTURER DESCRIPTION Q IRF7 IR V.A HEXFET Power MOSFET Q IRF7 IR V A HEXFET Power MOSFET Q IRF77V IR V.A N-Channel Power MOSFET Q IRF7AV IR V.A N-Channel Power MOSFET R, R H-R-/W GENERIC Ω, %, R H--/W GENERIC kω, %, R, R7, R9, R, R, R, R, R9, R, R, R, R7, R - - R, R - - R, R, R, R7, R, R, R, R H-R-/W GENERIC Ω, %, R H-9-/W GENERIC 9.kΩ, %, R, R, R, R H--/W GENERIC kω, %, R H-R-/W GENERIC.Ω, %, SW-SW 7BS GRAYHILL Dip Switch SPST (Raised Slide) U ISLIRZ INTERSIL High-Efficiency, Quad Output Controller Layout FIGURE. TOP COMPONENTS FIGURE. TOP ETCH AN9. February,

5 Application Note 9 Layout (Continued) FIGURE. nd LAYER FIGURE 7. rd LAYER FIGURE. BOTTOM COMPONENTS (MIRRORED) FIGURE 9. BOTTOM ETCH Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding. For information regarding Intersil Corporation and its products, see AN9. February,

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