UM4501/4511/6501/8501/8511
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1 Multi-line ESD/EMI Protections for Signal ines UM4501 DFN UM4511 DFN UM6501 DFN UM8501 DFN UM8511 DFN General Description The UM4501/UM4511/UM6501/UM8501/UM8511 is a (-C) low pass filter array with integrated TVS diodes. It is designed to suppress unwanted EMI signals and provide electrostatic discharge (ESD) protection in portable electronic equipment. This device utilizes solid-state silicon-avalanche technology for superior clamping performance and DC electrical characteristics. They have been optimized for protection of signal lines in cellular phones and other portable electronics. The device consists of identical circuits comprised of TVS diodes for ESD protection, and a C--C network for EMI filtering. A typical inductor value of 17nH and a capacitor value of 12pF are used to achieve 19dB minimum attenuation from 800MHz to 2.7GHz. The TVS diodes provide effective suppression of ESD voltages in excess of ±15kV (air discharge) and ±8kV (contact discharge) per IEC , level 4. The UM4501 is in a RoHS compliant DFN package, the UM4511 is in a RoHS compliant DFN package, the UM6501 is in a RoHS compliant DFN package, the UM8501 is in a RoHS compliant DFN package and the UM8511 is in a RoHS compliant DFN package. The leads are finished with lead-free. The small package makes it ideal for use in portable electronics such as cell phones, digital still cameras, and PDAs. Applications Signal ines Protection Cell Phone CCD Camera ines Clamshell Cell Phones Features Bidirectional EMI Filter with Integrated TVS for ESD Protection ESD Protection to IEC (ESD) evel 4, ±15kV (Air), ±8kV (Contact) Filter Performance: 19dB Minimum Attenuation from 800MHz to 2.7GHz TVS Working Voltage: 5V Inductor: 17nH (Typical) Capacitors: 12pF (Typical at V R =2.5V) Protection and Filtering for Multi ines UM4501/4511: Four ines UM6501: Six ines UM8501/8511: Eight ines Rev.03 Apr /12
2 Ordering Information Part Working Packaging Marking Channel Number Voltage Type Code UM V DFN ABC UM V DFN BB UM V DFN UM V DFN UM V DFN Shipping Qty 3000pcs /7Inch Tape & Reel Pin Configurations Top View Cd Cd ABC M BB M Device Schematic (4X) M: Month Code UM4501 DFN M: Month Code UM4511 DFN Cd Cd 6501:XX Device Schematic (6X) XX: Week Code UM6501 DFN Cd Cd Device Schematic (8X) 8501:XX XX: Week Code UM8501 DFN :XX XX: Week Code UM8511 DFN Rev.03 Apr /12
3 Absolute Maximum Ratings Parameter Symbol Value Unit Junction Temperature T J 125 C Operating Temperature Range T OP -40 to 85 C Storage Temperature Range T STG -55 to 150 C Electrical Characteristics (T J =25 C, unless otherwise noted) Parameter Symbol Conditions Min Typ Max Unit TVS Reverse Stand-Off Voltage V RWM 5 V TVS Reverse Breakdown Voltage V BR I T =1mA V TVS Reverse eakage Current I R V RWM =3.3V 0.1 μa DC Resistance R cc 10 Ω Filter Cut-Off Frequency f c Z source =Z load =50Ω 250 MHZ Inductance 17 nh Capacitance C d V R =2.5V, f=1mhz 12 pf Total Capacitance C total Input to GND, Each ine pf V R =2.5V, f=1mhz Stop Band Attenuation 800MHz to 2.7GHz 19 db Rev.03 Apr /12
4 Typical Operating Characteristics UM4501/4511/6501/8501/8511 Typical Insertion oss Analog Crosstalk Rev.03 Apr /12
5 Applications Information Insertion oss Insertion oss (I) is used to describe the transmission coefficient between two points in a circuit often described in terms of db. When examining S parameters, S21 is often described as insertion loss. Insertion oss and S21 will be used interchangeably from here on out. The insertion loss of a circuit with VOUT and VIN would be expressed as I=S 21 (db)=20log(v OUT /V IN ) The setup for measuring insertion loss in a 50Ω system is shown in Figure 1. It will be analyzed in a 50Ω environment, so the source impedance and load impedance is 50Ω. The transfer functions then can be analyzed in terms of insertion loss (S21). TRACKING GENERATOR SPECTRUM ANAYZER vs 50Ω UNION EMI FITER 50Ω + VIN - + VOUT - Figure 1. Test Conditions: Source Impedance=50Ω oad Impedance=50Ω Input Power=0dBm Cut Off Frequency Cut off frequency is the frequency at which the signal strength is 3.0dB less than that of its Pass Band, 3.0dB of attenuation equates to half the original signal power. The Pass Band is the range of frequencies that are allowed to pass through a filter with minimal attenuation. For our purposes it starts from DC and ends at the cut off frequency. Device Connection The UM4501/UM4511/UM6501/UM8501/UM8511 is comprised of identical circuits each consisting of a low pass filter for EMI suppression and dual TVS diodes for ESD protection. The device is in an 8-pin DFN, 12-pin DFN and 16-pin DFN package. Electrical connection is made to all the pins located at the bottom of the device. A center tab serves as the ground connection. The device has a flow through design for easy layout. All path lengths should be kept as short as possible to minimize the effects of parasitic inductance in the board traces. Ground Connection Recommendation Parasitic inductance () present in the board layout will affect the filtering performance of the device. As frequency (f) increases, the effect of the inductance becomes more dominant. This effect is given by Equation 1. Rev.03 Apr /12
6 Figure 2. Pin Identification & Configuration (UM4501 Top View) IN1 IN2 IN3 IN GND OUT1 OUT2 OUT3 OUT4 Figure 3. Pin Identification & Configuration (UM4511 Top View) Pin Identification 1-4 Input ines 5-8 Output ines Center Tab Ground Equation 1: The Impedance of an Inductor at Frequency XF XF(, f ) = 2 л f Where: = parasitic inductance in the PCB (H); f = frequency (Hz). IN1 1 8 OUT1 IN2 IN3 2 3 GND 7 6 OUT2 OUT3 IN4 4 5 OUT4 Figure 4. Pin Identification & Configuration (UM6501 Top View) IN1 IN2 IN3 IN4 IN5 IN GND OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 Figure 5. Pin Identification & Configuration (UM8501/UM8511 Top View) IN1 IN2 IN3 IN4 IN5 IN6 IN GND OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 Pin Identification 1-6 Input ines 7-12 Output ines Center Tab Ground Equation 1: The Impedance of an Inductor at Frequency XF XF(, f ) = 2 л f Where: = parasitic inductance in the PCB (H) f = frequency (Hz) Pin Identification 1-8 Input ines 9-16 Output ines Center Tab Ground Equation 1: The Impedance of an Inductor at Frequency XF XF(, f ) = 2 л f Where: = parasitic inductance in the PCB (H) f = frequency (Hz) IN8 OUT8 Rev.03 Apr /12
7 Package Information Outline Drawing A E PIN 1 DOT BY MARKING A1 D Top View Side View E2 A3 e D2 Bottom View UM4501/4511/6501/8501/8511 UM4501: DFN b Pin #1 ID Symbol DIMENSIONS MIIMETERS INCHES Min Typ Max Min Typ Max A A A3 REF 0.008REF b D D E E e 0.50TYP 0.020TYP and Pattern NOTES: 1. Compound dimension: ; 2. Unit: mm; 3. General tolerance ±0.05mm unless otherwise specified; 4. The layout is just for reference. Tape and Reel Orientation ABC M Rev.03 Apr /12
8 Outline Drawing UM4511: DFN DIMENSIONS D D2 Symbol MIIMETERS INCHES Min Typ Max Min Typ Max A E E2 (Pin #1 ID) C'0.2 45º A A3 0.15REF 0.006REF e b b Top View Bottom View D D A E A1 Side View A3 E e 0.40TYP 0.016TYP and Pattern NOTES: 1. Compound dimension: ; 2. Unit: mm; 3.General tolerance ±0.05mm unless otherwise specified; 4. The layout is just for reference. Tape and Reel Orientation BB M Rev.03 Apr /12
9 Outline Drawing UM6501: DFN DIMENSIONS Symbol MIIMETERS INCHES Min Typ Max Min Typ Max D D2 A A E E2 C'0.2 45º (Pin #1 ID) A3 0.15REF 0.006REF PIN 1 DOT e b b BY MARKING Top View Bottom View D A D E2 A1 Side View A3 E E e 0.50TYP 0.020TYP and Pattern NOTES: 1. Compound dimension: ; 2. Unit: mm; 3. General tolerance ±0.05mm unless other- wise specified; 4. The layout is just for reference. Tape and Reel Orientation 6501:XX Rev.03 Apr /12
10 Outline Drawing A E A1 D PIN 1 DOT BY MARKING Top View Side View A3 E2 e D2 b Bottom View UM8501: DFN (Pin #1 ID) C'0.2 45º Symbol DIMENSIONS MIIMETERS INCHES Min Typ Max Min Typ Max A A A3 3REF 0.008REF b D D E E e 0.50TYP 0.020TYP and Pattern NOTES: 1. Compound dimension: ; 2. Unit: mm; 3. General tolerance ±0.05mm unless otherwise specified; 4. The layout is just for reference. Tape and Reel Orientation 8501:XX Rev.03 Apr /12
11 Outline Drawing UM8511: DFN DIMENSIONS Symbol MIIMETERS INCHES Min Typ Max Min Typ Max D D2 A A E PIN 1 DOT BY MARKING Top View E2 e b Bottom View C'0.2 45º (Pin #1 ID) A3 0.15REF 0.006REF b D A D A1 Side View A3 E E e 0.40TYP 0.016TYP and Pattern NOTES: 1. Compound dimension: ; 2. Unit: mm; 3. General tolerance ±0.05mm unless otherwise specified; 4. The layout is just for reference. Tape and Reel Orientation 8511:XX Rev.03 Apr /12
12 GREEN COMPIANCE Union Semiconductor is committed to environmental excellence in all aspects of its operations including meeting or exceeding regulatory requirements with respect to the use of hazardous substances. Numerous successful programs have been implemented to reduce the use of hazardous substances and/or emissions. All Union components are compliant with the RoHS directive, which helps to support customers in their compliance with environmental directives. For more green compliance information, please visit: IMPORTANT NOTICE The information in this document has been carefully reviewed and is believed to be accurate. Nonetheless, this document is subject to change without notice. Union assumes no responsibility for any inaccuracies that may be contained in this document, and makes no commitment to update or to keep current the contained information, or to notify a person or organization of any update. Union reserves the right to make changes, at any time, in order to improve reliability, function or design and to attempt to supply the best product possible. Union Semiconductor, Inc Add: Unit 606, No.570 Shengxia Road, Shanghai Tel: Fax: Website: Rev.03 Apr /12
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