AC-DC CONVERTER FIRING ERROR DETECTION

Transcription

1 BNL UC-414 AGS/AD/96-3 INFORMAL AC-DC CONVERTER FIRING ERROR DETECTION O.L. Gould July 15, 1996 OF THIS DOCUMENT IS ALTERNATING GRADIENT SYNCHROTRON DEPARTMENT BROOKHAVEN NATIONAL LABORATORY ASSOCIATED UNIVERSITIES, INC. UPTON, LONG ISLAND, NEW YORK UNDER CONTRACT NO. DE-AC02-76CH00016 WITH THE UNITED STATES DEPARTMENT OF ENERGY OF

2 DISCLAIMER Ths report was prepared as an account of work sponsored by the Unted States Government Nether the Unted States nor the Unted States Department of Energy, nor any of ther employees, nor any of ther contractors, subcontractors, or ther employees, makes any warranty, express or mpled, or assumes any legal lablty or responsblty for the accuracy, completeness, or usefulness of any nformaton, apparatus, product or process dsclosed, or represents that ts use would not nfrnge prvately owned rghts.

3 DISCLAIMER Ths report was prepared as an account of work sponsored by an agency of the Unted States Government Nether the Unted States Government nor any agency thereof, nor any of ther employees, makes any warranty, express or mpled, or assumes any legal lablty or responsblty for the accuracy, completeness, or usefulness of any nformaton, apparatus, product, or process dsclosed, or represents that ts use would not nfrnge prvately owned rghts. Reference heren to any specfc commercal product, process, or servce by trade name, trademark, manufacturer, or otherwse does not necessarly consttute or mply ts endorsement, recommendaton, or favorng by the Unted States Government or any agency thereof. The vews and opnons of authors expressed heren do not necessarly state or reflect those of the Unted States Government or any agency thereof.

4 AC-DC CONVERTER FIRING ERROR DETECTION by O. L. Gould 1.0 ABSTRACT Extractng specfc harmoncs from the rectfer output sgnal of a 6, 12, or 24 pulse ac-dc converter allows the detecton of SCR frng angle errors or complete msfres. A bandpass flter provdes the nput sgnal to a frequency-to-voltage converter. Comparng the output of the frequency-to-voltage converter to a reference voltage level provdes an ndcaton of the magntude of the harmoncs n the ac-dc converter output sgnal. 2.0 INTRODUCTION Each of the twelve Booster Man Magnet Power Supply modules consst of two three-phase, fullwave rectfer brdges n seres to provde a 560 VDC maxmum output. The harmonc contents of the twelve-pulse ac-dc converter output are multples of the 60 Hz ac power nput, wth a predomnant 720 Hz sgnal greater than 14 db n magntude above the closest harmonc components at maxmum output. The 720 Hz harmonc s typcally greater than 20 db below the 500 VDC output sgnal under normal operaton. However, SCR frng angle errors cause normally suppressed sub-harmoncs to become sgnfcant n magntude. Ths condton produces large errors n the output voltage and current of the ac-dc converter. The current regulaton crcut of the power supply system must then compensate for the errors n the ac-dc converter output current. The consequence of these condtons can be further damage to the power supply module wth the error or undue stress on the power supply system leadng to a system falure. Detecton of frng angle errors allows for the expedtous determnaton of a problem and subsequent shutdown of the power system to prevent further damage. The Rpple Detector crcut provdes fast and precse determnaton of SCR frng problems of an ac-dc converter. 3.0 PRINCIPLE The SCR frng control for a twelve-pulse ac-dc converter produces a fundamental 720 Hz voltage rpple on the output dc sgnal wth sub-harmonc components of much lower magntude. The SCR frng sequence of each sx-pulse brdge rectfer requres each SCR to conduct for 60 degrees n seres wth an adjonng SCR. Specfc pars of SCRs are conductng smultaneously for 30 degrees once wthn a 60 Hz cycle. The absence of an SCR conductng wll cause a drop n the dc level for 60 degrees wthn the 60 Hz cycle. Therefore, a large 60 Hz sgnal component wll appear n the voltage rpple sgnal. Detectng ths 60 Hz sgnal s an ndcaton of a malfuncton wthn the ac-dc converter. The 60 Hz sgnal vares n magntude wth the phaseback of the SCR frng sgnal. Hence, the phase shft of the frng angle determnes the magntude 1

5 of the 60 Hz component n both the rectfy and nvert modes. A 120 Hz frequency component s also commonly present n the output of the ac-dc converter under error condtons. The detecton of these harmonc components provde an ndcaton of the performance of the ac-dc converter. Fgure 1 provdes a graphcal representaton of the ac-dc converter prncple. The above dagram represents the operaton of a 6-pulse ac-dc converter. The same prncple holds for 12 and 24 pulse ac-dc converters. The two areas marked 'A' are equal areas. Note the maxmum dc voltage output Edo of the ac-dc converter s a boundary to these areas. The dc voltage output of the ac-dc converter s reduced as a functon of the phase control angle a as shown on the rght-sde of the dagram. Fgure 1. Graphcal representaton of the ac-dc converter prncple. The followng equatons determne the desred senstvty of the Rpple Detector crcut. q:=12 a : = rad 2 Em: = 566 volt Edo : = Em I -sn volt Number of frng pulses n one 60 Hz cycle. Phase control angle of the SCRs for the rectfy mode. The nvert mode requres a to vary from n/2 to n radans. Peak value of the ac lne-to-lne voltage. Maxmum dc output of the ac-dc converter. E : = Edo-(l- cos(oc)) volt Vcmn: =.75 volt E = Edo-cos (a) volt Amount of voltage reducton of the ac-dc converter as a functon of the phase control angle of the SCRs. Mnmum reference voltage value of the comparator at the output of the bandpass flter of the Rpple Detector crcut. It s found emprcally based on Eq and the voltage functons of the Proton run. Pulses wth a longer rsetme and falltme wll allow the Rpple Detector crcut to acheve greater senstvty. Output dc voltage of the ac-dc converter. Vcomp = - Efault a 120 volt Mnmum amount of voltage reducton detectable due to an error. Ths equaton determnes the level of senstvty of the Rpple Detector crcut. Ths equaton s further explaned below.

6 Efault a : = E - Edo-cos (a +- pm volt The mnmum detectable phase lag of the frng pulse s therefore (3 = acos \Edo/! - acosi E - Efault _q a Edo rad For E =500 volt and Vcomp : = Vcmn, q = rad These equatons are vald for q not equal to one. Vcmn s establshed to determne a lower lmt on possble detecton. The value of Vcmn s a functon of Eq, the rate at whch the ac-dc converter s pulsed, and the typcal rsetme (falltme) of the pulse. The above equatons determne the level of the reference voltage, Vcomp, of the comparator at the output of the bandpass flter by choosng a value for Pa (dependng on the level of senstvty requred) and calculatng Efaulta, gven Eq, and solvng for Vcomp. For example, f the Booster Man Magnet Power Supply's level of senstvty s chosen to be.641 rad at Eq = 500 VDC then, Efault a =250 volt Vcomp - - Efault a 120 volt hence, Vcomp = 2.08 VDC. The factor of 120 n the comparator voltage (Vcomp) equaton, arses from the current transformer rato (100) used to detect Eq, the transents produced by the bandpass flter and the approxmaton of the Booster voltage functon under a fault condton where an SCR s msfrng or the phase control angle s laggng. All other types of fault condtons produce a greater fault voltage, therefore the Vcomp equaton s a relatve lower lmt for the detecton of a fault. (Vcmn s the absolute lower lmt for the detecton of a fault.) 4.0 CIRCUIT DESCRIPTION The block dagram below summarzes the Rpple Detector crcut scheme. Vn Bandpass Flter 41 Hz to 160 Hz Comparator wth TTL converson Frequencyto-Voltage converter Output Flterng of F/V sgnal and Comparator Vout

7 4.1 FILTER DESIGN A typcal pulse for a power module of the Booster Man Magnet Power Supply s shown n Fgure 3. The man magnet cycle for the Booster machne typcally vares from 1 Hz to 7.5 Hz. The cycle rate s mportant to the flter desgn because the flter s a hgh order bandpass flter and produces large transents that ncrease wth decreasng rsetmes of pulses. The transent response of the Proton run's voltage pulses nterferes wth the detecton of the 60 Hz component due to the greater rate of pulsng and the shorter rsetme of the pulses. A method of mnmzng the nterference caused by transents s descrbed n the followng secton. A bandpass Butterworth flter desgn wth three hghpass poles and zeros, and two lowpass poles extracts the desred frequency components. The reason for a hgh order flter s to elmnate the large low frequency component and the natural rpple components of the ac-dc converter output sgnal. The low frequency component s 20 db above the 720 Hz rpple component when the ac-dc converter s operatng at maxmum output. The bandwdth of the flter s 119 Hz, wth 3 db frequences at 41 Hz and 160 Hz (shown n Fgure 2). A: COMMON MODE X: 256 H2 Y: 3 3 1= dea 18O deg Phase = 36 "~- _ *» deg /dv -1BO - 4Hz 1.6kHz B: COMMON 1MODE X: 72O Hz Y: IB db 15 db db Mag 5 db /dv / / / / \ > s -35 db / / 1.6kHz Fgure 2. Bandpass flter transfer functon.

8 These flter desgn frequences provded maxmum attenuaton of the 7.5 Hz and the 720 Hz frequency components whle allowng the 60 Hz and the 120 Hz components to pass and be detected. The output of the flter provdes the necessary nformaton to determne whether the rectfer s operatng properly. The magnet pulse shown n Fgure 3 has a bandpass flter output (nverted) as shown n Fgure 4. The flter output sgnal s the nput to a comparator that determnes the senstvty of detecton. The comparator reference voltage s Vcomp. I I I I 1 I I T d^atjwy*jj^\iww^sw>nus*f>hvfrty. ^ v J I I J I I J I t. l Seconds Fgure 3. Typcal Booster man magnet pulse (100:1 rato). r I r r y 0 > j L t. l Seconds Fgure 4. Typcal output sgnal of the bandpass flter. 4.2 DETECTION STAGE DESIGN The comparator that determnes the senstvty of detecton normalzes the ampltude of the flter output sgnal to TTL levels (see Fgure 5). A frequency-to-voltage (F/V) converter provdes an output dc voltage level relatve to the nput frequency of the comparator output sgnal. Therefore, the magntude of the transent does not affect the fnal outcome of the crcut, snce the leadng edges of the TTL pulses provde the trggerng of the F/V converter. The frequency-to-voltage

9 converter's nput comparator receves the TTL pulses. The comparator provdes a stable nput to a one-shot tmer. The one-shot tmer trggers an electronc swtch. Ths swtch controls the rate at whch a current source at the nput to an amplfer charges a capactor at the output of the amplfer (ntegrator). Therefore, a lnear relatonshp exsts between the nput frequency of the pulses and the output voltage. The one-shot tmer's capactor determnes the frequency range of operaton (0 Hz to 70 Hz). The output voltage range (0 V to 10 V) s determned by the ntegrator crcut of the amplfer and the power supply voltage of the amplfer. The F/V converter performance s further dscussed n secton 5.1. The output of the F/V converter s compared to the voltage reference level of another comparator. The output of ths comparator sends a sgnal to the PLC to shut off the power supply f the F/V converter's dc voltage output s greater than the voltage reference level of the comparator. Although the crcut s desgned to mnmze the effects of the transent sgnal, the nput sgnal to the flter should be no greater than 10 Volts peak and 20 Hz maxmum to further avod nterference from the transents produced by the flter response. o r I Seconds Fgure 5. Typcal output sgnal of the comparator under normal condtons. 5.0 PERFORMANCE The flter response produces peak ampltudes at a mnmum tme nterval of 25 ms under normal operatng condtons. The threshold level of the comparator at the output of the flter determnes the senstvty of detecton. As the threshold settng decreases, the comparator detects smaller ampltudes. The reference level s typcally set between 750 mv to 1 V to detect errors. The reference level of the output comparator s set at 8.5 VDC, whch corresponds to a 54 Hz nput sgnal to the frequency-to-voltage converter. Any frequences above 54 Hz wll cause a change of state at the output of the Rpple Detector crcut.

10 5.1 FREQUENCY-TO-VOLTAGE CONVERTER Fgure 6. Frequency-to-voltage converter output wth a 40 Hz nput sgnal. The F/V converter produces a large rpple voltage (as shown above n Fgure 6). Ths creates the possblty of a false error ndcaton. A sample-hold crcut, descrbed below, s used to reduce the voltage rpple by 15 db. An actve flter s also used at the output of the sample-hold crcut to buffer the sgnal and further reduce the rpple voltage. However, the dynamc range of the frequency-to-voltage converter s reduced from (0 Hz to 70 Hz) to (10 Hz to 65 Hz) due to the sample-hold crcut and the actve flter at the output of the F/V converter. The performance of the Rpple Detector crcut s not affected by the reducton n the dynamc range, snce the 60 Hz frequency level of the F/V converter s wthn the dynamc range. Any frequences above 65 Hz wll produce the same dc voltage output. 5.2 SAMPLE-HOLD CIRCUIT The tmng pulses for the sample-hold crcut s an nternal sgnal from the one-shot tmer output of the F/V converter (shown n Fgure 7). Ths sgnal s normalzed by a comparator before gatng an FET transstor (see fgure 8). Ths sgnal was chosen because t provdes a relable gate pulse. The FET transstor s used as an electronc swtch to sample the F/V converter's output. The rsetme and falltme of the one-shot tmer sgnal allows the gate tme to be vared based on the reference level of the comparator. Hence, the magntude of the F/V voltage rpple s controlled by the wdth of the comparator output pulses. Ideally, no F/V converter voltage rpple s desred; however, the shorter the gate tme the greater the senstvty of the comparator to a varaton n the ampltude of the one-shot sgnal. The worst case would be the comparator output not swtchng states because the one-shot sgnal does not cross the comparator nput threshold. Ths s not lkely to occur snce the one-shot sgnal s constant. However, a comparator wth good hgh frequency characterstcs s used due to the requrement of a short gate pulse. Ths fnal output s shown n Fgure 9. The rpple voltage s reduced by 15 db as observed from Fgure 6 and Fgure 9.

11 t. l seconds Fgure 7. Internal sgnal from the one-shot tmer ) 1 l l l t 10 1! ] ^7" 0 "10 1 r I Fgure 8. Comparator output wth one-shot tmer sgnal as an nput. Ths sgnal gates the FET transstor seconds Fgure 9. Frequency-to-voltage converter output utlzng the voltage rpple reducton scheme.

12 The sgnal n Fgure 9 s compared to the reference level of a comparator at the output of the Rpple Detector crcut. 6.0 CONCLUSION The Rpple Detector crcuts were tested durng a Proton run and a Heavy Ion run for a total tme of three months. Durng ths perod, the response to actual power supply errors was nonnteractve. The performance of the Rpple Detector was relable and decsve. The Rpple Detector crcuts nteracted actvely wth the Programmable Logc Controller (PLC) unts of the Booster Man Magnet Power Supply after testng was successfully completed. The PLC unts for the Booster Man Magnet Power Supply are programmed to ndcate a fault when they receve a fault state condton contnuously for 50 msec. Ths tme perod was chosen to avod trppng on any nadvertent power supply gltches. It s longer than three 60 Hz cycle tme perods - whch provdes adequate tme to determne f the power supply s malfunctonng. Hgher senstvty can be obtaned f the PLC tme perod for a fault state s reduced. However, ths wll be at the expense of nusance trpouts due to power supply gltches. The Rpple Detector crcut s a modular unt and can be used n most ac-dc converters wth adjustments made to the comparator that determnes the senstvty of the Rpple Detector crcut. 7.0 ACKNOWLEDGMENTS Specal thanks to A. Soukas and J. Geller for ther advce on the project, and to I. Marners for advce on Programmable Logc Controller unts. The support and advce from J. Sandberg, M. Bannon and the Booster Techncal Group on the mplementaton of the Rpple Detector crcuts wth the Programmable Logc Controller unts was greatly apprecated. 8.0 REFERENCES 1) Johannes Schaefer, Rectfer Crcuts: Theory and Desgn, John Wley & Sons, NY, 1965.