SN75476 THRU SN75478 DUAL PERIPHERAL DRIVERS
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1 N TRU N8 DUA PERIPERA DRIVER R0 DECEMBER 9 REVIED NOVEMBER 99 Characterized for Use to 00 ma No atch-up at V (After Conducting 00 ma) igh-voltage s (0 Typ) Clamp Diodes for Transient uppression (00 ma, ) TT- or MO-Compatible Diode-Clamped s pnp Transistor s Reduce Current tandard upply Voltage uitable for ammer-driver Applications Plastic DIP (P) With Copper-ead Frame Provides Cooler Operation and Improved Reliability description The N through N8 are dual peripheral drivers designed for use in systems that require high current, high voltage, and fast switching times. The N, N, and N8 provide AND, NAND, and OR drivers respectively. These devices have diode-clamped inputs as well as high-current, high-voltage clamp diodes on the outputs for inductive transient protection. The N, N, and N8 drivers are characterized for operation from 0 C to 0 C. schematics of inputs and outputs A Y D OR P PACKAGE (TOP VIEW) 8 Function Tables N (each AND driver) INPUT A V CC Y OUTPUT Y N (each NAND driver) INPUT A INPUT A N8 (each OR driver) OUTPUT Y OUTPUT Y VCC EQUIVAENT OF EAC INPUT TYPICA OF A OUTPUT = high level, = low level = irrelevant PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 99, Texas Instruments Incorporated POT OFFICE BO 0 DAA, TEA POT OFFICE BO OUTON, TEA
2 N TRU N8 DUA PERIPERA DRIVER R0 DECEMBER 9 REVIED NOVEMBER 99 logic symbols logic diagrams (positive logic) A N & Y Y A N Y Y Positive ogic: Y = A or A+ A N & Y Y A N Y Y Positive ogic: Y = A or A+ A N8 Y Y A N8 Y Y These symbols are in accordance with ANI/IEEE td 9-98 and IEC publication -. Positive ogic: Y = A+ or A POT OFFICE BO 0 DAA, TEA POT OFFICE BO OUTON, TEA
3 N TRU N8 DUA PERIPERA DRIVER R0 DECEMBER 9 REVIED NOVEMBER 99 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) NOTE: upply voltage, V CC (see Note ) V voltage, V I V Continuous output current (see Note ) ma Peak output current: t w 0 ms, duty cycle 0% ma t w 0 ns, duty cycle 0.00% A clamp current, I OK ma Continuous total power dissipation ee Dissipation Rating Table Operating free-air temperature range, T A C to 0 C torage temperature range, T stg C to 0 C ead temperature, mm (/ inch) from case for 0 seconds C. Voltage values are with respect to network.. Both halves of this dual circuit may conduct rated current simultaneously; however, power dissipation averaged over a short time interval must fall within the continuous power dissipation ratings. PACKAGE recommended operating conditions DIIPATION RATING TABE TA A C DERATING FACTOR TA A = 0 C POWER RATING ABOVE TA = C POWER RATING D mw.8 mw/ C mw P 000 mw 8.0 mw/ C 0 mw MIN NOM MA UNIT upply voltage, VCC.. V igh-level input voltage, VI V ow-level input voltage, VI 0.8 V Operating free-air temperature, TA 0 0 C POT OFFICE BO 0 DAA, TEA POT OFFICE BO OUTON, TEA
4 N TRU N8 DUA PERIPERA DRIVER R0 DECEMBER 9 REVIED NOVEMBER 99 electrical characteristics over recommended operating free-air temperature range PARAMETER TET CONDITION MIN TYP MA UNIT VIK clamp voltage II = ma 0.9. V VO ow-level output voltage IO = 00 ma VCC =. V, VI = V, IO = ma V VI = 0.8 V IO = 00 ma VO(BR) breakdown voltage VCC =. V, IO = 00 µa 0 0 VR(K) clamp reverse voltage VCC =. V, IR = 00 µa 0 0 VF(K) clamp forward voltage VCC =. V, IF = 00 ma V VCC =. V, VI = V, IO igh-level output current VI = 0.8 V, VO = 00 µa II igh-level input current VCC =. V, VI =. V µa II ow-level input current A input input VCC =V. V, VI = 0.8 V N VI = V 0 ICC upply current, outputs high N VCC =. V VI = 0 0 ma N8 VI = V 0 N VI = 0 ICC upply current, outputs low N VCC =. V VI = V ma All typical values are at VCC = V, TA = C. switching characteristics, V CC = V, T A = C N8 VI = 0 PARAMETER TET CONDITION MIN TYP MA UNIT tp Propagation delay time, low-to-high-level output 00 0 ns tp Propagation delay time, high-to-low-level output C = pf, R = 00 Ω,, 00 0 ns tt Transition time, low-to-high-level output ee Figure 0 ns tt Transition time, high-to-low-level output 90 ns V = V, VO igh-level output voltage after switching ee Figure IO O 00 ma, µa V 8 mv POT OFFICE BO 0 DAA, TEA POT OFFICE BO OUTON, TEA
5 N TRU N8 DUA PERIPERA DRIVER PARAMETER MEAUREMENT INFORMATION R0 DECEMBER 9 REVIED NOVEMBER 99. V VCC N N R = 00 Ω Pulse Generator (see Note A) A/ /A Circuit Under Test C = pf (see Note B) N8 0. V TET CIRCUIT Open N N8 N. V. V ns 0. V ns. V. V. V. V 0. V 0. V tp µs 0. V tp 0% 0% 0% 0% 0 ns 90% 90% tt. V. V 0 ns V tt V VO VO VOTAGE WAVEFORM NOTE: A. The pulse generator has the following characteristics: PRR = 00 kz, ZO = 0 Ω. B. C includes probe and jig capacitance. Figure. Test Circuit and Voltage Waveforms, witching Characteristics POT OFFICE BO 0 DAA, TEA POT OFFICE BO OUTON, TEA
6 N TRU N8 DUA PERIPERA DRIVER R0 DECEMBER 9 REVIED NOVEMBER 99 PARAMETER MEAUREMENT INFORMATION V = V. V V N N m 80 Ω Pulse Generator (see Note A) A Circuit Under Test C = pf (see Note B) N8 0. V TET CIRCUIT N N8 N 90%. V ns 0% ns 0 µs 0% 90%. V 90% 90%. V. V 0% 0% 0 ns 0 ns V V VO VO VOTAGE WAVEFORM NOTE: A. The pulse generator has the following characteristics: PRR =. kz, ZO = 0 Ω. B. C includes probe and jig capacitance. Figure. atch-up Test Circuit and Voltage Waveforms POT OFFICE BO 0 DAA, TEA POT OFFICE BO OUTON, TEA
7 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. pecific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPICATION UING EMICONDUCTOR PRODUCT MAY INVOVE POTENTIA RIK OF DEAT, PERONA INJURY, OR EVERE PROPERTY OR ENVIRONMENTA DAMAGE ( CRITICA APPICATION ). TI EMICONDUCTOR PRODUCT ARE NOT DEIGNED, AUTORIZED, OR WARRANTED TO BE UITABE FOR UE IN IFE-UPPORT DEVICE OR YTEM OR OTER CRITICA APPICATION. INCUION OF TI PRODUCT IN UC APPICATION I UNDERTOOD TO BE FUY AT TE CUTOMER RIK. In order to minimize risks associated with the customer s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI s publication of information regarding any third party s products or services does not constitute TI s approval, warranty or endorsement thereof. Copyright 998, Texas Instruments Incorporated
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Package Optio Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 00-mil DIPs TYPE TYPICAL MAXIMUM CLOCK FREUEY (CL = 0 pf) (MHz) TYPICAL POWER
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More informationEN: This Datasheet is presented by the m anufacturer. Please v isit our website for pricing and availability at ore.hu.
EN: This Datasheet is presented by the m anufacturer. Please v isit our website for pricing and availability at www.hest ore.hu. Convert TTL Voltage Levels to MOS Levels High Sink-Current Capability Clamping
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