JOURNAL OF MICROELECTROMECHANICAL SYSTEMS 1

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1 JOURNAL OF MICROELECTROMECHANICAL SYSTEMS 1 A Temperature-Stable Piezoelectric MEMS Oscillator Using a CMOS PLL Circuit for Temperature Sensing and Oven Control Zhengzheng Wu, Member, IEEE, and Mina Rais-Zadeh, Senior Member, IEEE Abstract In this paper, design, analysis, and implementation of a piezoelectric microelectromechanical systems (MEMS) oscillator on an ovenized microplatform is presented. An oxiderefill process is used to compensate the first-order temperature coefficient of frequency of MEMS resonators, as well as to realize thermal isolation structures. The technology enables fabrication of low-power ovenized device fusion platforms using standard silicon on insulator wafers. Utilizing the intrinsic frequencytemperature characteristic of two MEMS resonators, temperature sensing and closed-loop oven-control is realized by phaselocking two MEMS oscillators at an oven-set temperature. The design of the phase-lock control loop is studied using multidomain linear models. Control loop dynamics, noise properties, and nonideal effects are analyzed. Low-power and low-noise phaselocked loop-based control circuitry is designed in 0.18-µm CMOS to interface with the MEMS resonators. Using the developed technology, an oven controlled MEMS oscillator exhibits an overall frequency drift of <8 ppm over 40 C to 70 C without the need for system calibration. In addition, the MEMS oscillators exhibit near zero phase noise degradation in closedloop operation. [ ] Index Terms Clock, frequency reference, MEMS resonators, oscillators, phase-locked loops (PLLs), phase noise. I. INTRODUCTION TEMPERATURE-STABLE operation is critical for pushing MEMS technology to demanding applications, such as precision guidance and dead reckoning using inertial and timing measurement units. Silicon-based acoustic devices and resonant MEMS naturally suffer from temperatureinduced drift because of the intrinsic temperature coefficient of elasticity (TCE) of silicon. An uncompensated moderately doped silicon micromechanical resonator shows a linear TCF of 30 ppm/ C [1], which typically dominates the environmentally induced frequency drift of a silicon-based MEMS oscillator. This relatively large TCF needs to be compensated when making timing units or resonant-type sensors. Manuscript received January 20, 2015; revised April 21, 2015; accepted May 13, This work was supported in part by the Ames Research Center through the Early Career Faculty within NASA s Space Technology Research Grants Program, and in part by the Defense Advanced Research Projects Agency through the Single-Chip Timing and Inertial Measurement Unit Program under Award N C Subject Editor J. Miao. Z. Wu was with the University of Michigan, Ann Arbor, MI USA. He is now with Qualcomm, Inc., San Diego, CA USA ( zzwu@umich.edu). M. Rais-Zadeh is with the University of Michigan, Ann Arbor, MI USA ( minar@umich.edu). Color versions of one or more of the figures in this paper are available online at Digital Object Identifier /JMEMS One solution is to actively compensate for the frequency drift using electronics. For tight control of frequency stability, this method requires accurate monitoring of the resonator temperature. Although micro-fabrication technology allows integrating a resistive temperature detector (RTD) on-chip with MEMS devices, a previous study has revealed that temperature sensing using an on-chip RTD is non-ideal due the significantly different thermal characteristics of resonant devices and the RTD [2]. An improved method based on frequency-based temperature sensing has gained success in conventional quartz crystal references [3]. Similar method has been adopted in realizing ovenized MEMS using phase-lock loops (PLLs), including capacitively transduced MEMS resonators [4] and piezoelectric MEMS resonators [5]. A distinct feature of our previous work [2], [5] compared to other ovenized MEMS devices [4], [6] [9] is the stabilization of multiple devices in a general-purpose micro-platform without adding constraints to individual device designs. Such a micro-platform potentially paves the way for ovenized device-fusion applications. Based on our work in [5], this paper reports a new TCF-compensated MEMS resonator with improved f Q on an oven-controlled micro-platform. First, design considerations of the PLL-based temperature sensing and oven-control system are formulated in detail. Static, dynamic, and noise properties of the control system are analyzed using a multi-domain linear control model. The technique enables the implementation of temperature-stable and low phase noise MEMS oscillators. Second, non-ideal properties of the two-resonator sensing scheme are discussed in-depth, which reveals factors that limit the achievable frequency stability. The analysis takes into account additional effects including nonideal compensation on the resonator TCF and device self-heating, which are not treated in previous work [4]. Stemming from these non-ideal physical aspects, a residue frequency drift in measurement is explained. The analysis also reveals important considerations in device and thermal design for further stability improvement. Finally, flexible and low noise CMOS PLL circuitry techniques are presented for realizing the oven-control system. II. PLL-BASED TEMPERATURE SENSING AND OVEN CONTROL The active compensation based on a PLL is explained in Fig. 1. Two MEMS resonators in a thermally isolated platform are designed to have different temperature vs. frequency IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See for more information.

2 2 JOURNAL OF MICROELECTROMECHANICAL SYSTEMS Fig. 1. Principle of using two MEMS resonators on an ovenized platform to realize oscillators, temperature sensing, and PLL-based oven-control. curves. When an oscillator is referenced to a MEMS resonator, the TCF of the resonator determines the TCF of the MEMS oscillator. In the feedback control loop, two oscillators are phase-locked at a stable operating point, where the MEMS resonators are heated to a desired oven-set temperature. There are several benefits to the PLL-based sensing and control scheme: First, an oscillator referenced to a high-q resonator has low phase-noise, which minimizes noise-equivalent temperature fluctuation of the control system; Second, circuit variations, including drift of gain, resistance, capacitance, and voltage reference over process-voltage-temperature (PVT) variations, introduce a phase shift ( ϕ) in the oscillation loop. The loop responds to the phase shift and results in an output frequency change ( f ) [10]. If the oscillator is referenced a high-q resonator, a very steep phase slope (large value of ϕ/ f at the oscillation frequency) drastically desensitizes the oscillation frequency to circuit variations [10], thus, ensuring robustness in frequency-based sensing; Third, by using phaselock technique the feedback control signal is extracted from the phase difference (instead of frequency difference) between the two oscillator signals. Non-ideal circuit effects, such as voltage offset, delay, and temperature-induced variations, only induce a static phase offset if the loop is locked. As frequency is the first derivative of phase (f = dϕ/dt), a static phase offset does not result in frequency error. Therefore, the stability of a PLL-based control system has weak dependency on the circuit stability a key advantage compared to resistive or voltage based temperature sensing methods. III. PIEZOELECTRIC RESONATORS To build a two-resonator compensation system, both an uncompensated and a TCF-compensated resonator are fabricated on a thermally isolated platform using the MEMS process in [5], [11], and [12]. The structural layers of the resonators are composed of a 20 μm-thick single-crystalline silicon device layer and a 0.6 μm-thick AlN piezoelectric stack layer. An uncompensated AlN-on-Si resonator design is a 9 th -order length extensional mode bulk acoustic resonator (LBAR) adopted from [5], showing an unload Q (Q U )of9,885(f Q ) and a low motional impedance of 94. In this work, the unique strain profile of this LBAR is further exploited for efficient passive TCF compensation. For the 9 th -order length extensional mode, high strain regions on the resonator body can be identified in the strain profile obtained from finite-element method (FEM) simulation in COMSOL (Fig. 2). By placing silicon dioxide (SiO 2 ) islands in high Fig. 2. Geometry sketch, strain profile, and the oxide trenches (shown in green) used for TCF compensation of the 9 th -order LBAR. Fig. 3. Measured response of a TCF-compensated 9 th -order LBAR (inset shows the mode shape of the resonator device). Fig. 4. Measured frequency drift of a TCF-compensated and an uncompensated LBAR vs. temperature. strain regions, the resonator 1 st order TCF can be reduced. Also, as small regions of LBAR undergo high strain (Fig. 2), only narrow trenches are needed to fully compensate the negative TCF of silicon [11]. As shown in Fig. 2, the LBAR geometry is chosen to have a resonance mode near 80 MHz. The SiO 2 trench dimensions used for TCF-compensation are denoted in Fig. 2. The narrow SiO 2 trenches are placed at high strain regions, and, hence, the volume of the SiO 2 trenches is less than 10 % of the total resonator volume for compensating the 1 st -order TCF of the silicon resonator. The measured response of the TCF-compensated LBAR is showninfig.3.a9 th -order extensional mode is captured near MHz. The resonator exhibits a high Q U of 11,601 and a low motional impedance of 58. The device f Q proves high among passive-compensated silicon MEMS resonators [11], [13], [14]. The measured frequency drift vs. temperature curve of the compensated LBAR is plotted in Fig. 4. With the oxide-refill geometries used, the LBAR shows a

3 WU AND RAIS-ZADEH: TEMPERATURE-STABLE PIEZOELECTRIC MEMS OSCILLATOR USING A CMOS PLL CIRCUIT 3 Fig. 6. Heat loss due to conduction, convection, and radiation heat transfer. Fig. 5. A scanning electron microspore (SEM) image and a schematic showing the silicon platform with thermal isolation legs; geometries of the isolation legs are and patterns of the silicon oxide structures are marked. positive TCF of +4 ppm/k near a desired oven-set temperature of C. The oven temperature is chosen to be slightly higher than the industrial working range to minimize power consumption. The extracted turn-over temperature (zero 1 st -order TCF point) is 150 C. The results indicate that the TCF is over-compensated in the typical working temperature range. The over-compensation is expected due to the oxide trench widening in the fabrication process. Further optimization of the oxide patterns and better control on the fabrication are required to obtain a turn-over point at the desired temperature. IV. THERMAL DESIGN FOR THE TWO-RESONATOR PLATFORM A. Thermal Isolation Structure A thermally isolated micro-platform integrates both the uncompensated and TCF-compensated LBARs on a single device layer, as shown in Fig. 5. The active area also is surrounded by a built-in thin-film metal heater for ovenized operation. The active area in this prototype is 600 μm 600 μm, supported by four thermal isolation legs. SiO 2 islands are embedded in supporting legs (highlighted in Fig. 5). The SiO 2 islands benefiting from low thermal conductivity of SiO 2 (1.3W m 1 K 1 ) are ideal for fabricating mechanically robust isolation structures. Embedding oxide islands in silicon structures results in substantial reduction of the overall thermal conductivity (thermal conductivity of silicon is 131 W m 1 K 1 ) and thus the power consumption for ovenization. The isolation leg geometry (details in Fig. 5) is designed with sufficient stiffness to improve the robustness of the supporting structures, while good thermal isolation is obtained. Compared to meanders isolation structures [15], a larger number of low-resistance electrical interconnects can be routed, enabling readout of multiple devices on the platform. B. Thermal Properties of the Platform In thermal analysis of MEMS devices, conduction heat transfer through solid is typically treated as the dominant heat transfer mechanism, whereas convection or radiation transfer can be ignored [6], [15]. Such simplification needs to be Fig. 7. Temperature increase of the platform (red line) vs. heater power extracted from measurement. Results are compared to a silicon platform without oxide islands (black line). verified in the case of a larger platform. In Appendix I, the thermal isolation property of the platform in a hermetic package environment is analyzed. Convection and radiation heat losses are proportional to the surface area of the whole platform. These two heat losses set a limit on the overall size of a platform given a power budget. Conduction heat loss can be minimized by designing the isolation legs with a large ratio of length over cross-section area. For the platform design in this work, the heat flow (heat losses) to external environment due to conduction, convection, and radiation when the platform is set at 90 C is plotted in Fig. 6. The analysis indicates a maximum power of 8 mw for ovenization at 90 C. With this prototype design, the heat losses due to convection and radiation are almost two orders magnitude lower than that due to conduction transfer. Therefore, there is potential to design isolation legs with larger conduction thermal resistance for better thermal isolation and reduced power consumption. On the other hand, enlarging the active area without significantly degrading the thermal resistance (due to convection and radiation) is still possible, and the current design can be further scaled to a larger size for integrating more MEMS devices. The thermal resistance of the platform is also measured in an experimental setup. The temperature is measured by detecting the frequency drift of an uncompensated silicon resonator (with a known TCF of 30 ppm/k) on the platform using a vector network analyzer (VNA). The method gives reasonable accuracy in extracting the thermal resistance of the platform. As plotted in Fig. 7, the effective thermal resistance from the platform active area to the external thermal boundary is 15 K/mW at <5 mtorr ambient pressure an

4 4 JOURNAL OF MICROELECTROMECHANICAL SYSTEMS Fig. 9. Linear model for the PLL using two MEMS oscillators for temperature sensing and oven-control. Fig. 8. Equivalent thermal model of the two-resonator silicon platform. improvement of 25 compared to an all-silicon design allowing for low-power ovenization (in mw range) in a typical hermetic MEMS package. The small discrepancy in Fig. 7 between the measurement results and the analytical results mainly comes from the inaccuracy in material properties used and the assumptions made for simplified analysis. A thermal equivalent circuit model used for static and dynamic modeling of the two-resonator platform is shown in Fig. 8. Also, the physical structures of the platform that are relevant to each RC element in the model are denoted in Fig. 8. In this equivalent circuit model, temperature is represented by nodal voltage. The temperature of the large platform (excluding resonator devices) is modeled using T pl. Capacitor, C pl, models the heat capacity of the platform. The platform is thermally isolated from the external environment by four thermal isolation legs. The overall thermal resistance of the isolation legs is lumped into a single resistor, R th,leg, which is a parallel combination of four thermal resistances from the isolation legs. Inside the platform, the temperatures of two resonator devices are presented using T RES1 and T RES2, respectively. Due to the tether design in the resonator anchor (marked in Fig. 2), each resonator has its own thermal resistance that isolates the resonator body from the platform. Resistors, R th, RES1 and R th, RES2,representthe thermal resistance of two MEMS resonators. Two capacitors, C RES1 and C RES1, model the heat capacity of the resonators. The value of R th,leg is directly obtained from measured results in Fig. 7. As shown later, values of R th,leg and C pl are used to design the oven-control system. Other model parameters are difficult to measure. Instead, they are calculated using the material properties and geometry information summarized in Tables III and IV. This thermal model although simplified and not distributed [16] is reasonably accurate as: (1) the thermal resistance from the platform to the external boundary is dominated by the isolation legs (R th,leg ); (2) the thermal isolation between the resonators and the platform is determined by their supporting tethers (R th, RES1 and R th, RES2 ). In Fig. 8, heat flows due to convection (Q conv1 and Q conv2 ) and radiation (Q rad1 and Q rad2 ) heat transfer are included as current sources. Additional current sources model the built-in heater for ovenization and self-heating effect of the resonators (P drive1 and P drive2 ). The external temperature is represented by a voltage source (T ext ), which models environmental temperature variations. If the current source values in Fig. 8 were zero, the resonators and the platform were at the same temperature (T RES1 = T RES2 = T pl ). From the results of Fig. 6, the heat transfer due to convection and radiation is insignificant and they can be further neglected in a simplified analysis. However, a low phase noise oscillator typically induces a large driving power on the resonator. The resonators in oscillator circuits can experience significant self-heating [2], which induces temperature gradient in the system. If the thermal resistances of the resonators (R th,res1 and R th,res2 ) could be made very small, the temperature offset between T RES1 and T RES2 could still be minimized. The LBAR (in Fig. 2) with a configuration of multiple short tethers helps reduce R th,res1 and R th,res2. V. PLL-BASED CONTROL SYSTEM FOR OVENIZED MEMS A. PLL-Based Control Loop Design The PLL for oven control is designed with clock frequency (at the phase detector input) much higher (>10 ) than unitygain bandwidth of the PLL. In this condition, the system can be treated as a linear system [17] and studied using the linear model in Fig. 9. A simplified thermal model is used, which only includes conduction heat transfer. As seen in Fig. 9, the thermal model has an RC branch that models the thermal time constant of the platform (i.e. a thermal pole frequency), f p,pl = 1/ ( 2π R th,leg C pl ). (1) From the model parameters in Table I, other two RC thermal constants (of the resonators), f p,res1 = 1/(2π R th,res1 C RES1 ) and f p,res2 = 1/(2π R th,res2 C RES2 ),aremuch higher (more than 100 ) than f p,pl. In this paper, the PLL is designed to stabilize the platform temperature, and the unity-gain bandwidth ( f u ) of the PLL is designed much less than f p,res1 and f p,res2. Therefore, the thermal dynamic behaviors of the individual resonators are of insignificant importance when designing the control loop. In other words, the resonator temperature can track slower variations in the

5 WU AND RAIS-ZADEH: TEMPERATURE-STABLE PIEZOELECTRIC MEMS OSCILLATOR USING A CMOS PLL CIRCUIT 5 TABLE I ELEMENT PARAMETERS FOR THE SIMPLIFIED THERMAL MODEL temperature of the platform and maintain the condition of T pl = T RES1 = T RES2. Therefore, the resonator temperature is also stabilized by the control loop. The response in T pl due to heater current (I heat ) is approximated by a simple transfer function, P(s), with a low frequency pole at f p,pl. Temperature-induced frequency drift of two oscillators are modeled using coefficients TCF 1 and TCF 2. The frequency dividers have divide-ratio of 1/N 1 and 1/N 2, respectively. Two frequency inputs to the phase-frequency detector (PFD) are identical at the pre-defined oven set-point, f div0 = f OSC1 /N 1 = f OSC2 /N 2 (at the oven set-point). (2) The PFD detects the phase difference between two divideddown frequencies, and the average voltage output from the PFD indicates the phase difference. As phase is the integration of frequency, the PFD acts an integrator and can be modeled with K PFD /s in the Laplace domain. The loop filter performs filtering on the PFD output and extracts the average value. The loop filter is designed to have an additional integrator. This PLL is commonly referred to as a Type-II PLL. The heater driver generates a heating current (I heat ) from the loop filter output voltage (V CTRL ). The Joule heating is modeled as a current controlled current source (CSCS) in the linear model. The heater driver is designed using a square-root generator to linearize the transfer characteristic from the control voltage (V CTRL ) to the heater power (P heat ). Using square-root drive, the loop gain of the PLL is near constant regardless of the operating point. Hence, the heater driver is modeled using a linear function K(s). Referring to Fig. 9, the loop gain of the PLL can be expressed as A loop (s) = f div0 TCF 2π s K PFDF(s)K (s)p(s), (3) where TCF is the difference of in TCF values (TCF 1 -TCF 2 ) of the oscillators (dominated by the uncompensated resonator). The loop gain of the PLL is plotted in Fig. 10. The PLL has an integrator in the PFD and another integrator in the loop filter. The design can ensure a high DC loop gain to eliminate static errors. However, the loop is potentially unstable due to the existence of two integrators and a low frequency thermal pole ( f pl = 1/2π R th,leg C pl ). To resolve the stability issue, a special loop filter design with two compensation zeroes is employed to create sufficient phase margin at the unity-gain frequency of loop gain (Fig. 10). Also, by strategically placing the location of zeros, the loop dynamics can be defined to be independent of the thermal pole frequency ( f pl ). In this design, the control system has a unity-gain bandwith of more than 10 the thermal pole frequency ( f pl ). This indicates the PLL maintains a high loop gain to minimize the error signal in feedback even beyond the thermal response bandwith ( f pl ). Fig. 10. (a) Loop gain of the temperature controller with two compensation zeros on a Bode plot; the system has two integrators, a low-frequency thermal pole (f pl ), and two compensation zeroes (f z1 and f z2 ) in the loop filter; (b) Closed-loop gain of the control system (inset is a simple feedback model). Fig. 11. Noise sources in the PLL-based oven-control system. This property is also clearly explained using the closed-loop gain (A cl (s)) of the system, A cl (s) = A loop (s)/[1 + A loop (s)]. (4) The magnitude of A cl (s) is plotted in Fig. 10(b). The physical meaning of the closed-loop gain is interpreted in the simple feedback model in Fig. 10(b). The response of A cl (s) indicates how well the feedback error signal, T fb (s), tracks the external temperature variation, T ext (s), to effectively cancel out the temperature variations in the heated platform, T pl (s). Using the two-zero compensation technique, the system can be designed in a flexible manner to reject thermal transients up to a desired frequency range. B. Noise Analysis Noise property of the PLL-based control system is another critical concern. Noise sources cause random fluctuations in the control temperature. In Fig. 11, noise sources from

6 6 JOURNAL OF MICROELECTROMECHANICAL SYSTEMS individual circuit blocks are identified. Noise effects can be transformed to a noise-equivalent temperature (NET) of the platform (Tn,pl 2 ( f ), in unit of K2 /Hz), which determines the achievable noise-limited temperature control resolution. In calculating NET, we first consider the inherent phase noise of the MEMS oscillators (OSC1 and OSC2). The noise spectrum density of phase variation (ϕn,osc 2 ( f ) in rad2 /Hz) at the oscillator output contributes to the NET of the platform by T 2 n,pl ( f ) = OSC ( ) ϕ 2 n,osc1 ( f ) (2π f OSC1 ) 2 + ϕ2 n,osc2( f ) (2π f OSC2 ) 2 f 2 TCF 2 A cl( jf) 2. (5) For a low phase noise MEMS oscillator, the phase modulation due to noise has a small modulation index (the root-meansquare (rms) value of random fluctuation of phase is much less than 1 radian), and ϕn,osc 2 ( f ) can be related to the single side-band phase noise of an oscillator [18] (L OSC ( f), in dbc/hz at offset frequency f, typically from measurement), ϕ 2 n,osc( f )= L OSC ( f)/2 ( f can be treated as f ). (6) Similarly, the noise contribution from two frequency dividers is related to their phase noise (ϕ 2 n,div1 ( f ) and ϕn,div2 2 ( f )). Their contributions on NET can be derived as [ ] T 2 ϕ 2 n,div1 ( f ) n,pl ( f ) = DIV (2π f div0 ) 2 + ϕ2 n,div2( f ) f 2 (2π f div0 ) 2 TCF 2 A cl ( jf) 2. (7) As shown in Fig. 11, the noise contributions from the PFD and the loop filter are modeled as voltage noise, V 2 n,pfd,and Vn,Filter 2, respectively. The noise from the heater driver circuit is modeled using current noise (In,SQRT 2 ). Their noise effects on NET of the platform can be expressed as, T 2 n,pl ( f ) cas = V 2 n,pfd jf 2 f div0 TCF K PFD A cl ( jf) 2 +V 2 n,filter jf 2 f div0 TCF K PFD F( jf) A cl ( jf) 2 +V 2 n,sqrt jf 2 f div0 TCF K PFD F( jf) K ( jf) A cl ( jf) 2. (8) In (8), the noise contributions from the heater driver (V 2 n,sqrt ) is scaled by the gain of the loop filter, F( jf). Itisanatural consequence of cascading multiple gain stages. In a Type-II PLL implementation, the loop filter can have a high gain up to the PLL bandwidth, relaxing the noise requirement of the heater driver circuit. It can be observed in (5) (8) that when calculating NET, the noise source contribution is filtered by the closed-loop gain of the PLL (A cl (s)) with a cut-off frequency less than 100 Hz (Fig. 10(b)), reducing the overall noise power of the system. The noise sources also degrade the phase noise of the oscillators in the PLL. The phase noise (expressed in rad 2 /Hz) of an oscillator in the PLL includes its inherent noise and the added noise from the circuit blocks in the PLL. Due to noise invasion from OSC2, the total phase noise at the OSC1 output can be derived as (9), shown at the bottom of this page. Due to the filtering effect of A cl (s), the added phase noise is only significant at close-in-carrier region (offset frequency below 100 Hz). Noise invasion from other circuit blocks can be estimated similarly by using (7) and (8) and multiplying their NET contributions with the TCF of the oscillators to obtain added frequency (phase) noise. Also, as seen in (9), the added noise to the oscillator is scale by TCF1/ TCF. If passive TCF compensation can realize the MEMS oscillator (OSC1) with a TCF1 close to zero while maintaining a large TCF between two oscillators in the PLL, the phase noise addition on OSC1 can be minimized. This opens the possibility of using noisy circuits, including a sensing oscillator (OSC2) with poor phase noise performance (e.g., an ultra-low power MEMS oscillator) without degrading the noise performance of the main clock generator oscillator (OSC1 with a very small TCF1). For demanding noise performance, it is also beneficial to design the loop filter with low 1/f noise, as the low frequency noise contents are not filtered by the loop. C. Non-Ideal Properties of the Two-Resonator Platform The simplified thermal model used in Fig. 11 proves useful in the control system design. However, if very high stability is required, more complicated thermal mechanisms need to be considered. The PLL-based control scheme inherently has non-ideal properties that limit the achievable control accuracy. In real conditions, circuits are not ovenized in the same thermal platform as the MEMS devices. Even if we assume the resonators can always maintain a same temperature as the ovenized platform (T pl = T RES1 = T RES2 ), the temperature gradient between the MEMS platform and the external circuit varies with thermal agitations (especially in presence of fast thermal transient processes). In the analytical model of Fig. 11, the temperature parameter, T pl, describes the temperature of the MEMS devices on the platform. Due to complex temperature distributions (temperature gradients) between MEMS and circuit, the circuit parts can experience varied temperature even if the MEMS device is kept at a constant temperature. The oscillator frequency is also a weak function of the external φn,osc1 2 ( f ) tot = TCF 1 TCF A cl( jf) ( ) φn,osc1 2 ( f ) + fosc1 TCF 2 1 A cl( jf) 2 φn,osc2 2 f OSC2 TCF ( f ) (9)

7 WU AND RAIS-ZADEH: TEMPERATURE-STABLE PIEZOELECTRIC MEMS OSCILLATOR USING A CMOS PLL CIRCUIT 7 Fig. 13. Programmable counter/divider with multiple stages and circuit schematic of a divide-by-2/3 cell used in the programmable divider. Fig. 12. Non-idealities in the PLL-based oven-control scheme. (a) Unrepeatable oscillator TCFs due to temperature gradients; (b) phase-lock at the frequency where two oscillators has different effective temperature. circuit temperature. We express the oscillator frequency drifts versus MEMS device temperature variation in Fig. 12(a). The TCF curves for the two MEMS oscillators become unrepeatable if the circuit temperature changes in an unpredictable manner. Fortunately, MEMS resonators with high Q tend to reject temperature-induced effects in the external circuit. A simplified circuit of a MEMS oscillator can employ a BVD model of a MEMS resonator [19] and a transconductance stage (G m ) to present the oscillator sustaining circuitry [10]. Temperature variations of the circuit change the effective capacitance (C P ) that resonates with the inductive reactance of the resonator, and a change of C P shifts the oscillation frequency. The sensitivity of the oscillator frequency (ω OSC ) to C P can be derived as dω OSC dc P 1 2R m Q U C 2, (10) P where R m is the motional resistance of the MEMS resonator. From (10), a MEMS resonator with a high Q U (Q U > 10, 000) significantly reduces the shift of oscillator frequency due to circuit variations. A major factor that prevents the PLL-based compensation system from achieving ultra-high stability comes from the device thermal properties. In a two-resonator MEMS platform, there always exist a finite thermal resistance between the two MEMS resonators (R th,res1 plus R th,res2 in Fig. 8). Due to convection, radiation, and more importantly self-heating in the resonators, the temperature of the resonators can differ from each other when the PLL is in-lock. Even though a PLL can ensure a perfectly identical frequency at the phase detector input by locking the phase, the effective temperature of two oscillators may still differ from each other. Such a behavior is illustrated in Fig. 12(b) in an intuitive way. In real operation, the driving power on the MEMS resonators also changes with the loop gain of the oscillator. Therefore, the resonator self-heating effect is sensitive to PVT variations, making the temperature drift hard to track. Such non-ideal effect can be mitigated if one of the MEMS oscillators has near zero-tcf at the oven-set temperature (or has its turnover temperature at the oven-set temperature). This requires precise passive TCF-compensation to control the turn-over temperature of a MEMS resonator. Another solution is using a dual-mode resonator [20] to totally eliminate the temperature offset. A dual-mode resonator needs to show different TCFs in two vibration modes; the PLL-based active compensation can be realized in a similar way as a two-resonator MEMS platform. VI. CMOS PLL CIRCUIT DESIGN In this section, the design of a flexible, low-noise, and lowpower CMOS PLL oven-control circuitry is discussed. The circuit is implemented in a 0.18 μm CMOS technology. A. Low-Jitter Programmable Frequency Dividers Two frequency dividers are used to generate two clock signals with closely matched frequencies from the MEMS oscillators for phase comparison. In this work, a truly modular programmable divider/counter is implemented by cascading multiple dual-modulus divide-by-2/3 cells [21]. When N-stages of divide-by-2/3 cells are cascaded (Fig. 13), the total divide-ratio can be configured using P 0 P n 1 control bits from each divide-by-2/3 cell. With an input clock at a period of T in, the period of the output clock is T out = (2 n + 2 n 1 ) P n n 2 P n P 1 + P 0 T in. (11) For the PLL design, ten divide-by-2/3 cells are cascaded to divide the 80 MHz oscillator down to 50 khz (with a nominal divide-ratio of 1600) for phase detection. Using six programmable bits (P 0 P 6 ), the integer division ratio can be configured in a range of 1536 to 1663 (+/ 4%), which accounts for +/ 4% in the initial frequency variation of the MEMS oscillators. The frequency divide-ratio can also be programmed to fine tune the oven-set point. The divider provides a tuning resolution of 625 ppm/bit. A larger nominal divide-ratio enables finer resolution, as long as the divide-down frequency is sufficiently larger ( 10 ) than the unity gain bandwidth of the PLL loop to avoid undesirable sampling effects [17]. As the programmable divider has a long logic path, each logic stage adds jitter to the clock signal due to noise from active transistors. The clock jitter (or phase noise) of each divider stage in the cascaded chain accumulates progressively through the divider chain [22], as sketched in Fig. 14. Therefore, a divider with a large division ratio has degraded noise performance. In order to reduce the clock jitter, an additional D Flip-flop is used to provide frequency gating for the final clock output. The D Flip-flop is clocked using the reference clock input. Therefore, the final signal output will be synchronized to the initial input clock, and the accumulated jitter will be effectively bypassed [22].

8 8 JOURNAL OF MICROELECTROMECHANICAL SYSTEMS Fig. 14. Gate-level circuit schematic of the PFD. Fig. 16. Circuit schematic of the analog square-root generator and the 4-bit binary-weighted programmable heater current driver. Fig. 15. Loop filter design with one integrator, two compensation zeros, and two poles. B. Phase Frequency Detector and Loop Filter The PFD in the PLL is responsible for detecting the phase difference between two divider output clock signals, CLK1 and CLK2. The phase difference between CLK1 and CLK2 are converted to voltage output signals (V Up and V Down ) through the PFD. The voltage pulses (V Up and V Down ) are further subtracted and averaged to generate an error signal for the feedback control loop. A standard D-Flip-flop PFD is used, as sketched in Fig. 14. The phase detection range is from 2π to +2π. Referring to the phase-to-voltage transfer characteristic in Fig. 14, the gain of the PFD can be written as K PFD = V DD /(2π). (12) If two clock inputs have a large difference in frequency, the PFD also works as a frequency detector to aid locking. A delay element in the PFD circuit is used to avoid the deadband problem. The logic gates and buffers are all designed using static CMOS logic circuits. As discussed in the noise analysis, it is desirable to improve the 1/f noise performance of the circuit. The 1/f noise can be improved by using MOSFETs with large gate areas and strategic sizing [23]. In a Type-II PLL, CLK1 and CLK2 have near zero phase offset in locked condition (the output from the PFD are narrow voltage pulses with pulse width defined by the delay element to avoid deadband ) (Fig. 14). Although the net averaged PFD output (V Up V Down ) is near zero for a Type-II PLL, the loop filter for a Type-II PLL has an integrator that stores the steadystate operating point of the control loop. The narrow pulses in the Type-II PLL output contain smaller energy in the voltage ripples injected into the later loop filter stage, which relaxes the ripple-filtering specification of the loop filter. A flexible and low-noise loop filter design is proposed in this work. As shown in Fig. 15, a CMOS op-amp is configured as a loop filter. The passive RC components external to the op-amp provide flexibility in determining the transfer function of the loop filter, expressed as 1 F(s) = sr 1 (C 1 + C 2 ) 1 + sr 2 C sr 2 (C 2 // C 1 ) 1 + s (R 1 + R 3 ) C 3. (13) 1 + sr 3 C 3 F(s) contains one integrator, two zeros, and two poles. The zeros are used to ensure stability and define the PLL bandwidth. The two poles are used to provide filtering for the voltage ripples. The component values for realizing the control loop design in Fig. 10 are listed in Fig. 15. A low-noise rail-to-rail CMOS op-amp design is used to construct the loop filter [24]. As the op-amp bandwidth does not need to be wide, a low-power design becomes possible. For more demanding specifications on the noise performance, the op-amp can be modified to include chopper modulation to (almost) completely remove 1/f noise [25]. C. Square-Root Heater Driver The control voltage (V CTRL in Fig. 11) is further processed to generate a current delivered to the heater (I heat ) on the platform for active temperature control. A voltage-tocurrent (V-to-I) converter is first used to generate a control current (I CT RL ) from V CTRL, as shown in Fig. 16. A V-to-I design with a large input voltage operation range is adopted from [26]. As discussed in Section V, the transfer function from a current delivered to the heater on the platform (I heat ) to the heater power (P heat ) is quadratic (P heat = Iheat 2 R heat). Linearization on the heater gain is performed by using an analog square-root heater driver [27]. The output current of the square-root generator (I SQRT ) can be generated as I SQRT = K SQRT VCTRL. (14) where K SQRT is a constant set by circuit reference current. Then, I SQRT is amplified by using CMOS current mirrors to generate a heater driver current (I heat ) that flows into the heater resistor on the MEMS platform, as shown in Fig. 16. The current mirrors are arrayed in 4 cells, forming a 4-bit binary-weighted programmable output driver. Control bits P 0 P 4 are used for heater power control, P heat = V CT RL K SQRT2 R heat N [P 0 + 2P 1 + 4P 3 + 8P 4 ] 2. (15)

9 WU AND RAIS-ZADEH: TEMPERATURE-STABLE PIEZOELECTRIC MEMS OSCILLATOR USING A CMOS PLL CIRCUIT 9 With a control voltage range (V CTRL ) limited by the power supply, the control bits are employed to deliver an adjustable output heater power range. In practice, different thermal isolation platforms can be designed with different thermal isolation performance, and on-chip metal heaters can also have difference resistance values. These properties call for different heater power ranges to be programmed before starting the ovenized operation. The power programmability offers flexibility when interfacing various designs of MEMS thermal platforms. Referring to Fig. 9, the gain of the heater driver stage can be written as a constant with programmability, K (s) = K SQRT2 R heat N [P 0 + 2P 1 + 4P 3 + 8P 4 ] 2. (16) Regulated-cascode current mirrors are employed to mitigate current amplification errors induced from channel length modulation due to use of small gate length MOSFETs for area saving. It is also critical to consider the limited supply voltage in the CMOS circuit implementation. If a large heating current is used to ovenize the MEMS across a wide working temperature range, the voltage drop on the heater resistor (R heat ) can exceed the supply voltage limit. Fortunately, with the high thermal resistance obtained in the ovenized MEMS platforms in this work (R th,leg 15 K/mW), a voltage drop of 1.6 V on a heater resistor (R heat ) of 250 can raise the platform temperature by 150 K above the external temperature. Therefore, a nominal voltage of 1.8 V in the 0.18 μm CMOS is sufficient for designing the heater driver to cover a large working temperature range. To further extend the control range, high voltage I/O devices with a nominal supply voltage of 3.3 V can be used in designing the heater driver stage. Fig. 17. Measured output frequency drift versus temperature (inset shows photographs of the MEMS and CMOS chips on a PCB for measurement). VII. MEASUREMENT RESULTS A. Temperature Stability of the Ovenized MEMS Oscillators The CMOS chip and the MEMS chip are mounted separately in ceramic packages, and the packages are assembled on a PCB. During temperature measurements, the testing PCB is placed in a vacuum chamber with pressure of less than 10 mtorr. The chamber temperature is swept 70 to 40 C while the output frequency of the MEMS oscillators in the PLL is monitored using a frequency counter (Agilent 53181A) with a recording rate of around two samples per second. As the chamber temperature ramp is a relatively slow process, the PLL-based oven-control has a sufficiently large bandwidth to ensure dynamic performance. As a result, the two oscillators are locked during the chamber temperature ramp, and the frequency counter records identical frequency outputs from the oscillators. In the measurements, Labview interface is used to continuously record the chamber temperature and the oscillator frequency. The measured frequency drift of the ovenized MEMS oscillators is plotted in Fig. 17. The overall frequency drift is within 8 ppm in the chamber temperature range of 40 C to 70 C. Recalling that an uncompensated silicon MEMS oscillator has a TCF of 30 ppm/ C, the oven-control regulates the temperature fluctuation of the uncompensated resonator on the platform to within 367 m C. The residual Fig. 18. (a) Measured phase noise performance of the MEMS oscillator using the TCF-compensated LBAR and (b) the one using an uncompensated LBAR. frequency drift seen is due to the non-ideal characteristics of the current MEMS platform design, as discussed in Section V. B. Phase Noise The phase noise performance of the ovenized MEMS oscillators system is measured using an Agilent E5500 system. The phase noise results are is plotted in Fig. 18. Also, Fig. 18 compares the phase noise of the oscillators in the PLL and the free-running oscillators. It can be found that in the far-from-carrier region, the PLL does not degrade the phase noise of the oscillators. As discussed, the PLL is expected to have small far-from-carrier noise impact due to filtering effect by the control loop. In the close-to-carrier region, the MEMS oscillators in the PLL exhibits even better measured noise performance. In the phase noise measurement using an Agilent E5500 system, the measurement on close-in-carrier region (offset frequency in the range of Hz from carrier) takes approximately 5-10 s to complete a frequency scan. In this long scan, slow phase fluctuations due to the resonator

10 10 JOURNAL OF MICROELECTROMECHANICAL SYSTEMS TABLE II POWER CONSUMPTION OF THE PLL-BASED OVEN-CONTROL SYSTEM temperature variations cannot be distinguished from 1/f noise in the circuits. Slow temperature variations during a scan result in additional phase fluctuations in the close-in-carrier region. If the MEMS oscillators are placed in the PLL, the active compensation effectively regulates the temperature variations of the resonators. Therefore, improvement on phase noise at low offset frequencies is observed. Using the proposed low noise circuit techniques, noise from the oscillators can dominate the NET of the system. The effect of the oscillator phase noise on the NET of the platform can be calculated using (5). In the calculation, the measured phase noise of the ovenized oscillators is used. The noise power, T 2 n,pl (s) OSC, is integrated over the bandwidth of 1 Hz to 200 khz to obtain the variance of temperature due to oscillator phase noise. It is found that the square-root value of the temperature variance (NET) is 0.09 mk. The result indicates that the noise-limited temperature control accuracy is much smaller than the other non-ideal thermal effects. C. Power Consumption The power consumption of the PLL-based oven-control system is compiled in Table II. The majority of power consumption comes from the heating power used for ovenization, especially at low external temperatures. As discussed in Section IV, the heating power can be further reduced by improving the thermal isolation. In an oscillator design, self-heating of the device can occur as a result of high driving power delivered to the MEMS resonator. The self-heating power can be estimated from the motional impedance and the peak-to-peak voltage swing (V p p ) on a resonator. As one of the major sources of non-ideal thermal effects, the self-heating power values of the MEMS resonators are estimated as 2.5 mw and 1.2 mw, respectively, for the TCF-compensated and uncompensated LBARs. The selfheating power varies over temperature due to transistor gain variations over a wide temperature range, causing residue control error. VIII. CONCLUSION In this paper, a PLL-based control scheme is demonstrated to stabilize the frequency of MEMS oscillators. The design of the resonators and the control system is presented. Circuit techniques for implementing low-noise low-power CMOS PLL are discussed. Advantages of the PLL-based temperature sensing and control scheme are analyzed in detail. Also, non-ideal effects are discussed, providing direction for further improvement on the achievable stability performance. APPENDIX As discussed earlier, heat losses include conduction, convection and radiation transfer. The thermal resistance due to conduction heat transfer can be expressed as R th,cond = L/(k A), (17) where L and A are the length and cross-section area, respectively, of a solid structure with thermal conductivity of k that conducts heat. The heat loss due to conduction transfer is Q cond = ( T pl T ext ) /Rth,cond. (18) Convection transfer, on the other hand, can be minimized by operating the device in a low-pressure environment (<1 Pa). In a low-pressure environment (<10 mtorr) offered by a MEMS package, heat transfer occurs mainly through the collision of gas molecules on the surfaces of the device, whereas intermolecular collision is insignificant [28]. With a temperature difference between the MEMS platform (T pl ) and the ambient gas (T ext ), the convection heat flux from the MEMS device to ambient can be expressed as q conv = h conv (T pl T ext ), (19) where h conv (in W m 2 K 1 ) is the convective heat transfer coefficient. The heat transfer coefficient (h conv ) is affected by several ambient conditions, including pressure, type of gas, air flow velocity, etc. The accurate number of h conv is normally obtained from experimental data and extensive characterization. Here, a simplified physical model can be used to estimate h conv [28]. h conv = α s 0 P (273/T ext ), (20) where α s is the accommodation coefficient, P is the gas pressure, and 0 is the free molecular conductivity at 0 C. Also, the entire surface area of the platform is exposed to the ambient gas, subject to convection heat loss. Convection heat flow is proportional to the surface area (A S ) of the platform, Q conv = q conv A S. (21) In calculating convection heat transfer, 0 = W m 2 K 1 mtorr 1 is used for a MEMS device in low-pressure environment with nitrogen gas [28]. Also, accommodation coefficient (α s ) of 1, and pressure (P) of 5 mtorr are used. Radiation heat transfer is also present, although insignificant. The heat flux due to radiation can be expressed as ( ) q rad = ε σ T 4 4 pl T ext, (22) where ε denotes an emissivity factor (ε is 0.52 for silicon), and σ is the Stefan-Boltzmann radiation constant (σ = W m 2 K 4 ). Radiation heat transfer becomes more significant if the MEMS platform is heated to high temperature, creating a large temperature difference between the platform (T pl ) and the ambient (T ext ). Also, heat flux (q rad ) through the total device surface area (A S ) creates a radiation heat flow, Q rad = q rad A S. (23)

11 WU AND RAIS-ZADEH: TEMPERATURE-STABLE PIEZOELECTRIC MEMS OSCILLATOR USING A CMOS PLL CIRCUIT 11 TABLE III MATERIAL PROPERTIES USEDINTHETHERMAL ANALYSIS TABLE IV GEOMETRIES OF THE SILICON PLATFORMS AND THERMAL ISOLATION LEGS Accounting for the above heat transfer mechanisms, the thermal isolation of the platform in Fig. 5 can be quantitatively analyzed by incorporating the geometry and material information in Tables III and IV. Two assumptions are used for calculating the heat losses in Fig. 6: (1) the surface area used for calculating convection and radiation transfer treats the whole active area as a square-shape box; (2) the nonuniform temperature distribution inside the active area is ignored by treating the active area (mostly silicon) as perfect thermal conductor. Assumption (2) is reasonable as the thermal resistance of the isolation legs is quite large. ACKNOWLEDGEMENT The authors would like to acknowledge the staff at Michigan Lurie Nanofabrication Facilities (LNF) and Dr. Jong-Kwan Woo at the University of Michigan for helpful discussions on the CMOS circuit implementation. REFERENCES [1] R. Melamud et al., Temperature-insensitive composite micromechanical resonators, J. Microelectromech. Syst., vol. 18, no. 6, pp , Dec [2] Z. Wu, A. Peczalski, and M. Rais-Zadeh, Low-power ovenization of fused silica resonators for temperature-stable oscillators, in Proc. IEEE IFCS, May 2014, pp [3] E. Jackson, The microcomputer compensated crystal oscillator Practical application of dual-harmonic mode quartz thermometry, in Proc. IEEE IFCS, Aug. 2004, pp [4] J. C. Salvia, R. Melamud, S. A. Chandorkar, S. F. Lord, and T. W. Kenny, Real-time temperature compensation of MEMS oscillators using an integrated micro-oven and a phase-locked loop, J. Microelectromech. Syst., vol. 19, no. 1, pp , Feb [5] Z. Wu and M. Rais-Zadeh, A temperature-stable MEMS oscillator on an ovenized micro-platform using a PLL-based heater control system, in Proc. 28th IEEE MEMS, Jan. 2015, pp [6] K. Bongsang, J. Nguyen, K. E. Wojciechowski, and R. H. Olsson, Oven-based thermally tunable aluminum nitride microresonators, J. Microelectromech. Syst., vol. 22, no. 2, pp , Apr [7] M.-H. Li, C.-S. Li, C.-H. Chin, C.-Y. Chen, and S.-S. Li, An ultra-low power ovenized CMOS-MEMS resonator monolithically integrated with interface circuits, in Proc. IEEE 26th MEMS, Jan. 2013, pp [8] M. Rinaldi, Y. Hui, C. Zuniga, A. Tazzoli, and G. Piazza, High frequency AlN MEMS resonators with integrated nano hot plate for temperature controlled operation, in Proc. IEEE IFCS, May 2012, pp [9] A. Tazzoli, G. Piazza, and M. Rinaldi, Ultra-high-frequency temperature-compensated oscillators based on ovenized AlN contourmode MEMS resonators, in Proc. IEEE IFCS, May 2012, pp [10] G. Gonzalez, Foundations of Oscillator Circuit Design. Norwood, MA, USA: Artech House, [11] V. A. Thakar, Z. Wu, A. Peczalski, and M. Rais-Zadeh, Piezoelectrically transduced temperature-compensated flexural-mode silicon resonators, J. Microelectromech. Syst., vol. 22, no. 3, pp , Jun [12] C. Zhang and K. Najafi, Fabrication of thick silicon dioxide layers for thermal isolation, J. Micromech. Microeng., vol. 14, no. 6, pp , Jun [13] R. Melamud et al., Temperature-compensated high-stability silicon resonators, Appl. Phys. Lett., vol. 90, no. 24, pp , Jun [14] R. Tabrizian, M. Pardo, and F. Ayazi, A 27 MHz temperature compensated MEMS oscillator with sub-ppm instability, in Proc. IEEE 25th MEMS, Jan. 2012, pp [15] C. M. Jha et al., Thermal isolation of encapsulated MEMS resonators, J. Microelectromech. Syst., vol. 17, no. 1, pp , Feb [16] T. Bechtold, E. B. Rudnyi, and J. G. Korvink, Dynamic electrothermal simulation of microsystems A review, J. Micromech. Microeng., vol. 15, no. 1, pp. R17 R31, Jul [17] F. M. Gardner, Charge-pump phase-lock loops, IEEE Trans. Commun., vol. 28, no. 11, pp , Nov [18] F. M. Gardner, Phaselock Techniques, 3rd ed. Hoboken, NJ, USA: Wiley, [19] J. D. Larson, III, R. C. Bradley, S. Wartenberg, and R. C. Ruby, Modified Butterworth-Van Dyke circuit for FBAR resonators and automated measurement system, in Proc. IEEE Ultrason. Symp., Oct. 2000, pp [20] J. L. Fu, R. Tabrizian, and F. Ayazi, Dual-mode AlN-on-silicon micromechanical resonators for temperature sensing, IEEE Trans. Electron Devices, vol. 61, no. 2, pp , Feb [21] C. S. Vaucher, I. Ferencic, M. Locher, S. Sedvallson, U. Voegeli, and Z. Wang, A family of low-power truly modular programmable dividers in standard 0.35-μm CMOS technology, IEEE J. Solid-State Circuits, vol. 35, no. 7, pp , Jul [22] S. Levantino, L. Romano, S. Pellerano, C. Samori, and A. L. Lacaita, Phase noise in digital frequency dividers, IEEE J. Solid-State Circuits, vol. 39, no. 5, pp , May [23] A. Homayoun and B. Razavi, Analysis of phase noise in phase/frequency detectors, IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 60, no. 3, pp , Mar [24] R. Hogervorst, J. P. Tero, R. G. H. Eschauzier, and J. H. Huijsing, A compact power-efficient 3 V CMOS rail-to-rail input/output operational amplifier for VLSI cell libraries, IEEE J. Solid-State Circuits, vol. 29, no. 12, pp , Dec [25] C. Bronskowski and D. Schroeder, Systematic design of programmable operational amplifiers with noise-power trade-off, IET Circuits, Devices Syst., vol. 1, no. 1, pp , Feb [26] C. Azcona, B. Calvo, S. Celma, N. Medrano, and P. A. Martinez, Lowvoltage low-power CMOS rail-to-rail voltage-to-current converters, IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 60, no. 9, pp , Sep [27] D. Barrettino, P. Malcovati, M. Graf, S. Hafizovic, and A. Hierlemann, CMOS-based monolithic controllers for smart sensors comprising micromembranes and microcantilevers, IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 54, no. 1, pp , Jan [28] S. Dushman, Scientific Foundations of Vacuum Technique, 2nd ed. Hoboken, NJ, USA: Wiley, Zhengzheng Wu (S 12 M 14) received the B.S. degree in microelectronics from Fudan University, Shanghai, China, in 2005; the M.S. degree in microelectronics from the Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai, in 2009; and the Ph.D. degree in electrical engineering from the University of Michigan, Ann Arbor, in He has been with Qualcomm Inc., San Diego, CA, since 2014, where he designs mixed-signal integrated circuits for mobile processors. He was an Intern with the Samsung Research Laboratory, Dallas, TX, in 2011, where he was involved in developing wireless transmitter modules using RF microelectromechanical systems (MEMS) technology. His research interests include MEMS, microsystems, and mixed-signal circuits. Dr. Wu was a recipient of the Rackham International Student Fellowship from the University of Michigan from 2010 to 2011, the Best Poster Award at the Transducers Conference in 2013, and the Best Student Paper Finalist at the International Microwave Symposium in 2011.

12 12 JOURNAL OF MICROELECTROMECHANICAL SYSTEMS Mina Rais-Zadeh (S 03 M 08 SM 12) received the B.S. degree in electrical engineering from the Sharif University of Technology, and the M.S. and Ph.D. degrees in electrical and computer engineering from the Georgia Institute of Technology, in 2005 and 2008, respectively. From 2008 to 2009, she was a Postdoctoral Research Fellow with the Georgia Institute of Technology. In 2009, she joined the University of Michigan, Ann Arbor, as an Assistant Professor of Electrical Engineering and Computer Science. Since 2014, she has been an Associate Professor of Electrical Engineering and Computer Science with courtesy appointment with the Department of Mechanical Engineering. She is currently on sabbatical leave with NASA JPL. Dr. Rais-Zadeh s research interests include electron devices for wireless communication and sensing applications and the related device physics, resonant micromechanical devices, RF microelectromechanical systems (MEMS), gallium nitride MEMS, and micro/nano fabrication process development. She was a recipient of the NSF CAREER Award in 2011, the IEEE Electron Device Society Early Career Award in 2011, the NASA Early Career Faculty Award in 2012, the Crosby Research Award from the University of Michigan in 2013, the National Academy of Engineering Frontiers of Engineering in 2013, and the ONR Young Investigator Award in Together with her students, she received the Best Poster Award at the Transducers Conference (2013), the best paper award at the IEEE SiRF Conference (2014), and the Honorable Mention at the IEEE IMS (2014), and was the finalist in student paper competitions at the SiRF (2007) and IMS (2011) conferences. She was the Chairperson of the Display, Sensors, and MEMS Subcommittee at the 2013 IEEE International Electron Devices Meeting (IEDM), and a Member of the 2014 IEDM Executive Committee. She is a member of the American Society of Mechanical Engineers and a Distinguished Lecturer of the IEEE EDS. She served as a Member of the Technical Program Committee of the IEEE IEDM ( ), the IEEE Sensors Conference ( ), the Hilton Head Workshop (2012 and 2014), the IEEE MEMS Conference ( ), Transducers (2015), and IFCS (2015). She serves on the 2015 IEEE MEMS Executive Committee. She is an Associate Editor of IEEE ELECTRON DEVICE LETTERS and the IEEE JOURNAL OF MICROELECTRO- MECHANICAL SYSTEMS, and is on the Editorial Board of Nature Scientific Reports.

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