Keynote Speakers. Perception Technology for Automated Vehicles. Alberto Broggi

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1 Keynote Speakers Perception Technology for Automated Vehicles Alberto Broggi Prof., Ph.D., IEEE Fellow, director of VisLab, at the Università di Parma Abstract VisLab has been active in the field of intelligent vehicles for the last two decades: after the first test (2000+ km in semi-autonomous mode in 1998), VisLab designed and realized the perception system of TerraMax, the largest entry in the DARPA Challenges, and was the only vehicle that reached the end of the DARPA Grand Challenge with vision as primary sensor. After its participation to all the DARPA Challenges (Grand Challenge in 2004 and 2005, and Urban Challenge in 2007), in 2010 VisLab conceived and realized the longest ever test for autonomous driving: km from Italy to China. On July 12, 2013, VisLab tested downtown driving in a real environment for the first time ever; BRAiVE, VisLab s most advanced intelligent vehicle, drove in downtown Parma, negotiating two-way narrow rural roads, pedestrian crossings, traffic lights, artificial bumps, pedestrian areas, and tight roundabouts. It started from the University campus and reached the pedestrian area downtown Parma in total autonomy, and with absolutely no human intervention. The presentation will discuss the results of these tests and present the current trends and the evolution of ADAS (Advanced Driving Assistance Systems). The presentation will also elaborate on VisLab s vision on environmental sensing for future autonomous vehicles, being them road vehicles, but also off-road, mining, construction, and agricultural vehicles. xxix

2 Bio-sketch Alberto Broggi was born in Parma, Italy, in December He received the Dr. Ing. (Master) degree in Electronic Engineering and the Ph.D. degree in Information Technology both from the Università di Parma, Italy, in 1990 and 1994, respectively. From 1994 to 1998 he was an Assistant Professor at the Dipartimento di Ingegneria dell'informazione of the Università di Parma; from November 1998 to October 2001 he has been Associate Professor of Artificial Intelligence at the Dipartimento di Informatica e Sistemistica (Vision Laboratory) of the Università di Pavia, Italy. On November 2001 he joined again the Dipartimento di Ingegneria dell'informazione of the Università di Parma as an Associate Professor of Computer Engineering. In 2003 he got the recognition for Full Professorship in two distinct Universities and two years later became Full Professor at the Università di Parma. From 2000 to 2003 he has also been Visiting Professor at the Perception Systeme Information Lab. (PSI), Institut National des Sciences Appliquees (INSA) de Rouen, Rouen, France. The main milestones that he loves to cite are the ARGO Project (a km test done on Italian highways back in 1998 in which the ARGO vehicle drove itself in automatic way) and the setup of the Terramax vehicle who reached the finish line of the DARPA Grand Challenge He is the Director of the Artificial Vision and Intelligent Systems Lab (VisLab) and author of more than 150 publications on international scientific journals, book chapters, refereed conference proceedings, and a book covering the whole ARGO Project, which was also translated in chinese. He served as Editor-in-Chief of the IEEE Transactions on Intelligent Transportation Systems for the term ; in 2009 he acted as the new President-Elect of the IEEE Intelligent Transportation Systems Society; he was President of the same Society for the term ; and in 2012 he is Past-President. xxx

3 The Challenges of Imaging, or How to Squeeze some TeraOPS into your Mobile Jeroen Leijten Dr. Ir. Chief Imaging Architect Imaging & Camera Technologies Group (ICG), Intel Corporation Abstract Imaging has become an integral part of everyday life. The number of images captured daily with mobile phone cameras across the world is mind blowing. A whopping 350 million photos are uploaded to Facebook every day, to a large extent fueled by the fact that consumers are carrying their camera that is, their smartphone everywhere they go, continuously capturing their moments in life and sharing them with the world. Today, camera differentiation is one of the key elements on which the mobile industry competes. Camera is the number one technical feature based on which consumers make a buying decision for a specific phone or tablet. Moreover, the smartphone has become the number one device used to take pictures or record videos. This importance of camera in the mobile market, is driving a rapid pace of innovation across the imaging domain. Such innovation covers sensor and optics technologies, camera features, computer vision, and computational photography. The rapid pace of innovation in camera leads to a continuous increase in compute, storage, and I/O requirements for camera solutions that need to be integrated into SoCs. A 2014 high-end phone may include 5 concurrent cameras, take 10 pictures per second at 20 megapixel resolution, and record video in Ultra HD (4k) resolution. On top of it, it may use smart imaging features such as real-time face recognition and augmented reality, and use computational photography to enable features such as high dynamic range (HDR) capture and panorama-shot. To produce high quality results with such features, the image signal processing compute requirements for mobile devices have crossed the Tera Operations per Second (TeraOPS) mark, and memory bandwidth requirements have reached tens of Giga Bytes per second (GB/s). Although the high-end smartphone market is the main driver for camera innovation, cameras are also integrated in other compute devices, including tablets, PCs, and the new domain of wearables. Each of xxxi

4 these product and market segments comes with their own specific requirements and constraints on camera features, performance, quality and cost. Clearly, camera provides a huge opportunity for SoC innovation and differentiation, enabling the creation of superior products that can win in the market. However, the challenges of building and integrating camera solutions for different product and market segments are huge. Imaging is pushing SoC boundaries in terms of compute performance, area cost, memory bandwidth, storage, power dissipation, thermal limitations, modularity and scalability. This keynote will discuss a number of these challenges and show examples of the advancements in architecture and design methodologies required to address them. Bio-sketch Jeroen has 20 years of experience in parallel computing for applications domains such as communications, video coding and post-processing, and imaging. At Intel, he is the Chief Imaging Architect for Intel s 2D camera solutions, driving strategic architecture choices and the corresponding technology roadmap for these. Camera solutions are integrated as a combination of hardware and software IP in many of Intel s processor SoCs, incl. those for phones, tablets, and PCs. Before joining Intel, Jeroen was Chief Technology Officer at Silicon Hive, a parallel processing IP startup company that was acquired by Intel in At Silicon Hive, he has led the research & development of Silicon Hive's parallel processing technology and related development tools and libraries, which still lie at the foundation of Intel s current imaging solutions. Prior to co-founding Silicon Hive, Jeroen was leading a next-generation processor architecture and software compiler co-design project in Philips Research. Within Philips Research he has worked as a senior scientist within research groups focusing on digital VLSI and systems on silicon. Jeroen obtained a Ph.D. degree in reconfigurable multiprocessor architectures for real-time digital signal processing applications from the Eindhoven University of Technology in The Netherlands. He holds 17 US patents on processor architecture and related technology. xxxii

5 Yield & Robustness in Today s Advanced Technology Nodes Yervant Zorian Dr., Fellow & Chief Architect, Synopsys Abstract With the wide adoption of nanometer technologies, it has become crucial for today s SOCs to use advanced yield and robustness optimization solutions. These solutions provide comprehensive detection and repair of not only random defects, but also systematic and process variation defects often manifested under unique test corners. Moreover, with the adoption of FinFET technologies, these advanced solutions are extended to cover new FinFET specific defects. This keynote, besides discussing the key trends and challenges of advanced nanometer technologies, will cover solutions to handle the wide range of potential defectivity in today s SOCs. It will also address post-silicon analysis and yield optimization trade-offs using volume diagnostic, failure coordinate calculation, reconfiguration and repair. With the proliferation of high-density packaging, such as 2.5D and 3D-ICs, this keynote will also cover robustness of dies and interconnects, via advanced test solutions based on IEEE test access standards. Bio-sketch Dr. Zorian is a Fellow and Chief Architect at Synopsys, Mountain View, California. Formerly, he was Distinguished Member of Technical Staff AT&T Bell Laboratories, Vice President and Chief Scientist of Virage Logic and Chief Technologist at LogicVision Inc. He received an MS degree in Computer Engineering from University of Southern California, a PhD in Electrical Engineering from McGill University, and an MBA from Wharton School of Business, University of Pennsylvania. He is currently the President of IEEE Test Technology Technical Council (TTTC), the Past General Chair of the Design Automation Conference (DAC), the Editor-in-Chief Emeritus of Design & Test of Computers, the founder & chair of IEEE 1500 Standardization Working Group, and an Adjunct Professor at University of British Columbia. He served on the Board of Governors of Computer Society and CEDA, and as the Vice President of IEEE Computer Society. He has been founder and chair of a number of workshops and symposia, including the IEEE Workshops on 3D-IC Testing, Design-for- Manufacturability & Yield, Latin American Test Workshop, and East-West Design & Test Symposium. xxxiii

6 Dr. Zorian holds 32 US patents, authored 4 books, published over 300 refereed papers and received numerous best paper awards. A Fellow of the IEEE since 1999, Dr. Zorian was the 2005 recipient of the prestigious Industrial Pioneer Award for his contribution to BIST, and the 2006 recipient of the IEEE Hans Karlsson Award for diplomacy. He is a member of the Academy of Sciences of Armenia. He received the IEEE Distinguished Services Award for leading the Test Technology Technical Council (TTTC). xxxiv