A Novel Three-Phase Rectifier with Reduced THD

Transcription

1 A Novel Three-Phase Rectifier with Reduced THD Gregory vensky and Sa Ben-Yaakov Power Electronics Laboratory Departent of Electrical and Coputer Engineering Ben-Gurion University of the Negev P. O. Box 653, Beer-Sheva SRAEL Tel: ; Fax: ; Eail: ; Website: Abstract- A high power three-phase rectifier that does not require a passive phase shifter (e.g. polyphase ulti-winding transforer) was studied analytically and by siulation. The proposed rectifier includes 6 uni-directional switches and 4 diodes that are used to realize two three-phase bridges. The outputs of the bridges are connected in parallel via two blocking reactors. One of the bridges is operating with a positive phase delay of 15 o while the other is operated with a negative delay of 15 o. Analytical derivations, confired by siulation, predict that THD of the proposed rectifier s line current will be about 17% in a wide range of load currents. t is suggested that the proposed rectifier is advantageous in high power application. 1. NTRODUCTON A nuber of ethods for reducing the input current haronics in three-phase rectifiers have been proposed in the past [1-10]. One of the approaches is the phase-shift faily that is based on parallel or separate operation of rectifier bridges that are fed by a ulti-winding polyphase transforer or auto-transforer [6-10]. A ajor drawback of such low frequency ethods is the relatively large weight and size of the transforer or auto-transforer eleents. The rectifier topology proposed in this paper includes two rectifier bridges that operate in parallel. However, we eliinated the need for a ulti-winding polyphase transforer or auto-transforer. nstead, 6 unidirectional switches (such as BJT, MOSFET, GBT or GTO) and 4 diodes that are switched at low frequency accoplish the phase shift function. Since the low frequency transforers are eliinated, the weight and size of the high power rectifier will be uch lower than in the traditional approaches.. THE PROPOSED TOPOLOGY OF THE RECTFER AND PRNCPLE OF OPERATON The rectifier (Fig. 1) consists of two three-phase controlled bridges (Bg1 and Bg) having a coon input which is connected to the feeding ac network. The outputs of the rectifier bridges are connected in parallel via two blocking reactors (BL1 and BL), the purpose of which is to reduce the interaction between the bridges. The load circuit (including resistor R o and filter capacitor C o ) is connected between the center taps p1 and p of the blocking reactors, in series with a filter reactor Lo. The principle of operation of proposed rectifier is described in this section under the following ain assuptions: ideal switches and diodes, infinity high inductances Lo, BL1, BL, ideal feeding ac network with zero inductance. Under these assuptions, the output current of the rectifier (o) does not include any ripple, there is no interaction between the two rectifier bridges and coutation processes within the rectifier bridges proceed instantly. Voltage wavefors of the bridges are presented in Fig.. The paraeter is noralized tie (=ft, f is line frequency and t is the tie), va, vb, vc are the phase input voltages, vg1-vg6 are control pulses of the switches and vo1, vo are the output voltages of the bridges. Every switch is turned on twice during the line period (with the phase shift ) and duration of each control pulse is /3. One of the bridges (Bg1) is operating with a negative delay angle: α1<0, while the other one (Bg) is operating with a positive delay angle: α>0 (Fig. ). Both delay angles have the sae absolute value: * Correspondig author

2 i A1 i B1 Bg1 Q 1 i C1 ia V B i B p1 BL1 BL V C i C i C i B i A Bg L Q o Q3 V V o Q4 Q5 Q6 o1 C o R o V o p Fig.1. Topology of proposed rectifier. α 1 = α = α (1) The wavefors of the output voltages of the bridges vo1 and vo (Figs.,3) are indigenous to an eleentary controlled rectifier. The output voltage of the whole rectifier vo (Fig. 3) is a function of vo1 and vo: v v v o1 + o o = () The expression for average output voltage of the bridges and of the whole rectifier is the sae as for the traditional three-phase bridge rectifier operating with the delay angle α: +α 6 3 V = = α V cos d 0.955V cos (3) o.av +α 6 where V is the peak line voltage. The wavefors of phase A input currents of the bridges (ia1 and ia) and of the whole rectifier (ia) are presented in Fig. 4. The phase input currents of the bridges are rectangles with the duration /3 and with the height o/, while the angle between the currents of the different bridges for the sae phase is equal to α (Fig. 4). The su of these currents is the line input current of the whole rectifier: i A1 + i A = i A (4) Thus, the input current is a two-step syetrical wavefor where the duration of lower level is /3+α, while the superiposed higher upper step has a total duration of /3-α (Fig. 4). The rs values of the rectifier line input current and of its first haronic (rs and (1)rs) were derived by analyzing wavefor ia (Fig. 4): rs = o 3 α (5) VA VA V g1 Phase voltage V g3 Output voltage of bridge Bg1 α 1 0 V g6 VB VC Control pulse of Q1 Control pulse of Q V g Control pulse of Q3 a) α 1 0 Phase voltage V B Control pulse ofq6 3 Control pulse of Q5 V g5 Control pulse of Q 4 3 V g4 Output voltage of bridge Bg α 0 α 0 b) Fig.. Voltage wavefors of rectifier bridges: (a) Bg1 and (b) Bg V o1 V o V o 3 VC α 1 α 1 α α V o1 V o Fig. 3. The output voltage (vo) as the average of the output voltages of the bridges (vo1, vo).

3 = 3 o α cos ( 1)rs (6) The total haronic distortion can be expressed as: rs (1)rs THD= (1)rs and fro (5), (6) and (7) we find: THD = 6cos α ( 3 α ) 1 (8) This function is plotted in Fig. 5. t iplies that the iniu THD value (16.88%) corresponds to a delay angle αopt=15 o which is therefore considered to be the optial one. 00A 0-00A 00A 0-00A 40 00A o 0 0A A i A i A1 o α α 3 3 α Fig.4. Line current (i A ) as the su of phase currents of the bridges (i A1 +i A ); v A -voltage of the sae phase. o o α o i A (7) t should be noted that the expected THDin is relatively high, but it is about twice lower than the THD corresponding to the basic three-phase (6-pulse) rectifier bridge (31.09%) and it is only 1.1 ties higher than the THD corresponding to the traditional 1-pulse rectifier (15.3%).. THE EFFECT OF NTERACTON BETWEEN THE RECTFER BRDGES ON THD Under practical operating conditions, the inductances of the blocking reactors (BL1 and BL, Fig. 1) have finite values. Therefore, interaction processes between the rectifier bridges will take place during the tie intervals within the delay angles α1 and α. During these periods, the external terinals of the blocking reactor BL1 or BL are connected through the conducting switches to different phases of the feeding ac network. We consider the tie interval 1 (Fig. 6) when the conducting switches Q and Q 6 connect the left terinal of BL to the phase B and the right terinal of BL - to the phase A and when the phase voltage vb is rising while the phase voltage v A is decreasing. The iddle of this interval, defined as =0, is the intersection instant of the wavefors va and vb. The line input voltage v A -v B is described in this case by a siple equation: va vb = V sin (9) and the boundaries of the interval will be at: 1=-15 o and =15 o. Taking into account (9) we obtain fro Kirchoff's low: di V sin = X s (10) s d i A1 Phase currents i B1 [THD %] Phase currents 30 i A i B 0 Phase voltages VB [α,deg] Fig.5. THD as a function of the delay angle α. 1 = 15 0 = 15 Fig. 6. Wavefors of phase currents of the first (ia1, ib1) and second (ia, ib) bridge when the interaction between the bridges is substantial; va, vb, vc - phase voltages. V C

4 where is is the circulating current flowing fro the phase A of the bridge Bg into the phase B of the bridge Bg1 through BL; =fls is reactance of the circulating circuit, i.e. it is practically the reactance of the blocking reactor including the effect of coupling between the two sections. ntegrating (10) and applying the initial conditions: is=0 at 1=-15 o and at =15 o results in the following expression for the circulating current: V i o s = (cos cos15 ) (11) The peak value of the circulating current corresponds to =0: V o 0.034V s.pk = (1 cos15 ) = (1) The average value of this current is found to be: 1 3 V V s.av = cos cos d = 1 X s 1 (13) The circulating current is is added to the ain coponent of the phase current of the "lagging" bridge Bg and is deducted fro the ain coponent of the phase current of the "leading" bridge Bg1 (Fig. 6). Therefore the lower steps of the wavefors of the rectifier input current will be convexed and concaved (Fig. 7) resulting in an increase of THD. As a first approxiation we assue that the ain coponents of phase currents of "lagging" and "leading" bridges during the interval 1 by L o = are equal to the average output currents of the bridges o1.av and o.av and have identical values: o1.av = o.av = o/ (14) where o is the output current flowing through the load resistance R o V o.av o = (15) R o As (11) iplies, the circulating current i s does not depend on the load current o. Applying (3), (1) and (15) we obtain: o s.pk X 7.1* s Ro = (16) Hence, the larger is o, copared to s.pk (i.e. the higher is X s, copared to R o ), the weaker will be the harful effect of s.pk on the THD. This is shown in Fig. 8 which was calculated using the Matheatica [11] software (solid line) and was confired by PSPCE siulation [1] carried out for different values of R o and X s (dashed line). t is thus clear that the proposed rectifier will be ore effective at high load currents o. The issue of the THD of the input current is further discussed in Section 4. Now we reove assuption (14) and find the influence of the average circulating current s.av on the average output currents of the rectifier bridges o1.av and o.av. The output characteristics of the bridges can be described by the equations: V o1.av =0.955V cos α -( o1.av - s.av )R s (17) V o.av =0.955V cos α -( o.av + s.av )R s (18) where V o1.av and V o.av are the average output voltages of the bridges and R s is the resulting on -resistance of the conducting switches and diodes. Taking into account that V o1.av = V o.av =V o.av o1.av + o.av = o we obtain fro (17) and (18): o o1.av = + (19) s.av (0) o o.av = s.av A 50A 0A -50A A Fig. 7. The wavefor of the line current of the rectifier (ia) when the interaction between the bridges is substantial; va - voltage of the sae phase. [THD, %] i A [ o ] s.pk Fig. 8. THD as a function of the ratio between the load current o and the peak of circulating current s.pk: solid line-calculation results using Matheatica software, Lo= ; dashed line- PSPCE siulation results, L o =0.4H, R o =3 00Oh, X s = Oh, V =537V.

5 We see that the average output current of the "leading" bridge ( o1.av ) is higher than o / and the average output current of the "lagging" bridge ( o.av ) is lower than o /. The difference between o1.av and o.av is s.av. Analyzing (1), (13), (16) and Fig. 8, we find that high o / s.pk ratios are needed for achieving low THD, s.av << o (1) Under these conditions inequality of average output bridge currents is practically insignificant and therefore assuption (14) can be used in the design. The influence of finite values of the output inductance L o upon THD was studied by siulation (Fig. 9). ncrease of L o by a constant ipedance ratio X s /R o provokes reduction of THD due decrease of the ripple of the current flowing through L o. The plot (Fig. 9) can be used for the selection the ratios fl o /R o and X s /R o. t is seen that THD<17% can be obtained only for fl o /R o <0.04. By setting fl o /R o near this boundary, the ratio X s /R o should be higher than 0.5. The ratio X s /R o can be reduced up to 0.5 if fl o /R o 0.1. Note that graphs (Fig. 9) corresponding to fl o /R o =0.1 and to fl o /R o = practically coincide. Therefore, the selection fl o /R o >0.1 is undesirable. n practical cases, the inductance of the ac feeding network is not zero and therefore capacitor filter should be connected to the input terinals of the rectifier. This will help to achieve fast coutation processes within the bridges. V. HGH-FREQENCY CHOPPERS AND CONVERTERS BASED ON THE PROPOSED RECTFER The proposed rectifier (Fig. 1) could be easily transfored into a chopper to facilitate output voltage regulation. n this case, diodes Do1 and Do need to be connected between the output terinals of the rectifier bridges (Fig. 10). The chopping effect is achieved by driving the control gates of the switches by a high frequency PWM signal of a fixed duty cycle (D). n this case the output voltage will be Vo.av=0.9DV () The siulations of the chopper (Fig. 10) were run for the following conditions: peak line voltage V =38, line frequency f=50hz, odulation frequency f =10kHz, duty cycle D=0.8, load resistance Ro=3Ω, capacitance of the output filter Co=100uF, inductance of the output filter Lo=0H, inductance of the blocking reactors (including the coupling effect) Ls=4H. The voltage and current wavefors of the siulation results are presented in Fig. 11. THD of the input current (up to the 90 th haronics) was found to be 16.63%. The noralized peaks of individual haronics of the input current (relative to the peak of the first haronic) were found to have the following values: (5) =8.99%, (7) =3.50%, (11) =7.08%, (13) =7.5%. Note that according to the standard EC [ THD, %] fl o = 0.0 Ro Ro Fig. 9. THD of the phase current as a function of ipedance ratios fl o /R o and X s /R o (siulation results). Bg1 ia V B D o1 L o C o ib BL1 BL D o R o V C i C Bg Fig. 10. High-frequency chopper based on proposed rectifier A 0A i A A 4.970s 4.980s 4.990s Tie Fig. 11. Siulated voltage and current wavefors of the chopper (Fig. 10): vo - output voltage of the rectifier, va - input voltage (phase A), ia -input V o

6 the liits for a high power syste (16-75A/phase) with a short circuit ratio R scc =66, is as follows: THD=17%, (5) =1%, (7) =10%, (11) =9%, (13) =6%. Consequently, according to the siulation results the THD and individual haronics of proposed rectifier coply with the standard requireents for R scc >66. V. DSCUSSON AND CONCLUSONS The proposed rectifier topology eulates the function of the 1-pulse rectifier by applying switches that are operated at twice the line frequency. The necessary phase shift is obtained by introducing delays in the two bridges. This arrangeent eliinates the need for a polyphase transforer that is traditionally used to generate the 1 pulse wavefors. Replacing the filter inductor L o by an active HF PWM converter can achieve further reduction in the size of the agnetics. The converter needs to be connected between terinals p1 and p of BL1 and BL (Fig.1) and could be of the Buck or Boost type. The control of the converter would be siple: it needs to be controlled as a constant current source. n this case the top of the phase current (Fig. 4) will be flat with a low inductance filter. More precise current wavefor can be achieved by adding a feedback loop that will force the top of the current to follow the phase voltage. The proposed rectifier was shown to reduce line haronics to a THD level of about 17%. The basic topology will be especially beneficial in very high power applications where the size and weight reduction (as copared to the passive approaches) will be significant. Copatibility to very high power is further enhanced by the fact that the switches need to be operated at low frequency. Additional size reduction can be achieved by including a high frequency chopper or converter. REFERENCES [1] H. Mao, F. C. Y. Lee, D. Boroyevich, and S. Hiti, Review of high-perforance three-phase powerfactor correction circuits, EEE Trans. on ndustrial Electronics, vol. 44, no. 4, pp , Aug [] J. W. Kolar and F. C. Zach, A novel three-phase utility interface iniizing line current haronics of high-power telecounications rectifier odules, EEE Trans. on ndustrial Electronics, vol. 44, no. 4, pp , Aug [3] M. Bauann, F. Stőgerer, J. W. Kolar, and A. Lindeann, Design of a novel ulti-clip power odule for a three-phase buck+boost unity power factor utility interface supplying the variable voltage dc link of a square-wave inverter drive, in Proceedings APEC 001, pp [4] J. C. Salon, Operating a three-phase diode rectifier with a low-input current distortion using a seriesconnected dual boost converter, EEE Trans. on Power Electronics, vol. 11, no. 4, pp , July [5] S. Choi and J. Jung, New pulse ultiplication technique based on 6-pulse thyristor converters for high power applications, in Proceedings APEC 001, pp [6] C. A. Muñoz and. Barbi, A new high-power-factor three-phase AC-DC converter: analysis, design, and experientation, EEE Trans. on Power Electronics, vol. 14, no. 1, pp , Jan [7] S. Choi, P. Enjeti, and D. Paice, New 4-pulse diode rectifier systes for utility interface of high power ac otor drives, in Proceedings APEC 96, pp [8] B. S. Lee, J. Hahn, P. N. Enjeti, and. J. Pitel, A robust three-phase active power-factor-correction and haronic reduction schee for high power, EEE Trans. on ndustrial Electronics, vol. 46, no. 3, pp , June [9] J. Hahn, M. Kang, P. N. Enjeti, and. J. Pitel, Analysis and design of haronic subtractions for three phase rectifier equipent to eet haronic copliance, in Proceedings APEC 000, pp [10] S. Hansen, U. Borup, and F. Blaabjerg, Quasi 1- pulse rectifier for adjustable speed drivers, in Proceedings APEC 001, pp [11] S. Wolfra, Matheatica, A syste for doing atheatics by coputer, Addison-Wesley Publishing Copany, nc.,1988. [1] OrCAD, PSPCE A/D, User s Guide, 1998 OrCAD, nc., Beaverton, OP 97008, USA.