Sitronix ST7063C. !"Functions. !"Features. !"Description. 80CH Segment Driver for Dot Matrix LCD. #"Dot matrix LCD driver with two 40 channel

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1 T itronix CH egment river for ot atrix LC!"Functions!"Features #"ot matrix LC driver with two channel outputs #"Bias voltage ( ~ ) #"input/output signals!"input : erial display data and control pulse from controller IC!"Output : X channels waveform for LC driving #"isplay driving bias : static to / #"Power supply for logic :. ~. #"Power supply for LC voltage ( ~ EE ) : ~ Pin QFP package and bare chip available!"escription C is a segment driver for dot matrix type LC display. It features channels with X bits bi-directional shift registers, data latches, LC drivers and logic control circuits. It is fabricated by high voltage CO process with low current consumption. The can convert serial data received from an LC controller, such as TU, into parallel data and send out LC driving waveforms to the LC panel. The is designed for general purpose LC drivers. It can drive both static and dynamic drive LC. The LI can be used as segment driver. The has pin function compatibility with the K(B) that allows the user to easily replace it with an.. /

2 pecification Revision History ersion ate escription. // First Edition. // Added QFP Pad Configuration(Page ).a // Changed Application Circuit(Page ). T Transition to.. oved QFP Package imensions Page to Page. /

3 !"Functional Block iagram EGENT RIER ATA LATCH(bits) EGENT RIER ATA LATCH(bits) EE BIIRECTIONAL HIFTER(bits) BIIRECTIONAL HIFTER(bits) CL CL CONTOL L HL R L HL R. /

4 !"Pad Arrangement (,) ize : xμm Coordinate : center Circle here to find the first PA in. PA Pitch : μm PA ize : xμm "G" arking : Easy to find the PA GE. /

5 !"Package imensions. /

6 . /!"Pin Configuration(QFP ) E E C L H L H L N C N C C L L R L R N C N C

7 !"Pad Name and Coordinates Pad No. Pad Name X Y Pad No. Pad Name X Y Pad No. Pad Name X Y EE CL - - HL - - HL CL L R L R /

8 !"Pin escription Pin Name Purpose escription I/O POWER for logic N/A GROUN for logic N/A EE LC GN for LC driving voltage N/A LC output used as select voltage level I LC output used as non select voltage level I - segment LC driver output for part O HL direction direction control for part segments I L, R data in /out If HL = then L=out, R=in If HL = then L=in, R=out I/O - segment LC driver output for part O HL direction direction control for part segments I L, R data in/out If HL = then L=out, R=in If HL = then L=in, R=out I/O alternation Alternate the LC driving waveform I CL latch clock latch the data after shift is completed I CL shift clock shift the data into the segments I. /

9 !"Functional escription Clock The CL is the clock to latch data on the falling edge. It latches the data input from the bi-directional shift register at the falling edge of CL and transfers its outputs to the LC driver circuit. The CL is the clock to shift data on the falling edge. It shifts the serial data at the falling of CL and transfers the output of each bit of the register to the latch circuit. hift Registers And ata I/O The supplies two sets of -bit shift register, which controls the shift direction by HL & HL. The HL controls the st -bit shift register, and HL controls the nd -bit shift register. When HL is connected to, the st shift direction is from to ; when HL is connected to, the shift direction changes from to. When HL is connected to, the nd shift direction is from to ; when HL is connected to, the shift direction changes from to. The L, R, L, R are data input or output option function. hift irection of Channel HL hift irection L R $ IN OUT $ OUT IN hift irection of Channel HL hift irection L R $ IN OUT $ OUT IN. /

10 !"LC Output Waveforms Output of LATCH (ATA) Output ( ~ )!"Timing Characteristics TWCKL CL IH IL TWCKH TR TF TH TU ata in (L, L) (R, R) T ata out (L, L) (R, R) OH OL TL TL TL CL TWCKH TR TU. /

11 !".C Characteristics ymbol Parameter Test Condition in. Typ. ax. Unit Applicable pin Operating oltage LC river upply oltage -EE - - IH Input High oltage -. IL Input Low oltage ILKG Input Leakage Current IN = ~ - - ua CL,CL,,HL,HL L,L,R,R OH Output High oltage IOH = -.ma L,L,R,R ~, ~ OL Output Low oltage IOL = +.ma - -. I Operating Current FCL = KHZ - ua,ee I Leakage Current IN = ~ EE - - ua ~!"A.C Characteristics ymbol Parameter Test t Condition in. ax. Unit Applicable pin FCL ata hift Frequency - - KHZ CL TWCKH Clock High Level Width - - ns CL,CL TWCKL Clock Low Level Width - - ns CL TL Clock et-up Time CL $ CL - ns CL,CL TL Clock et-up Time CL $ CL - ns CL,CL TR/TF Clock Rise/Fall Time - - ns CL,CL TU ata et-up Time - - ns L,L,R,R TH ata Hold Time - - ns L,L,R,R T ata elay Time CL = PF - ns L,L,R,R!"aximum Absolute Ratings ymbol Parameters in. ax. Unit upply oltage -. TOPR Operating Temperature - TTG torage Temperature -. /

12 !"Application Circuit : (Line x Word) Com - eg - TU B-B CC GN CL CL To PU cc(+) ot atrix LC Panel L HL HL EE eg - eg - R L R CL CL L HL HL EE Regsister Regsister Regsister Regsister Regsister R - or GN Note:Regsister=.K~K ohm R=K~Kohm R L R CL CL. /