NCP ma, Wide Input Voltage Range, Low Dropout Regulator

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1 5 ma, Wide Input Voltage Range, Low Dropout Regulator The NCP4623 is a CMOS Linear Voltage Regulator designed for wide input voltage range. The maximum operating input voltage is up to 24 V with a minimum voltage starting from 2 V. The Chip Enable (CE) pin allows the device to lower standby current to. A typ. The NCP4623 features many protections for any current or thermal sensitive devices with current fold back protection, thermal shutdown protection, and peak and short current protection. This device is available in adjustable and fixed voltage output in. V steps. They are available in very thin XDFN6.6x.6x.4 mm in size and the very popular SOT23 5 and SOT89 5 packages. Please contact your local sales office for additional output voltage options. Features Maximum Operating Input Voltage: 24 V Output Voltage Range: 2.5 V to 2. V (available in. V steps) 2.5 V to 24. V (adjustable version) Output Voltage Accuracy: ±2.% Supply Current: 5 A Stable with Ceramic Capacitors: F or more Current Fold Back Protection Peak and Short Current Protection Thermal Shutdown Protection Available in XDFN6.6 x.6 mm, SOT23 5, SOT89 5 Packages These are Pb Free Devices Typical Applications Battery powered Equipment Networking and Communication Equipment Cameras, DVRs, STB and Camcorders Home Appliances XDFN6 CASE 7AC SOT 89 5 CASE 528AB SOT 23 5 CASE 22 XXX, XXXX = Specific Device Code M, MM = Date Code ZZ = Lot Code ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet. MARKING DIAGRAMS XXX XMM XXX XZZ XXXM VIN NCP4623x VIN VOUT VOUT C n CE GND C2 n VIN C n NCP4623xADJ VIN VOUT CE ADJ GND R R2 VOUT C2 n Figure. Typical Application Schematics Semiconductor Components Industries, LLC, 26 January, 26 Rev. 4 Publication Order Number: NCP4623/D

2 Thermal Protection Thermal Protection VIN VOUT VIN VOUT ADJ Vref Vref CE Short Protection Peak Current Protection CE Short Protection Peak Current Protection GND GND NCP4623Hxxxxx NCP4623HxxADJ Figure 2. Simplified Schematic Block Diagram PIN FUNCTION DESCRIPTION Pin No. XDFN (Note ) Pin No. SOT89 5 Pin No. SOT23 Pin Name Description 3 V OUT Output pin GND Ground CE Chip enable pin (Active H ) 5 3 V IN Input pin NC/ADJ No connection (non ADJ versions) / Reference Voltage of Adjustable Output Pin (ADJ versions) 2 NC No connection. Tab is connected to GND. Tab should be connected to GND, but leaving it unconnected is also acceptable 2

3 ABSOLUTE MAXIMUM RATINGS Rating Symbol Value Unit Input Voltage (Note 2) V IN 26. V Output Voltage V OUT.3 to VIN +.3 V Chip Enable Input V CE.3 to VIN +.3 V Reference Input Voltage V ADJ.3 to VIN +.3 V Output Current I OUT 25 ma Power Dissipation XDFN6 66 Power Dissipation SOT89 5 P D 9 Power Dissipation SOT Junction Temperature T J 4 to 5 C Operation Temperature T A 4 to 85 C Storage Temperature T STG 55 to 25 C ESD Capability, Human Body Model (Note 3) ESD HBM 2 V ESD Capability, Machine Model (Note 3) ESD MM 2 V Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 2. Refer to ELECTRICAL CHARACTERISTIS and APPLICATION INFORMATION for Safe Operating Area. 3. This device series incorporates ESD protection and is tested by the following methods: ESD Human Body Model tested per AEC Q 2 (EIA/JESD22 A4) ESD Machine Model tested per AEC Q 3 (EIA/JESD22 A5) Latchup Current Maximum Rating tested per JEDEC standard: JESD78. Latchup Current Maximum Rating tested per JEDEC standard: JESD mw THERMAL CHARACTERISTICS Rating Symbol Value Unit Thermal Characteristics, XDFN6 Thermal Resistance, Junction to Air Thermal Characteristics, SOT23 5 Thermal Resistance, Junction to Air Thermal Characteristics, SOT89 5 Thermal Resistance, Junction to Air R JA 56 C/W R JA 238 C/W R JA C/W ELECTRICAL CHARACTERISTICS NCP4623Hxxxx, C IN = C OUT =. F, T A = +25 C Parameter Test Conditions Symbol Min Typ Max Unit Operating Input Voltage V IN 2 24 V Output Voltage V IN = V OUT(NOM) + 2. V, I OUT = 2 ma V OUT x.98 x.2 V Output Voltage Temp. Coefficient V IN = V OUT(NOM) + 2. V, I OUT = 2 ma, 4 C T A 5ºC V OUT / T A ± ppm/ C Line Regulation V OUT(NOM) + V V IN 24 V, I OUT = 2 ma Line Reg.5.2 %/V Load Regulation V IN = V OUT(NOM) + 2. V, IOUT = ma to 4 ma Dropout Voltage Output Current V IN = V OUT(NOM) + 2. V 2.5 V V OUT 3. V Load Reg V V OUT 5. V V V OUT 2. V 4 5 I OUT = 2 ma 2.5 V V OUT 7. V V DO.2.4 V 7. V V OUT. V V V OUT 2. V V V OUT 2.9 V I OUT 4 ma 3. V V OUT 2. V 5 mv 3

4 ELECTRICAL CHARACTERISTICS NCP4623Hxxxx, C IN = C OUT =. F, T A = +25 C Parameter Test Conditions Symbol Short Current Limit V OUT = V I SC 45 ma Quiescent Current V IN = V OUT(NOM) + 2. V, V CE = V IN I Q 5 A Standby Current V IN = 24 V, V CE = V I STB.. A CE Pin Threshold Voltage CE Input Voltage H V CEH 2. V IN V Power Supply Rejection Ratio V OUT = 3.3V V, V IN = 5.3 V, V IN =.2 V pk pk, I OUT = 3 ma, f = khz Min Typ CE Input Voltage L V CEL.3 Max Unit PSRR 35 db Output Noise Voltage f = Hz to khz, V OUT = 3.3 V, V IN = 5.3 V, I OUT = 3 ma V N 9 V rms Thermal Shutdown Temperature T SD 5 C Thermal Shutdown Release Temperature T SR 25 C ELECTRICAL CHARACTERISTICS NCP4623HxxxADJ, V ADJ = V OUT, C IN = C OUT =. F, T A = +25 C Parameter Test Conditions Symbol Min Typ Max Unit Operating Input Voltage V IN 2 24 V Output Voltage V IN = V OUT(NOM) + 2. V, I OUT = 2 ma V OUT V Output Voltage Temp. Coefficient V IN = V OUT(NOM) + 2. V, I OUT = 2 ma, 4 C T A 5ºC V OUT / T A ± ppm/ C Line Regulation V OUT(NOM) + V V IN 24 V, I OUT = 2 ma Line Reg.5.2 %/V Load Regulation V IN = V OUT(NOM) + 2. V, IOUT = ma to 4 ma Load Reg 2 5 mv Dropout Voltage I OUT = 2 ma V DO.2.4 V Output Current V IN = V OUT(NOM) + 2. V I OUT 4 ma Short Current Limit V OUT = V I SC 45 ma 3 Quiescent Current V IN = V OUT(NOM) + 2. V, V CE = V IN I Q 5 A Standby Current V IN = 24 V, V CE = V I STB.. A CE Pin Threshold Voltage CE Input Voltage H V CEH 2. V IN V CE Input Voltage L V CEL.3 Power Supply Rejection Ratio V IN = 4.5 V, V OUT = 2.5 V, V IN =.2 V pk pk, I OUT = 3 ma, f = khz Output Noise Voltage f = Hz to khz, V OUT = 2.5 V, V IN = 4.5 V, I OUT = 3 ma PSRR 4 db V N 8 V rms Thermal Shutdown Temperature T SD 5 C Thermal Shutdown Release Temperature T SR 25 C 4

5 V IN = 4.3 V 6. V 7. V 5. V T J = 4 C 25 C 5 C I OUT, OUTPUT CURRENT (ma) Figure 3. Output Voltage vs. Output Current 3.3 V Version (T J = 25 C) I OUT, OUTPUT CURRENT (ma) Figure 4. Output Voltage vs. Output Current 3.3 V Version V IN = 5.3 V V IN = 6.5 V 8. V. 7. V 6. V I OUT, OUTPUT CURRENT (ma) Figure 5. Output Voltage vs. Output Current 5. V Version (T J = 25 C) T J = 4 C 25 C 5 C I OUT, OUTPUT CURRENT (ma) Figure 6. Output Voltage vs. Output Current 5. V Version V IN = 7. V V IN = 3 V 3.5 V 4 V 5 V T J = 4 C 25 C 5 C I OUT, OUTPUT CURRENT (ma) Figure 7. Output Voltage vs. Output Current 2. V Version (T J = 25 C) I OUT, OUTPUT CURRENT (ma) Figure 8. Output Voltage vs. Output Current 2. V Version V IN = 4. V 5

6 2. 2. V DO, DROPOUT VOLTAGE (V) C 5 C T J = 4 C V DO, DROPOUT VOLTAGE (V) C 5 C T J = 4 C I OUT, OUTPUT CURRENT (ma) Figure 9. Dropout Voltage vs. Output Current 3.3 V Version I OUT, OUTPUT CURRENT (ma) Figure. Dropout Voltage vs. Output Current 5. V Version V DO, DROPOUT VOLTAGE (V) C 5 C T J = 4 C I OUT, OUTPUT CURRENT (ma) Figure. Dropout Voltage vs. Output Current 2. V Version T J, JUNCTION TEMPERATURE ( C) Figure 2. Output Voltage vs. Temperature, 3.3 V Version, V IN = 5.3 V, I OUT = 2 ma T J, JUNCTION TEMPERATURE ( C) Figure 3. Output Voltage vs. Temperature, 5. V Version, V IN = 7. V, I OUT = 2 ma T J, JUNCTION TEMPERATURE ( C) Figure 4. Output Voltage vs. Temperature, 2. V Version, V IN = 4. V, I OUT = 2 ma 6

7 I GND ( A) I GND ( A) V IN, INPUT VOLTAGE (V) Figure 5. Supply Current vs. Input Voltage, 3.3 V Version V IN, INPUT VOLTAGE (V) Figure 6. Supply Current vs. Input Voltage, 5. V Version I GND ( A) I GND ( A) V IN, INPUT VOLTAGE (V) T J, JUNCTION TEMPERATURE ( C) Figure 7. Supply Current vs. Input Voltage, 2. V Version Figure 8. Supply Current vs. Temperature, 3.3 V Version, V IN = 5.3 V I GND ( A) I GND ( A) T J, JUNCTION TEMPERATURE ( C) T J, JUNCTION TEMPERATURE ( C) Figure 9. Supply Current vs. Temperature, 5. V Version, V IN = 7. V Figure 2. Supply Current vs. Temperature, 2. V Version, V IN = 4. V 7

8 I OUT = 4 ma 2 ma ma V IN, INPUT VOLTAGE (V) Figure 2. Output Voltage vs. Input Voltage, 3.3 V Version I OUT = 4 ma 2 ma ma V IN, INPUT VOLTAGE (V) Figure 22. Output Voltage vs. Input Voltage, 5. V Version I OUT = 4 ma 2. 2 ma ma V IN, INPUT VOLTAGE (V) Figure 23. Output Voltage vs. Input Voltage, 2. V Version 5 ma 3 ma I OUT = ma. V IN, INPUT VOLTAGE (V) Figure 25. PSRR, 5. V Version, V IN = 8. V PSRR (db) PSRR (db) I OUT = ma 3 3 ma 2 5 ma. FREQUENCY (khz) Figure 24. PSRR, 3.3 V Version, V IN = 6.3 V I OUT = ma 3 ma ma. FREQUENCY (khz) Figure 26. PSRR, 2. V Version, V IN = 5. V 8

9 V N ( V rms / Hz) V N ( V rms / Hz) FREQUENCY (khz) Figure 27. Output Voltage Noise, 3.3 V Version, V IN = 5.3 V, I OUT = 3 ma.. FREQUENCY (khz) Figure 28. Output Voltage Noise, 5. V Version, V IN = 7. V, I OUT = 3 ma V N ( V rms / Hz) V IN (V) FREQUENCY (khz) Figure 29. Output Voltage Noise, 2. V Version, V IN = 4. V, I OUT = 3 ma Figure 3. Line Transients, 2.5 V Version, t R = t F = 5 s, I OUT = 3 ma Figure 3. Line Transients, 3.3 V Version, t R = t F = 5 s, I OUT = 3 ma V IN (V) 9

10 Figure 32. Line Transients, 5. V Version, t R = t F = 5 s, I OUT = 3 ma V IN (V) Figure 33. Line Transients, 2. V Version, t R = t F = 5 s, I OUT = 3 ma V IN (V) Load Transients, 2.5 V Version, I OUT = - 3 ma, t R = t F = 5 s, V IN = 4.5 V I OUT (ma)

11 Figure 34 - Load Transients, 3.3 V Version, I OUT = - 3 ma, t R = t F = 5 s, V IN = 5.3 V I OUT (ma) Figure 35. Load Transients, 5. V Version, I OUT = 3 ma, t R = t F = 5 s, V IN = 7. V I OUT (ma) I OUT (ma) Figure 36. Load Transients, 2. V Version, I OUT = 3 ma, t R = t F = 5 s, V IN = 4. V

12 Figure 37. Load Transients, 2.5 V Version, I OUT = ma, t R = t F = 5 s, V IN = 4.5 V I OUT (ma) Figure 38. Load Transients, 3.3 V Version, I OUT = ma, t R = t F = 5 s, V IN = 5.3 V Figure 39. Load Transients, 5. V Version, I OUT = ma, t R = t F = 5 s, V IN = 7. V I OUT (ma) I OUT (ma) 2

13 Figure 4. Load Transients, 2. V Version, I OUT = ma, t R = t F = 5 s, V IN = 4. V I OUT = ma I OUT = 3 ma Chip Enable I OUT = 5 ma t ( s) Figure 4. Start up, 2.5 V Version, V IN = 4.5 V I OUT (ma) V CE (V) Chip Enable I OUT = ma I OUT = 5 ma. I OUT = 3 ma t ( s) Figure 42. Start up, 3.3 V Version, V IN = 5.3 V V CE (V) 3

14 .5 Chip Enable I OUT = ma 3. I OUT = 5 ma 2.. I OUT = 3 ma t ( s) Figure 43. Start up, 5. V Version, V IN = 7. V V CE (V) Chip Enable I OUT = ma I OUT = 3 ma 3. I OUT = 5 ma t ( s) Figure 45. Start up, 2. V Version, V IN = 4. V V CE (V) Chip Enable I OUT = ma.5. I OUT = 3 ma.5 I.5 OUT = 5 ma Figure 44. Shutdown, 2.5 V Version, V IN = 4.5 V V CE (V) 4

15 Chip Enable I OUT = ma 2.. I OUT = 3 ma. I OUT = 5 ma Figure 46. Shutdown, 3.3 V Version, V IN = 5.3 V V CE (V) Chip Enable I OUT = ma I OUT = 3 ma.. I OUT = 5 ma Figure 47. Shutdown, 5. V Version, V IN = 7. V V CE (V) Chip Enable I OUT = ma I OUT = 3 ma 3. I OUT = 5 ma Figure 48. Shutdown, 2. V Version, V IN = 4. V V CE (V) 5

16 APPLICATION INFORMATION A typical application circuits for NCP4623 series is shown in Figure 49. VIN VIN C n C n NCP4623x VIN VOUT CE VIN CE GND NCP4623xADJ VOUT ADJ GND R R2 C2 n VOUT VOUT C2 n Figure 49. Typical Application Schematics Input Decoupling Capacitor (C) A. F ceramic input decoupling capacitor should be connected as close as possible to the input and ground pin of the NCP4623. Higher values and lower ESR improves line transient response. Output Decoupling Capacitor (C2) Recommended values of the ceramic output decoupling capacitor is in the range from. F to 2.2 F. Stable operation of the regulator should be achieved within this range. If a tantalum capacitor is used, and its ESR is high, loop oscillation may result. The capacitors should be connected as close as possible to the output and ground pins. Larger values and lower ESR improves dynamic parameters. Output Voltage Setting (ADJ version) The output voltage of the adjustable regulator may be set for any output voltage from its voltage reference (2.5 V) up to V IN voltage by an external voltage divider connected between VOUT and GND pins with its center connected to the ADJ pin. The voltage divider is loaded by current into ADJ pin that is typically around 2 na. This current may cause an error in V OUT, therefore it is good to choose values of voltage divider low enough to achieve cross current around 2 A to eliminate error. Output voltage can be computed from the equation: V OUT 2.5 R R I R2 ADJ (eq. ) Enable Operation The enable pin CE may be used for turning the regulator on and off. The IC is switched on when a high level voltage is applied to the CE pin. Do not leave the CE pin unconnected or between VCEH and VCEL voltage levels as this may leave the output voltage unstable or cause indefinite and unexpected currents flows internally. Current Limit This regulator includes a fold back type current limit circuit. This type of protection doesn t limit output current up to specified current capability in normal operation, but when an over current occurs, output voltage and current decrease until the over current condition ends. Typical characteristics of this protection type can be observed in the Output Voltage vs. Output Current graphs shown in the typical characteristics section of this datasheet. Thermal As power across the IC increase, it might become necessary to provide some thermal relief. The maximum power dissipation supported by the device is dependent upon board design and layout. Mounting pad configuration on the PCB, the board material, and also the ambient temperature affect the rate of temperature increase for the part. When the device has good thermal conductivity through the PCB the junction temperature will be relatively low in high power dissipation applications. The IC includes internal thermal shutdown circuit that stops operation of regulator, if junction temperature is higher than 5 C. After that, when junction temperature decreases below 25 C, the operation of voltage regulator will resume. During high power dissipation condition, the regulator shuts down and resumes repeatedly protecting itself from overheating. PCB layout Make the V IN and GND line as large as practical. If their impedance is high, noise pickup or unstable operation may result. Connect capacitors C and C2 as close as possible to the IC, and make wiring as short as possible. 6

17 ORDERING INFORMATION Device Nominal Output Voltage Description Marking Package Shipping NCP4623HSNADJTG Adjustable Enable high J24 NCP4623HSN5TG 5. V Enable high J5 NCP4623HSNTG. V Enable high J NCP4623HSN2TG 2. V Enable high J2 NCP4623HMXADJTCG Adjustable Enable high BQ24 NCP4623HMX25TCG 2.5 V Enable high BQ25 NCP4623HMX33TCG 3.3 V Enable high BQ33 NCP4623HMX45TCG 4.5 V Enable high BQ45 NCP4623HMX48TCG 4.8 V Enable high BQ48 NCP4623HMX5TCG 5. V Enable high BQ5 NCP4623HMX8TCG 8. V Enable high BQ8 SOT23 5 (Pb Free) XDFN66 6 (Pb Free) 3 / Tape & Reel 5 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8/D. *To order other package and voltage variants, please contact your ON Semiconductor sales representative. 7

18 PACKAGE DIMENSIONS XDFN6.6x.6,.5P CASE 7AC ISSUE O 2X.5 C PIN ONE REFERENCE 2X NOTE 3.5 C.5 C D ÉÉÉ.5 C TOP VIEW SIDE VIEW D2 3 A B E A A C SEATING PLANE.5 M C A B L NOTES:. DIMENSIONING AND TOLERANCING PER ASME Y4.5M, CONTROLLING DIMENSION: MILLIMETERS. 3. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. MILLIMETERS DIM MIN MAX A.4 A..5 b.5.25 D.6 BSC D E.6 BSC E E3.5 REF e.5 BSC L.5.25 L.5 BSC RECOMMENDED MOUNTING FOOTPRINT*.7 2X L 3X E3 E2.5 M C A B 6 4 6X b e.5 M C A B BOTTOM VIEW 6X.38 PACKAGE OUTLINE.5 PITCH.77 6X DIMENSIONS: MILLIMETERS *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 8

19 PACKAGE DIMENSIONS SOT 89, 5 LEAD CASE 528AB ISSUE O E D H NOTES:. DIMENSIONING AND TOLERANCING PER ASME Y4.5M, CONTROLLING DIMENSION: MILLIMETERS. 3. LEAD THICKNESS INCLUDES LEAD FINISH. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. 5. DIMENSIONS L, L2, L3, L4, L5, AND H ARE MEAS- URED AT DATUM PLANE C. C A TOP VIEW SIDE VIEW c. C MILLIMETERS DIM MIN MAX A.4.6 b b c.3.5 D D2.4.8 E e.4.6 H L..5 L2.8.2 L L L5.2.6 e b e b L2 RECOMMENDED MOUNTING FOOTPRINT* L 2 3 4X L3 L4 5 4 D2 BOTTOM VIEW L X.5 2X.62 DIMENSIONS: MILLIMETERS *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 9

20 PACKAGE DIMENSIONS SOT 23 5 LEAD CASE 22 ISSUE A A E L e 5 D B E 5X b. M C B S A S A2.5 S C C A RECOMMENDED SOLDERING FOOTPRINT* A L NOTES:. DIMENSIONING AND TOLERANCING PER ASME Y4.5M, CONTROLLING DIMENSIONS: MILLIMETERS. 3. DATUM C IS THE SEATING PLANE. MILLIMETERS DIM MIN MAX A A.. A2..3 b.3.5 c..25 D E E.5.8 e.95 BSC L L X.85 5X PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC s product/patent coverage may be accessed at /site/pdf/patent Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor 952 E. 32nd Pkwy, Aurora, Colorado 8 USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative NCP4623/D

NCP ma, 10 V, Low Dropout Regulator

NCP ma, 10 V, Low Dropout Regulator 15 ma, 1 V, Low Dropout Regulator The is a CMOS Linear voltage regulator with 15 ma output current capability. The device is capable of operating with input voltages up to 1 V, with high output voltage