Analog Technologies Inc.
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1 Analog Technologies Inc. Figure. Physical Photo of the ATWA4D FEATURES The world s first window based TEC controller: stands by automatically when the target object temperature is within a pre-set temperature window. Programmable set-point temperature window High efficiency: 90% Seebeck voltage available Switching frequency synchronizable to an external signal Programmable maximum output current: 0 to A Programmable maximum output voltage: 0 to V VPS Actual object temperature monitoring Completely shielded: zero EMI Compact size DIP and SMT packages available 00 % lead (Pb)-free and RoHS compliant DESCRIPTIONS The ATWA4 is a compact high efficiency electronic module designed to control TECs (Thermo-Electric Coolers) for regulating a target object temperature to be within a preset temperature window. When the target object temperature falls within the pre-set temperature window range, the controller puts itself into a standby mode, decreasing energy consumption to a minimum level; when the target object temperature reaches the upper bound of the temperature window, the controller cools down the target object so that its temperature regulated to be equal to the upper bound of the window temperature; when the target object temperature reaches the lower bound of the window, the controller heats up the target object so that its temperature remains to be equal to the lower bound of the window temperature, as shown in Figure. ATWA4 The output stage of the ATWA4 utilizes a patented PWM-Linear topology, resulting in a high efficiency and small size. The output pins to the TEC terminals are filtered from PWM to a low frequency signal, thus eliminating the heating effect and the interference to other electronics, as opposed to driving the TEC with the PWM signal directly. Figure is the photo of an actual ATWA4D. The ATWA4 TEC controller module provides interface ports for setting the desired target object temperature window range; the maximum output current; the maximum output voltage across the TEC; shutdown control, standby indication, and switching frequency synchronization input/output. The shut down pin shuts down the whole controller and cuts the power supply current to < 0µA. This shut down pin can also be used to force the controller into standby mode, which only shuts down the output stages, leaving the rest of the circuit active. The sensing temperature range can be configured by the user conveniently by using external resistors. The TEC s voltage is monitored in real time. It is worth mentioning that the Seebeck voltage (which is generated by the temperature difference between the TEC plates) can be detected under standby mode, it can be used to measure the temperature difference between the TEC plates. The TEC s actual current can also be monitored in real time. In addition, the controller has many other functions: temperature measurement and monitoring, TMO; temperature control loop status indication, TGD; TEC voltage monitoring, VTEC; and current monitoring, ITEC; current limit settings, ILM; synchronization input and output, soft start, and shut down. The window TEC controller ATWA4 comes with a high stability low noise.5v voltage reference which can be used for setting the output voltage and current limits, and the desired target object temperature window by using POTs (Potentiometers) or a DACs (Digital to Analog Converters). When using this reference for setting the set-point window temperatures, the error in the actual target object temperature is independent of this reference voltage. This is because the internal temperature measurement network also uses the reference voltage as the reference, the errors in setting the temperature and measuring the temperature cancel with each other. This reference can also be utilized by external ADCs (Analog to Digital Converters). For the same reason, the measurement error will also be independent of the reference voltage change, resulting in a more accurate measurement. The ATWA4 is packaged in a sided metal enclosure with the case connected to the ground node of the circuit, which blocks EMIs (Electro-Magnetic Interferences) to prevent the controller and other electronics from interfering with each other. Ringwood Ct, #0, San Jose, CA 95, U. S. A. Tel.: (408) , Fax: (408) Copyrights , Analog Technologies, Inc. All Rights Reserved. Updated on 9//07
2 Analog Technologies Inc. Figure is the top view of the window TEC controller showing the pin names and locations. The ATWA4 pin functions are shown in Table. ATWA4 SNO TGD SDN/SBN/SNI GND VTEC ITEC VDR CMI TMO ILM VPS PGND TECN TECP GND RTH.5VR VLM TSU TSL Figure. Pin Assignment TL TSU TSL Heating Standby Cooling Figure. Thermal load temperature vs. Load thermal power Table. Pin Function Descriptions Pin # Pin Name Type Description SNO Digital output TGD Digital output SDN/SBN/ SNI Digital input Synchronization pulse output. It can be used as the synchronization input signal of another switch-mode TEC controllers, laser drivers or power supplies. Temperature good indication. It goes high when the actual target object temperature is <0. C within the temperature window set by TSL and TSU pins. This pin can source or sink up to 0mA current. This is a duplex digital input pin. Its first function is to shut down the whole controller by pulling this pin to ground or NC (Not Connected), <.7V, reducing the total current draw from the VPS pin to < 0µA; the second function is to force the controller into the standby mode by driving this pin to between.7v and.v; the third function is the synchronization input for the PWM output stage. It can be pulsed by a digital signal of 550kHz to 800kHz with which the internal switching can be synchronized, to avoid frequency beating interference with other nearby switch mode electronics, such as switch mode TEC controllers, laser drivers or power supplies. 4 GND Ground Signal ground for the potentiometers, ADCs, DACs and the thermistor. 5 VTEC Analog output TEC voltage indication. VTEC is an analog voltage output pin with a voltage proportional to the actual voltage across the TEC. The same as above, there is a.5v offset voltage on this pin, when the output voltage across the TEC is zero volt, the voltage on this pin would be.5v. The output voltage is calculated as: V TECP V TECN = 4 [V VTEC (V).5V]. QL Ringwood Ct, #0, San Jose, CA 95, U. S. A. Tel.: (408) , Fax: (408) Copyrights , Analog Technologies, Inc. All Rights Reserved. Updated on 9//07
3 Analog Technologies Inc. ATWA4 ITEC Analog output TEC current indication. ITEC is an analog voltage output pin with a voltage proportional to the actual current going through the TEC. There is a.5v offset voltage on this pin, when the current is zero, the output voltage of this pin is.5v. The output current is calculated as: I TEC (A) =.4 [V VIEC (V).5V]. When the voltage is.5v, the output current is A, the TEC works under cooling mode; when this voltage is 0V, the output current is negative A, the TEC works under heating mode. 7 VDR Analog input Compensation input pin for the thermal control loop. 8 CMI Analog input Compensation input pin for the thermal control loop. 9 TMO Analog output 0 ILM Analog input Actual target object temperature indication, its voltage is proportional to the temperature almost linearly. It swings from 0V to.5v, corresponding to 0 C to 40 C by default. The detail temperature vs. the voltage relationship is given in page 5. Sets maximum output current across TEC. Figure 5 shows the connections. To set the maximum current to be Imaxc, the resistance of the resistors R 4 and R 5 can be calculated as: I 0R4 = 5 H ( R4 // 80k) + R5 I H : the heating current. R 4 //80k refers to R 4 and 80K are connected in parallel. I 0( R5 // 80k) = 5 C R + 4 ( R5 // 80k) I C : the cooling current. R 5 //80k refers to R 5 and 80K are connected in parallel Notice: if you need to use this pin to limit the output current, I C >I H forerver. TSL Analog input Sets the lower temperature limit for the temperature window. TSU Analog input Sets the upper temperature limit for the temperature window. VLM Analog input Sets the maximum output voltage across TEC. The maximum voltage applied across the TEC can be limited. To set the maximum output voltage to be V MAX, VLM should be set at V VLM = V MAX /5. If no limitation is needed, tie this pin to ground. 4.5VR Analog output Reference voltage output,.5v. It can be used by a POT or DAC for setting the set-point temperature window voltages on the TMSU and TMSL pins and/or a DAC for measuring the temperature through the TMO pin. The maximum sourcing current capability is.5ma and the maximum sinking is 4mA with a stability of <50ppm/ C max. 5 RTH Analog input Connects to the thermistor for sensing the target object temp. The other end of the thermistors is connected to the signal ground, pin, or pin 5. The thermistor s value can range from k to 00k@5 C. The most commonly used value is 0k@5 C. GND Ground Signal ground for the potentiometers, ADCs, DACs and the thermistor. 7 TECP 8 TECN Analog power output Analog power output Connects to TEC positive terminal. Connects to TEC negative terminal. 9 PGND Power ground Power ground for connecting to the power supply. 0 VPS Power input Power supply positive rail, the operating range is.v to 5.5V. Ringwood Ct, #0, San Jose, CA 95, U. S. A. Tel.: (408) , Fax: (408) Copyrights , Analog Technologies, Inc. All Rights Reserved. Updated on 9//07
4 Analog Technologies SPECIFICATIONS Table. Characteristics (T ambient = 5 C) ATWA4 Parameter Test Condition Value Unit/ Note Window temperature default range 0 ~ 40 C Voltage setting range for TSL and TSU pins 0. ~.4 V Controller trigger-in and trigger-out voltage for the TMO TSL or TMO TSU 0 mv Voltage limit set VLM range 0 ~.5 V Current limit set ILM range 0 ~.5 V Max output current V VPS = 5V, R LOAD = 0.8Ω A Standby current 5 ma Shut down current <0 μa Efficiency V VPS = 5V, V TECP V TECN = V, R LOAD = Ω 9 % PWM frequency 500 khz Power supply voltage range. ~ 5.5 V Operating ambient temp range V IN =5V, R LOAD =0.8Ω -40 ~ 85 C Module thermal resistance 0 C/W BLOCK DIAGRAM The block diagram of the controller is shown in Figure 4. Thermistor t Temperature Measurement Circuit TSU TSL If TMO exceeds window upper limit Window Comparator Temperature Good Indication If TMO goes below window lower limit Cool Down Control Circuit High Efficiency H Bridge Drive Heat Up Control Circuit + TEC Figure 4. Window TEC Controller Block Diagram Ringwood Ct, #0, San Jose, CA 95, U. S. A. Tel.: (408) , Fax: (408) Copyrights , Analog Technologies, Inc. All Rights Reserved. Updated on 9//07 4
5 Analog Technologies APPLICATIONS TEC controller connections are shown in Figure 5. ATWA4 Synch. Input of another SM Controller SNO VPS 0 To 5V 499Ω TGD PGND 9 To 5V To Microprocessor or Digital Clock RP 7.K RD To Signal ground M 00nF RI M To ADC CI.47uF CD To ADC CF 0nF SDN/SBN/SNI GND VTEC ITEC VDR CMI TMO ILM R4.5VR TECN TECP GND RTH.5VR Window TEC controller R5 VLM TSU TSL R 750Ω W 0K R7 750Ω TEC R8 750Ω W 0K R9 750Ω R 7.8K R0.5K W 0K R 7.8K.5VR Thermistor R 47.9K TMO If you want to use this TEC controller for other applications not discussed here, for example, use it with wave locker controllers, and please consult with us. The same as to other customizations, such as setting the TSU and TSL by using a voltage source swings above.5v and/or VPS. After many experiments, according to the parameter and the figuring method of R load, we advise customers to use R load of 0.8Ω, and 5V as the power supply. CONFIGURE SETPOINT TEMPERATURE RANGE The default values for Resistors R, R and R shown in Figure 5 are optimal for a 0kΩ, β = 950@5 C thermistor to lock a TEC temperature at 5 C. The sections that follow describe how to configure potentiometers for different negative temperature coefficient (NTC) thermistors. Thermistor Values Determine the three thermistor resistance values: RHIGH, RMID, and RLOW. To do this, refer to the thermistor R-T table in our company s ATH0KR5 thermistor datasheet. Figure 5. TEC Controller Connections ( R5.pdf). This is based on the required TEC thermal control resolution and the target controllable temperature range. These resistor values correspond to the high, middle, and low setpoint temperatures (THIGH, TMID, and TLOW). THIGH + TLOW TMID =. TMID is the average temperature, between THIGH and TLOW. VTEMPOUT is the voltage output at the TEMPOUT pin. It is RTH resistance dependent. VTEMPOUT is a function of RTH, R, R, and R as: V TEMPOUT = 0.5 V REF R + R R R + R In a design, let VTEMPOUT equal the following values at the three thermistor resistances: RTH = RHIGH (at THIGH): VTEMPOUT = VREF, RTH = RMID (at TMID): VTEMPOUT = 0.5 VREF, RTH = RLOW (at TLOW): VTEMPOUT = 0V. TH. Ringwood Ct, #0, San Jose, CA 95, U. S. A. Tel.: (408) , Fax: (408) Copyrights , Analog Technologies, Inc. All Rights Reserved. Updated on 9//07 5
6 Resistor Values Analog Technologies To achieve the required VTEMPOUT outputs at the three different setting point temperatures, use the equation: ATWA4 middle set-point temperature (5 + 5)/ = 5 C. Using the R-T table of a thermistor, RHIGH =.54kΩ, RMID ( RLOW + RHIGH ) RHIGH R RMID = 0kΩ, LOW R = RMID + () RHIGH + RLOW R RLOW MID, = 5.77kΩ. R = R RMID () By using equations to, the following results established:, R( R + RLOW RMID ) R =.8kΩ, R = () RLOW RMID. R =.8kΩ, R =.89kΩ. For example, setting the high setpoint temperature at 5 C and the low setpoint temperature at 5 C results in a Table. Measurement Data of Rth vs. Temperature Temp( C) Resistance(kΩ) Temp( C) Resistance(kΩ) Temp( C) Resistance(kΩ) TUNE THE COMPENSATION NETWORK The purpose for this step is to match the controller compensation network with the thermal load characteristics thus that the response time and temperature tracking error are minimized. Changing the set-point temperature TMS just a small amount, simulating a step function. At the same time, connect an oscilloscope at the VDR test pin (on the left side of the evaluation board), set it to a scrolling mode (0. Second/Division or slower) and monitor the waveform of VDR as TMS is fed by a step function signal. The circuit in the compensation network is shown in Figure 8 below. C D R D R I R P C I TMO TMS + VDR Figure 8 Compensation network H(ω) Gd 0.7Gd.4Gp Gp ω Figure 9 Transfer Function of the Compensation Network The transfer function of the compensation network, defined as H(ω)=VDR(ω)/TMO(ω), is shown in figure 9. In principle, these are the impacts of the components to the tuning results: a. R P /R I determines the gain for the proportional component of the feedback signal which is from the thermistor, Gp = R P /R I, in the control loop, the higher the gain, the smaller the short term error in the target ω ω ω4 ω Ringwood Ct, #0, San Jose, CA 95, U. S. A. Tel.: (408) , Fax: (408) Copyrights , Analog Technologies, Inc. All Rights Reserved. Updated on 9//07
7 Analog Technologies temperature (which is of the cold side of the TEC) compared with the set-point temperature, but the higher the tendency of the loop s instability. b. R P /R D determines the gain for the differential component, Gd = R P /(R D //R I ) R P /R D, where symbol // stands for two resistors in parallel, since R I >> R D, R D //R I R D. The higher the gain, the shorter the rise time of the response, the more the overshoot and/or the undershoot will be. c. C I *R P determines the corner frequency, ω = / (C I *R P ), where the integral component starts picking up, as the frequency goes down. It determines the cut-off frequency below which the TEC controller will start having a large open loop gain. The higher the open loop gain, the smaller the tracking error will be. MECHANICAL DIMENSIONS ATWA4 d. C D *R I determines the corner frequency, ω =/(C D *R I ), where the differential component starts picking up (see Figure 9), as the frequency goes up. e. C D *R D determines the corner frequency, ω =/(C D *R D ), where the differential component starts getting flat. It determines the cut-off frequency above which the TEC controller will give extra weight or gain in response. f. nf*r P determines the corner frequency, ω 4 =/(nf*r P ), where the differential component starts rolling down. Since this frequency is way higher than being needed for controlling the TEC, ω 4 does not need to be tuned. The capacitor is built into the TEC controller module, not the evaluation board. In addition to ATWA4D, we also have ATWA4S, which is SMT packaged. Dimensions of the DIP packaged controller is shown in Figure, dimensions of the SMT packaged controller is shown in Figure 7. R R.0 R Top View Side View 7.5 End View Unit: mm Figure. Dimensions of the DIP Package Controller R R.0 Pin size: R R.0 Top view End view Side view Unit: mm Figure 7. Dimensions of the SMT Package Controller Ringwood Ct, #0, San Jose, CA 95, U. S. A. Tel.: (408) , Fax: (408) Copyrights , Analog Technologies, Inc. All Rights Reserved. Updated on 9//07 7
8 Analog Technologies ATWA4 ORDERING INFORMATIONS Table 4. Unit Price Part# Description Price ATWA4D DIP (Dual Inline Package) package $9.4 $87. $8.9 $7.7 $7.4 ATWA4S SMT (Surface Mount Technology) package $9.4 $87. $8.9 $7.7 $7.4 NOTICE. ATI warrants performance of its products for one year to the specifications applicable at the time of sale, except for those being damaged by excessive abuse. Products found not meeting the specifications within one year from the date of sale can be exchanged free of charge.. ATI reserves the right to make changes to its products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete.. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. Testing and other quality control techniques are utilized to the extent ATI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. 4. Customers are responsible for their applications using ATI components. In order to minimize risks associated with the customers applications, adequate design and operating safeguards must be provided by the customers to minimize inherent or procedural hazards. ATI assumes no liability for applications assistance or customer product design. 5. ATI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of ATI covering or relating to any combination, machine, or process in which such products or services might be or are used. ATI s publication of information regarding any third party s products or services does not constitute ATI s approval, warranty or endorsement thereof.. IP (Intellectual Property) Ownership: ATI retains the ownership of full rights for special technologies and/or techniques embedded in its products, the designs for mechanics, optics, plus all modifications, improvements, and inventions made by ATI for its products and/or projects. Ringwood Ct, #0, San Jose, CA 95, U. S. A. Tel.: (408) , Fax: (408) Copyrights , Analog Technologies, Inc. All Rights Reserved. Updated on 9//07 8
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