SC2442/H. High Performance Wide Input Range Dual Synchronous Buck Controller POWER MANAGEMENT. Applications. Typical Application Circuit

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1 Description SC2442 and SC2442H are high performance dual buck converter controllers that can be configured for a variety of synchronous buck applications where efficiency is most important. Both converters are synchronized to prevent beat frequencies. The dual buck converters are also operated out of phase reducing input ripple, allowing for fewer input capacitors. High frequency operation up to 1.1 MHz reduces the size of output inductors and capacitors. The controller has separate power pins for both CC and GND to improve noise immunity. The CC supplies can be regulated to 7 using an external PNP transistor. Other features include: bootstrapping for high side drive supplies, asynchronous mode start up, power up sequencing to prevent latchups, individual soft start for each convertor, bootstrapped drivers for high side N-channel MOSFETs, input side current sensing, dual mode current limit with hiccup, enable and external frequency synchronization. The SC2442 operates over the range of 4.7 to 30 and SC2442H operates over the range of 4.7 to 36. Typical Application Circuit SC2442/H High Performance Wide Input Range Dual Synchronous Buck Controller Features Dual output controller Asynchronous start up mode Power up sequencing to prevent latch-ups Out of phase operation for low input ripple Over current protection Output down to 0.7 Wide input range, 4.7 to 30 for SC2442 and 4.7 to 36 for SC2442H cc regulator with external PNP transistor Programmable clock frequency up to 1.1MHz Two synchronous bucks for high efficiency at high current 40 to +12 Deg C operating temperature Small package TSSOP-24 Fully WEEE and RoHS Compliant Applications Point of load converter applications DSL applications with multiple output voltages Power management for mixed signal applications Cable modems and set top boxes. IN+ MAX 30/36 (H) R1 R2 Q1 C1 Q R9 C6 R3 OC1 R4 R R7 Q3 L1 C2 OUT1 C4 C C8 C9 R12 R10 OSC ACC PCC C7 OC2 IN U1 OC1 4 BDI OC2 21 ACC GD1H 9 PCC GD1L 11 GD2H 16 GD2L 14 ROSC PH1 10 FB1 BST1 8 EA1 PH2 1 BST2 17 EA2 PGND 12 SYNC/EN AGND 24 SC2442ITSTR D1 D2 PH1 BST1 PH2 BST2 R6 R8 C1 C16 Q2 Q4 L2 C3 OUT2 R13 R1 R14 R16 R11 C10 C11 EA2 R17 C12 R18 C13 ENA FB1 Revision: June,

2 Absolute Maximum Ratings Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not implied. Parameter Symbol Maximum Units BST1, BST2 to PGND SC2442 SC2442H BST1, BST IN to PGND SC2442 SC2442H IN BDI to PGND BDI OC1 PCC, and OC2 to IN ACC to PGND IN -, IN - OC 1 OC2 IN -0.3 to +0. PCC, ACC 8 BST1 to PH1, BST2 to PH2 GD1H to PH1, GD2H to PH2 GD1L, GD2L to PGND -0.3 to to PCC PGND to AGND ± 0. 3 PH1, PH2 -ve swing wrt PGND (for 100 ns) H1, All Other Pins to AGND Electrical Characteristics 1 P PH to ACC Junction Temperature -40 to +12 C Storage Temperature Range -60 to +10 C Lead Temperature (Soldering) 10 Sec. 260 C Unless specified: T A = T = -40 to 12 C, IN = 24, = 7, Fc = 0KHz J CC Parameter Symbol Test Conditions Min Typ Max Unit Undervoltage Lockout Start Threshold ULO ULO Hysteresis HYS T Power Supply Operating Current IQS C ACC/PCC Regulated ACC, PCC BDI Drive Current IBD I ACC rising ACC falling 0.1 No load, SYNC/EN = Low 8 13 ma IN > IN > ACC ma 2007 Semtech Corp. 2

3 Electrical Characteristics (Cont.) Unless specified: T A = T = -40 to 12 C, IN = 24, = 7, Fc = 0KHz J CC Parameter Symbol Test Conditions Min Typ Max Unit Soft Start Charging Current I I Discharge Current I I Error Amplifier,, μa μa oltage Feedback Reference FB1, Input Bias Current IEABIA S O pen Loop Gain U nity Gain Bandwidth ( G 0 DC ( BW na 7 db G 3 MHz Output Source/Sink Current 2 ma ( O utput Slew Rate 1 /μs P WM to Output Delay Oscillator ( 0 8 ns Frequency Range Fc MHz Clock Frequency Fc ROSC = 60K khz O scillator Peak oltage O scillator alley oltage ( nterna l ( nterna l I 3. 0 I 1. Sync/Enable Input Enable Thresheld oltage SYE N SYNC/EN pin oltage rising Disable Thresheld oltage SYE N SYNC/EN pin oltage falling D isable Low to Shut Down Delay ( YNC/EN pin < 0.8 S 0 ns Sync Input High Level SYE N Sync Input Low Level SYE N Current Limit TTL TTL OC1, OC2 Current Limit Sense C1, Feedback Threshold for Hiccup FB1 O C Sense to Drive Turn Off Delay 80 O OC2, ( TOCDL Y m ns 2007 Semtech Corp. 3

4 Electrical Characteristics (Cont.) Unless specified: T A = T = -40 to 12 C, IN = 24, = 7, Fc = 0KHz J CC Parameter Symbol Test Conditions Min Typ Min Units Gate Drive Outputs H igh Side Gate Drive L ow Side Gate Drive ( I, I GDH+ GDH- ( I, I GDL+ GDL- Gate Drive Rise Time T ISE Gate Drive Fall Time TFALL Maximum Duty Cycle C R OUT C S oure/sink + 0. A S oure/sink + 0. A OUT = 1000 pf 30 ns = 1000 pf 30 ns Dmax For PWM1 and PWM % Minimum Duty Cycle Dmin For PWM1 and PWM2 0 % Dead Time Between Gate Drives TDEAD NOTES: ( Guaranteed by design, not tested in production (2) This device is sensitive to ESD. Use of standard ESD handling precautions is required. 100 ns Pin Configuration Ordering Information ACC BDI IN OC1 EA1 FB1 Top iew AGND ROSC SYNC/EN OC2 EA2 Part Number SC2442ITSTR SC2442HITSTR ( S C2442ITSTRT ( S C2442HITSTRT Package TSSOP-24 TSSOP-24 Temp. Range ( T A ) -40 C to +12 C -40 C to +12 C BST1 BST2 GD1H GD2H PH1 PH2 GD1L PGND (24 Pin TSSOP) GD2L PCC Notes: Only available in tape and reel packaging. A reel contains 200 devices. ( Lead free devices 2007 Semtech Corp. 4

5 Pin Descriptions Pin # Pin Name Pin Function 1 A CC Supply voltage for analog circuit. Regulated by the BDI pin to 7 from IN using 2 B DI Base drive for ACC/PCC regulator. an external PNP transistor. 3 IN Input supply voltage. Maximum is 30 for SC2442 and 36 for SC2442H. 4 O C1 High side current sense for OUT1. Threshold is 100 m. E A1 Error amplifier output for compensation for the OUT1. 6 F B1 Feedback input for the OUT1. 7 S S1 Soft start pin for OUT1. A capacitor to AGND sets the soft start period. 8 B ST1 Boost capacitor connection for the OUT1 high side gate drive. Connect an external capacitor and a diode as shown in the Typical Application Circuit. 9 G D1H Gate drive for the high side MOSFET of OUT degrees out of phase with GD2H. 10 P H1 Switching node for OUT1 external inductor connection. 11 G D1L Gate drive for low side MOSFET of OUT1. 12 P GND Power ground for gate drive return currents. 13 P CC Supply voltage for output drivers. 14 G D2L Gate drive for low side MOSFET of OUT2. 1 P H2 Switching node for OUT2 external inductor connection. 16 G D2H Gate drive for the high side MOSFET of OUT degrees out of phase with GD1H. 17 B ST2 Boost capacitor connection for the OUT2 high side gate drive. Connect an external capacitor and a diode as shown in the Typical Application Circuit. 18 S S2 Soft start pin for OUT2. A capacitor to AGND sets the soft start period. 19 F B2 Feedback input for the OUT2. 20 E A2 Error amplifier output for compensation for the OUT2. 21 O C2 High side current sense for OUT2. Threshold is 100 m. 22 S YNC/EN Oscillator synchronization and PWM Enable pin. 23 R OSC Oscillator frequency programming pin. Connect a resistor to AGND to set clock frequency. 24 A GND Analog signal ground Semtech Corp.

6 Block Diagram 2007 Semtech Corp. 6

7 Application Information Undervoltage Lockout The undervoltage lockout circuitry monitors the ACC pin. During undervoltage lockout all output drives are turned off and both SS pins are discharged to ground. Typically, for ACC increasing, normal operation will not occur until ACC reaches 4.6. For ACC falling, undervoltage lockout will not occur until ACC falls below 4.. oltage Regulator Using an external PNP transistor as shown in the Typical Applications Circuit, the SC2442/H provide a regulated ACC supply. The same ACC with adequate filtering can be connected to PCC to provide power for the output drives. The ACC is regulated at 7 typical which provides optimum drive for most low oltage power MOSFETs. The BDI pin will provide at least 3 ma to regulate the external PNP. For IN voltages below 8, the PNP pass transistor will always be operating in saturation and it is recommended to connect IN directly to ACC and PCC so long as maximum input voltage is below 8. The BDI pin may be left unconnected. Alternately if an additional supply <8 is available in addition to IN, it can be used for separately powering both the CCs. Soft Start and Hiccup Mode The SC2442/H controllers utilize asynchronous start up to provide glitch free output rise times. During start up, the and pins are held low and the gate drive signals are also pulled low. Once ACC reaches 4.6 and above, the SS capacitors are charged by a 10 μa internal current source. The error amplifier outputs are clamped by the respective SSx voltages. As the SSx pin voltage goes above the oscillator valley voltage of 1., the high-side driver will begin switching. The low-side driver will not begin switching until the SSx voltage has reached 3.3. During normal operation, the SC2442/H will enter hiccup mode if the SS pin voltage is above 3.3 and the FB pin voltage is below 0.2 (70% of 0.70). If this occurs the GDxH and GDxL signals will go low and the SS pin will begin to sink 2 μa. The 2 μa of sink current will slowly discharge the SS capacitor until its voltage reaches 1, which will trigger the SS pin to begin sourcing 10 μa. The convertor will operate in the asynchronous mode during hiccup. Sync and Enable When the SYNC/EN pin is pulled below 1, all output drives are turned off and both SS pins are discharged to ground. When the SYNC/EN pin is pulled high above 1.8, normal operation occurs. When an external clock signal is applied that is marginally higher in frequency to that set by the ROSC resistor, the internal oscillator will synchronize to this signal. The external signal should have TTL compatible transition. Operating Frequency The operating frequency is set by a resistor from ROSC pin to AGND. ROSC sets the clock frequency Fc that is twice the operating frequency of each converter. The clock frequency is given by Fc = 33,000 / ROSC Fc is in khz and ROSC is in kohm. Current Limiting The SC2442/H provide cycle-by-cycle current limiting by sensing the current in the input line. A non inductive resistor should be used for precise current sensing and limiting. When the voltage drop across a sense resistor in the input line exceeds 10 m, the PWM pulse is latched off and is not reset until the next clock cycle. Overcurrent condition affects only the high side driver. An RC filter should be placed across the sense resistor as shown in the Typical Application Circuit to reduce noise due to turn-on spikes. The filter capacitor should be connected between IN and respective OCx pins for proper filtering. Typically a ceramic or similar low esr capacitor is placed between the current sense resistor and the switching circuit. If this capacitor value is large, it can significantly distort the current feedback waveform aross the sense resistors. This should be taken into account while designing the overcurrent protection circuit. Gate Drive Considerations The SC2442/H provide high side gate drive with bootstrapping as shown in the Typical Application Circuit. A ceramic capacitor is recommended between each BSTx pin to the corresponding Phase Node. Each gate drive can source and sink a minimum of 0.A current with 100 ns dead time between transistions to prevent shoot throughs Semtech Corp. 7

8 Application Information (Contd) IN R1 0.07R, 1/4W J1-1 J1-2 J1-3 TP1 PCC C10 1 uf R9 R10 C11 6 uf 10 10K R 1 uf C uf C uf OSC R K C2 C7 C R2 0.06R, 1/4W 10 nf C22 C23 10 nf IN BDI ACC PCC ROSC FB1 EA1 EA2 U1 SC2442ITSTR SYNC/EN 100R R3 OC1 4 OC2 21 GD1H 9 GD1L GD2L R4 100R OC1 OC2 PH1 10 BST GD2H PH2 1 BST2 17 PGND 12 AGND 24 D1 SCH D2 SCH PH1 BST1 PH2 BST2 QD1 FDS6982S R7 3.3R R 2R QD2 FDS6982S R6 2R R8 3.3R C12 C13 8 QB QT QB QT TP2 L1 P T 1 2 C3 100 uf 4 TP 3 L2 P T 1 2 C4 100 uf 4 C24 1 nf R16 R17 100R 14K R14 3.3/0.6A OUT1 C14 1.8/1A OUT2 C1 C2 R18 34K R1 J2-1 J2-2 J2-4 J2-3 1 nf R19 100R ENA C20 47 pf EA1 C21 47 pf EA2 10K 10K R12 C18 R13 C19 220K FB1 4.7 nf 100K 10 nf Fig Application Circuit for to 3.3/1.8 Low Power Dual Synchronous Buck Convertor Input 3.3 Output 1.8 Output Fig 2) Input and output rise times with full load 2007 Semtech Corp. 8

9 Application Information (Contd) Fig 3) Switching waveforms at Phase Node with full load. Top trace: 1.8/1A Bottom trace: 3.3/0.6A Fig 4) Output ripple and noise at full load Top trace: 3.3 Output Bottom trace: 1.8 Output Fig ) 1.8 Transient response for 10% to 100% step load Fig 6) 3.3 Transient response for 10% to 100% step load 2007 Semtech Corp. 9

10 Outline Drawing - TSSOP-24 Land Pattern - TSSOP-24 Contact Information Semtech Corporation Power Management Products Division 200 Flynn Road, Camarillo, CA Phone: (80) FAX (80) Semtech Corp. 10