A3921. Automotive Full Bridge MOSFET Driver

Transcription

1 Features and Benefits High current gate drive for N-channel MOSFET full bridge High-side or low-side PWM switching pump for low supply voltage operation Top-off charge pump for 100% PWM Cross-conduction protection with adjustable dead time 5.5 to 50 V supply voltage range Integrated 5 V regulator Diagnostics output Low current sleep mode Package: 28-pin TSSOP with exposed thermal pad (suffix LP) Not to scale Description The A3921 is a full-bridge controller for use with external N-channel power MOSFETs and is specifically designed for automotive applications with high-power inductive loads, such as brush DC motors. A unique charge pump regulator provides full (>10 V) gate drive for battery voltages down to 7 V and allows the A3921 to operate with a reduced gate drive, down to 5.5 V. A bootstrap capacitor is used to provide the above-battery supply voltage required for N-channel MOSFETs. An internal charge pump for the high-side drive allows DC (100% duty cycle) operation. The full bridge can be driven in fast or slow decay modes using diode or synchronous rectification. In the slow decay mode, current recirculation can be through the high-side or the lowside FETs. The power FETs are protected from shoot-through by resistor adjustable dead time. Integrated diagnostics provide indication of undervoltage, overtemperature, and power bridge faults, and can be configured to protect the power MOSFETs under most short circuit conditions. The A3921 is supplied in a 28-pin TSSOP power package with an exposed thermal pad (suffix LP). This package is lead (Pb) free, with 100% matte-tin leadframe plating. Typical Application VBAT PWM Direction A3921 Fault Flags 3921-DS

2 Selection Guide Part Number A3921KLPTR-T Packing 4000 pieces per reel Absolute Maximum Ratings* Characteristic Symbol Notes Rating Units Load Supply Voltage V BB 0.3 to 50 V Logic Inputs and Outputs 0.3 to 6.5 V V5 Pin 0.3 to 7 V LSS Pin 4 to 6.5 V VDSTH Pin 0.3 to 6.5 V SA and SB Pins 5 to 55 V VDRAIN Pin 5 to 55 V GHA and GHB Pins Sx to Sx+15 V GLA and GLB Pins 5 to 16 V CA and CB Pins 0.3 to Sx+15 V Operating Temperature Range T A Range K 40 to 150 ºC Junction Temperature T J (max) 150 ºC Transient Junction Temperature T tj 1 s, lifetime duration not exceeding 10 hr; 175 ºC Overtemperature event not exceeding guaranteed by design characterization Storage Temperature Range T stg 55 to 150 ºC *With respect to GND. THERMAL CHARACTERISTICS may require derating at maximum conditions Characteristic Symbol Test Conditions* Value Units Package Thermal Resistance *Additional thermal information available on Allegro website. R θja 2-layer PCB with 3.8 in. 2 of copper area each side 32 ºC/W 4-layer PCB based on JEDEC standard 28 ºC/W R θjp 2 ºC/W 2

3 Functional Block Diagram Battery + C P VBB CP2 CP1 VBAT V5 +5V Reg Regulator VREG C REG FF1 FF2 VDSTH Diagnostics and Protection Bootstrap Monitor VDRAIN CA C BOOTA High GHA R GHA R GHB SA PWMH Low GLA R GLA R GLB PWML LSS PHASE Control Logic Bootstrap Monitor CB C BOOTB SR High GHB SB RESET Low GLB RDEAD GND PAD LSS 3

4 ELECTRICAL CHARACTERISTICS valid at T J = 40 C to 150 C, V BB = 7 to 50 V, unless noted otherwise Characteristics Symbol Test Conditions Min. Typ. Max. Units Supply and Reference Load Supply Voltage Functional Operating Range 1 V BB V Load Supply Quiescent Current I BBQ RESET = high, outputs = low, V BB = 12 V ma I BBS RESET = low, Sleep mode, V BB = 12 V 10 μa V BB > 9 V, I REG = 0 to 10 ma V 7.5 V < V BB 9 V, I REG = 0 to 7 ma V VREG Output Voltage V REG 2 V 6 V < V BB 7.5 V, I REG = 0 to 7 ma BB V < V BB 6 V, I REG < 5.5 ma V V5 Output Voltage V 5(out) No load V V5 Line Regulation V 5(line) I 5 = 2 ma mv V5 Load Regulation V 5(load) I 5 = 0 to 2 ma mv V5 Short-Circuit Current I 5M V BB = 40 V, V 5 = 0 V ma I D = 10 ma V Bootstrap Diode Forward Voltage V fboot I D = 100 ma V Bootstrap Diode Resistance r D r D(100mA) = (V fboot(150ma) V fboot(50ma) ) / 100 ma Ω Bootstrap Diode Current Limit I DBOOT ma Top-off Current Limit I TOCPM 400 μa High- Gate Drive Static Load Resistance R GSH 250 kω Gate Output Drive Turn-On Time t r C LOAD = 1 nf, 20% to 80% 35 ns Turn-Off Time t f C LOAD = 1 nf, 80% to 20% 20 ns T J = 25 C, I GHx = 150 ma Ω Pullup On Resistance R DS(on)UP T J = 150 C, I GHx = 150 ma Ω T J = 25 C, I GLx = 150 ma Ω Pulldown On Resistance R DS(on)DN T J = 150 C, I GLx = 150 ma Ω GHx Output Voltage V GHX Bootstrap capacitor fully charged V Cx 0.2 V GLx Output Voltage V REG GLX 0.2 Turn-Off Propagation Delay 2 Input change to unloaded gate output t P(off) change ns Turn-On Propagation Delay 2 Input change to unloaded gate output t P(on) change ns Measured between corresponding Propagation Delay Matching, Phase-to-Phase t PP transition points on both phases 10 ns Propagation Delay Matching, On-to-Off t OO Measured across one phase 10 ns Continued on the next page 4

5 ELECTRICAL CHARACTERISTICS (continued) valid at T J = 40 C to 150 C, V BB = 7 to 50 V, unless noted otherwise Characteristics Symbol Test Conditions Min. Typ. Max. Units Gate Output Drive (continued) R DEAD = 3 kω 180 ns Dead Time 2 t DEAD R DEAD = 30 kω ns R DEAD = 240 kω 3.5 μs RDEAD tied to V5 6 μs Logic Inputs and Outputs FF1 and FF2 Fault Output (Open Drain) V FF(L) I FF = 1 ma, fault not present 0.4 V FF1 and FF2 Fault Output Leakage Current 3 I FF(H) V FF = 5 V, fault present 1 1 μa RDEAD Current 3 I DEAD RDEAD = GND μa Input Low Voltage V IN(L) 0.8 V Input High Voltage V IN(H) 2.0 Input Hysteresis (Except RESET Pin) V INhys mv Input Hysteresis (RESET Pin) V INRSThys 200 mv Input Current (Except RESET Pin) 3 I IN 0 V < V IN < V μa Input Pulldown Resistor (RESET Pin) R PD 50 kω RESET Pulse Time t RES μs Protection VREG Undervoltage Lockout Threshold V REGUVon V REG rising V V REGUVoff V REG falling V Bootstrap Undervoltage Threshold V BOOTUV Cx with respect to Sx %V REG Bootstrap Undervoltage Hysteresis V BOOTUVhys 13 %V REG V5 Undervoltage Turn-Off Threshold V 5UVoff V 5 falling V V5 Undervoltage Hysteresis V 5UVhys mv VDSTH Input Range V DSTH V VDSTH Input Current I DSTH 0 V < V DSTH < 2 V μa VDSTH Disable Voltage V DSDIS When not connected directly to V VDRAIN Input Voltage V DRAIN V DSTH = 2 V, V BB = 12 V, 7 V BB 50 V VDRAIN Input Current I DRAIN V DSTH = 2 V, V BB = 12 V, 0 V < V DRAIN < V BB 250 μa High-side on, V Short-to-Ground Threshold Offset 4 DSTH 1 V ±100 mv V STGO High-side on, V DSTH < 1 V 150 ± mv Low-side on, V Short-to-Battery Threshold Offset 5 DSTH 1 V ±100 mv V STBO Low-side on, V DSTH < 1 V 150 ± mv Overtemperature Fault Flag Threshold T JF Temperature increasing ºC Overtemperature Fault Hysteresis T JFhys Recovery = T JF T JFhys 15 ºC 1 Functions correctly, but parameters are not guaranteed, below the general limits (7 V). 2 See Gate Drive Timing diagrams. 3For input and output current specifications, negative current is defined as coming out of (sourcing) the specified device pin. 4 As V Sx decreases, fault occurs if V BAT V Sx > V STG. STG threshold, V STG = V DSTH + V STGO. 5 As V Sx increases, fault occurs if V Sx V LSS > V STB. STB threshold, V STB = V DSTH +V STBO. 5