DATA SHEET. TDA8578 Dual common-mode rejection differential line receiver INTEGRATED CIRCUITS Dec 15

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1 INTEGRATED CIRCUITS DATA SHEET Dual common-mode rejection differential Supersedes data of November 993 File under Integrated Circuits, IC0 995 Dec 5

2 FEATURES Excellent common-mode rejection up to high frequencies Elimination of source resistance in the common-mode rejection Few external components High supply voltage ripple rejection Low noise Low distortion Protected against electrostatic discharge AC and DC short circuit safe to ground and V CC Fast DC settling. APPLICATIONS Audio Car radio. GENERAL DESCRIPTION The is a two-channel differential amplifier in a 6 pin DIL or SO package intended to receive line inputs in audio applications requiring a high-level of common-mode rejection. The amplifier has a gain of 0 db and a low distortion. The device is primarily developed for those car radio applications where long connections between signal sources and amplifiers (or boosters) are necessary and ground noise has to be eliminated. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT V CC supply voltage 5.5 V I CC supply current V CC =.5 V 4 ma G v voltage gain db SVRR supply voltage ripple rejection db V no noise output voltage µv Z i input impedance kω CMRR common-mode rejection ratio R s =0Ω 0 db ORDERING INFORMATION TYPE PACKAGE NUMBER NAME DESCRIPTION VERSION DIP6 plastic dual in-line package; 6 leads (300 mil); long body SOT3- T SO6 plastic small outline package; 6 leads; body width 3.9 mm SOT Dec 5 2

3 BLOCK DIAGRAM FUNCTIONAL DESCRIPTION INL INL INR INR V CC 6 GND 9 2 V CC MBD209 OUTL SVRR OUTR The contains two identical differential amplifiers with a voltage gain of 0 db. The device is intended to receive line input signals. The device has a very high-level of common-mode rejection and it eliminates ground noise. The common-mode rejection keeps constant up to high frequencies. The gain of the amplifiers is fixed at 0 db. The inputs have a high-input impedance and the output stage is a class AB stage with a low-output impedance. For a large common-mode rejection also at low frequencies, an electrolytic input capacitor at the negative input pin is advised. The input impedance is relative high, this would result in a large settling time of the DC input voltage. Therefore a quick charge circuit is included that charges the input capacitor within 0.2 s. All input and output pins are protected against high electrostatic discharge conditions (4000 V, 50 pf, 50 Ω). Fig. Block diagram. PINNING SYMBOL PIN DESCRIPTION INL+ positive input left 2 not connected 3 not connected 4 not connected INL 5 negative input left INR 6 negative input right INR+ 7 positive input right SVRR half supply voltage GND 9 ground 0 not connected OUTR output right OUTL 2 output left 3 not connected 4 not connected 5 not connected V CC 6 supply voltage INL V CC INL 5 2 OUTL INR INR SVRR OUTR GND MBD20 Fig.2 Pin configuration. 995 Dec 5 3

4 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 34). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT V CC supply voltage operating V I ORM repetitive peak output current 40 ma V sc AC and DC short-circuit safe voltage V T stg storage temperature C T amb operating ambient temperature C T j junction temperature +50 C HANDLING Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling integrated circuits. THERMAL CHARACTERISTICS SYMBOL PARAMETER VALUE UNIT R th j-a thermal resistance from junction to ambient in free air (DIP6) 75 K/W T (SO6) 20 K/W DC CHARACTERISTICS V CC =.5 V; T amb =25 C; in accordance with test circuit (see Fig.3); unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT V CC supply voltage 5.5 V I CC supply current 4 ma V O DC output voltage note 4.3 V t set DC input voltage settling time 0.2 s Note. The DC output voltage with respect to ground is approximately 0.5V CC. 995 Dec 5 4

5 AC CHARACTERISTICS V CC =.5 V; f = khz; T amb =25 C; in accordance with test circuit (see Fig.3); unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT G v voltage gain db α cs channel separation R s =5kΩ 70 0 db G v channel unbalance 0.5 db f L low frequency roll-off db; note 20 Hz f H high frequency roll-off db 20 khz Z i input impedance kω Z o output impedance 0 Ω V i(max) maximum input voltage THD = % 2 V V no noise output voltage R s =0Ω; note µv V CM(rms) common-mode input voltage V (RMS value) CMRR common-mode rejection ratio R s =5kΩ db R s =0Ω; note 3 0 db SVRR supply voltage ripple rejection note db note 5 60 db THD total harmonic distortion V i =V 0.02 % V i =V; 0. % f = 20 Hz to 20 khz THD max total harmonic distortion at maximum output current V i =V; R L = 50 Ω % Notes. Frequency response externally fixed by the input coupling capacitors. 2. Noise output voltage is measured in a bandwidth of 20 Hz to 20 khz (unweighted). 3. The common-mode rejection ratio is measured at the output, with a voltage source of V (RMS), in accordance with test circuit (see Fig.3), while V INL and V INR are short-circuited. Frequencies between 00 Hz and 00 khz. 4. Ripple rejection is measured at the output, with R s =2kΩ; f = khz and a ripple amplitude of 2 V (p-p). 5. Ripple rejection is measured at the output, with R s =0 Ω up to 2 kω and f = 00 Hz to 20 khz; maximum ripple amplitude of 2 V (p-p). 995 Dec 5 5

6 .5 V V INL R s 5 kω 220 nf V CC 2.2 µf 00 nf OUTL 22 µf SVRR 47 µf V CM V INR R s 5 kω 220 nf µf R L 0 kω R L 0 kω OUTR MBD2 Fig.3 Test circuit. 0 MBD25 THD (%) f (Hz) 0 5 Fig.4 Total harmonic distortion as a function of frequency; V i =.0 V (RMS). 995 Dec 5 6

7 0 MBD26 CMR (db) () (2) 0 (3) f (Hz) 0 5 () R s =5kΩ. (2) R s =2kΩ. (3) R s =0Ω. Fig.5 Common-mode rejection as function of frequency; V CM =.0 V (RMS). MBD23 THD (%) V (mv) 0 4 i (rms) Fig.6 Total harmonic distortion as a function of input voltage; f = khz. 995 Dec 5 7

8 40 MBD24 CMR (db) V (mv) CM (rms) 300 Fig.7 Common-mode rejection as a function of common-mode input voltage; f = khz; R s =0Ω. 0 MBD2 CMR (db) () (2) (3) f (Hz) 0 5 () C2 = 22 µf. (2) C2 = 47 µf. (3) C2 = 00 µf. Fig. Common-mode rejection as a function of frequency; V CM =.0 V. 995 Dec 5

9 30 MBD22 SVR (db) f (Hz) 0 4 V ripple = 2 V (p-p); R s =2kΩ. Fig.9 Supply voltage ripple rejection as a function of frequency. APPLICATION INFORMATION.5 V V INL R s 5 kω 220 nf V CC 2.2 µf 00 nf OUTL V INR 0 µf 0 µf R s 5 kω 220 nf SVRR µf 2.2 µf R L 0 kω R L 0 kω OUTR MBD27 Fig.0 Application circuit balanced signal source. 995 Dec 5 9

10 PACKAGE OUTLINES DIP6: plastic dual in-line package; 6 leads (300 mil); long body SOT3- D M E seating plane A 2 A L A Z 6 e b b 9 w M c (e ) M H pin index E mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. A A 2 () () min. max. b b c D E e e L M E M H Note. Plastic or metal protrusions of 0.25 mm maximum per side are not included w () Z max OUTLINE VERSION REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE SOT3-050G09 MO-00AE Dec 5 0

11 SO6: plastic small outline package; 6 leads; body width 3.9 mm SOT09- D E A X c y H E v M A Z 6 9 Q A 2 A (A ) 3 A pin index θ L p L e b p w M detail X mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max..75 A A 2 A 3 b p c D () E () e H () E L L p Q v w y Z Note. Plastic or metal protrusions of 0.5 mm maximum per side are not included θ o o OUTLINE VERSION REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE SOT09-076E07S MS-02AC Dec 5

12 SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our IC Package Databook (order code ). DIP SOLDERING BY DIPPING OR BY WAVE The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (T stg max ). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. REPAIRING SOLDERED JOINTS Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 0 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds. SO REFLOW SOLDERING Reflow soldering techniques are suitable for all SO packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 25 to 250 C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 C. WAVE SOLDERING Wave soldering techniques can be used for all SO packages if the following conditions are observed: A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. The longitudinal axis of the package footprint must be parallel to the solder flow. The package footprint must incorporate solder thieves at the downstream end. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 0 seconds, if cooled to less than 50 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. REPAIRING SOLDERED JOINTS Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 0 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C. 995 Dec 5 2

13 DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 34). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 995 Dec 5 3