National Institute of Technology, Warangal, India. *2,3 Department of Electrical Engineering,

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1 Real Time Hardware Implementable Spectrum Sensor for Cognitive Radio Applications Chaitanya GV #1, P.Rajalakshmi *2, U. B. Desai *3 #1 Department of Electronics and Communication Engineering, National Institute of Technology, Warangal, India. *2,3 Department of Electrical Engineering, Indian Institute of Technology Hyderabad, India. { raji, Abstract A fundamental problem for Cognitive Radios (CR) is spectrum sensing, secondary users need to reliably detect weak primary signals of possibly different types over a targeted wide frequency band in order to identify spectral holes for opportunistic communications. In this paper energy detection technique based on Neyman-Pearson criterion is implemented to detect the presence of deterministic primary user (PU) signals in the channel. We designed a hardware implementable energy detector on a wireless testbed software defined radio (SDR) using USRP2 and an experimental study is carried out to measure the required SNR to achieve the desired probability of detection and false alarm. A comparative study was also made between the SNRs obtained from frequency and time domain analysis. Index Terms Cognitive Radio, Spectrum Sensing, Energy detection, FPGA, SDR, Hardware Co-simulation. I. INTRODUCTION The cognitive radio (CR), built on a software-defined radio, is defined as an intelligent wireless communication system that is aware of its environment and uses the methodology of understanding-by-building to learn from the environment and adapt to statistical variations in the input stimuli, with two primary objectives of highly reliable communication and efficient utilization of the radio spectrum [1].CR technology has already been adopted as a core platform in emerging wireless access standards such as the IEEE Wireless Regional Area Networks (WRANs) [2]. In a CR network, Cognitive (secondary or unlicensed) users are allowed to opportunistically access spectrum allocated to primary users (PUs) provided that such a utilization of licensed spectrum negligibly afflicts the quality of service of PUs. Spectrum sensing enables to meet such requirements [3]. Various signal processing techniques are being used for Spectrum sensing in both Collaborative and Distributed networks. The popular methods are based on energy detection, matched filtering and cyclo-stationary feature detection [4]. According to the IEEE standard, the specified detection time should be less than or equal to 2sec [5]. Matched filtering is an optimal way for signal detection in communication systems. However it requires prior knowledge of the licensed user signal which may not be available. Cyclostationary detection exploiting the periodicity in the modulated schemes [6] is another such example but requires high computational complexity and prior knowledge of the transmitted signal properties. Energy detection is often used to determine the presence of signals without prior knowledge of signals. However, limitation for energy detection is the decision threshold is subject to changing signal to noise ratio (SNR). This is one fundamental limit for detection of weak signals below the SNR wall. SNR wall is defined as the minimum SNR threshold due to noise uncertainty below which a detector unable to identify a primary signal reliably regardless of sensing time [7]. But due to its low implementation complexity and very little prior knowledge of deterministic characteristics of the transmitted signal by (PU) which makes Energy Detection an attractive option. To the best of our knowledge this is the first energy detector designed using Xilinx System Generator [8] implemented on Simulink based SDR using (Universal Software Radio Peripheral) USRP2 and a comparative study of SNRs was carried out between frequency and time domain analysis.. A generic OFDM signal is generated using USRP2 which is received by another USRP2 hosted on a computer and processed using the Energy Detector. USRP2 is a computer hosted hardware offered by Ettus research [9] which has been used along with WBX daughter boards. The signals processing of the received signal for Energy Detection is carried out on a host computer equipped with MATLAB (Simulink) enabled with Xilinx System Generator Block set. The overall paper is organized into five sections. In section II system level implementation of the transmission and reception end along with hardware components used are explained. Sections III deals with the description of Energy Detection Algorithm employed. Section IV deals with hardware implementation issues involved and finally section V presents the experimental results and concluding remarks. II.SYSTEM LEVEL HARDWARE DESCRIPTION A. Transmitter End Daughter board Fig. 1 System Architecture of Transmitter operating at a frequency of 1.95 GHz USRP2 can be integrated into MATLAB/Simulink environments which makes it flexible for both Software simulation using Simulink blocks and Hardware co- simulation with design tools such as Xilinx ISE with System Generator for Simulink interface. The transmitter consists of a USRP /12/$ IEEE

2 Simulink Transmitter block which supports communication between Simulink and a USRP2 board, allowing simulation and development of various software-defined radio applications. The transmitter block accepts a column vector input signal from Simulink and transmits signal and control data to a USRP2 board using User Datagram Protocol (UDP) packets. In the present implementation a generic orthogonal frequency division multiplexing (OFDM) signal is transmitted using the USRP2 RF front end. OFDM signal generation is done using the IFFT technique [10]. The transmitter parameters used for simulation are shown in table1. OFDM is used as it has received tremendous attention as one of the most promising technology to support wideband applications [11]-[12] in the recent past. To reduce the computational overhead on host computer a vector variable consisting time domain OFDM samples is called from the Workspace of MATLAB to Simulink which is then send to the USRP2 Transmitter block. For hardware optimization and efficient use of the Ethernet packets, the frame size of the input data to the transmitter block is set at 358 samples. The system level architecture of the Transmitter end is shown in Fig. 1. A Gigabit Ethernet interface allows applications to simultaneously send 50 MHz of RF bandwidth in and out of the USRP2. There are two 16 bit wideband DAC converters at 400 MS/s with programmable interpolation rates. WBX daughter board having coverage of 50MHz to 2.2GHz has been used with the USRP2 in the present implementation. The transmitted OFDM signal displayed by Spectrum Analyzer is shown in Fig. 2. A Spectrum of bandwidth 4 MHz with center frequency at 1.95GHz is chosen so that there is relatively less interferences due to operating Wi-Fi networks in the lab. The whole of the transmitter design was hosted on a Laptop running with 32-bit version of MATLAB/Simulink. downconverts and demodulates the waveform using the software on the PC. Fig. 2 Transmitted OFDM spectrum captured on Anritsu Spectrum Analyzer The effective bandwidth can be adjusted by suitably by selecting the sampling rate. For the present scenario a sampling rate of 2e-7 with a decimation factor of 32 is selected and a band of 4 MHz is being scanned. The received complex baseband signal samples are first unbuffered and split into complex and real streams using Simulink blocks and are sent for energy detection. The Energy PARAMETER VALUE Number of carriers 64 Modulation 16 QAM Number of pilots 4 Cyclic Extension 25% (16) Sample time 2e-7s Interpolation 32 Center Frequency 1.95 GHz Bandwidth 4 MHz TABLE1. Parameters used for transmitting OFDM signal B. Receiver End In the implementation of the Receiver we develop a system that consists of a host computer which is a personal computer (PC) operating on Windows XP professional operating system employing MATLAB/Simulink and Xilinx System Generator As shown in Fig. 3 the USRP2 Receiver hardware is interfaced to the PC using Gigabit Ethernet. The USRP2 Simulink block enables us to dynamically set the enter frequency, Gain, and Decimation parameters of the RF front end. Similar to the transmitter block USRP2 receiver hardware has two 100 MS/s analog to digital converters (ADC). The wideband ADC captures all the channels supported by the daughter boards (WBX in this case), then extracts, Fig3. System Architecture of Receiver detector is entirely implemented using Xilinx System Generator blocks so that it can be hardware (FPGA) implementable. The interfacing between the host computer and FPGA can be done using either UART or USB as shown in Fig. 3. The energy detection algorithm along with its implementation will be explained in detail in the following sections. III. ENERY DETECTION ALGORITHM AND IMPLEMENTATION A. DETECTION ALGORITHM Spectrum Sensing in CR by Energy detection involves the elemental issue of discrimination between samples that contain only noise and the samples that contain signal information embedded with high noise power. In energy detection, the energy of the received signal samples is compared to a fixed threshold to test the presence or absence of PUs. We consider a complex baseband equivalent signal for energy detection for hypothesis testing [13]-[14].

3 Fig. 4 Spectrum Sensing Architecture implemented on Simulink using Xilinx blockset based on Energy Detection for FPGA implementation The detection is the test of the following two hypotheses: H 0 : Y [n] = W[n] absence of signal H 1 : Y [n] = X[n] +W[n] presence of signal n = 1 N; where N is observation interval. (1) Here Y[n] is the signal received by CR user is an N dimensional vector space over R (Y ) is the sample size. W[n] is signal due to AWGN and X[n] is signal in the absence of noise. The decision static is defined as: T = (2) Where is the predefined threshold value. The noise power for the complex baseband signal down converted by the USRP2 is considered to be circularly symmetric complex Gaussian distribution. Let and represent signal and noise power respectively and represent the signal to noise ratio (SNR). It is well known that under the common detection performance criteria (Neyman-Pearson criteria) likelihood ratio yields the optimal hypothesis testing solution and performance is measured by a resulting pair of detection and false alarm probabilities (P d, P fa ).Each pair is associated with the particular threshold γ that tests the decision statistic[3]. Based on central limit theorem T under hypothesis H o can be approximated as a real Gaussian variable with mean and variance and H 1 can be approximated as real Gaussian variable with (1+) and variance 1 2 which can be expressed as, 1,12 Probability of false alarm P fa and probability of misdetection P m =1-P d are given as Q is complimentary cumulative distribution function of the standard Gaussian random variable. The minimum samples N min required to achieve a target P fa and P m is given by The threshold can be from (4) for a given value of P fa as 1 7 B. HARDWARE IMPLEMENTATION Fig. 5 Implementation of simplified periodogram based Energy Detection Algorithm Energy detection can be performed in both time and frequency domain. A conventional time domain implementation of energy detector consists of a low pass filter to reject out of band noise and adjacent signals, Nyquist ADC square law device and an integrator. This kind of implementation is quite inflexible, particularly in the case of narrowband signals and sine waves. But in the present architecture a periodogram based approach is used to estimate the spectrum by squaring the magnitude of Fast Fourier Transform (FFT) [15] as shown in Fig. 4. This architecture has the advantage to sense wider bandwidths, as a result of which arbitrary bandwidth of the modulated signal can be analyzed by selecting corresponding bins in the periodogram. This simplified implementation not only eliminates the use of a predefined fixed band pre filter but also allows us to choose variable size of FFT. To simplify implementation complexity, the fact that FFT is a linear operator is exploited and the mean of K samples is calculated by dividing by before performing the FFT and squaring operation. Spectrum Sensing Architecture implemented on Simulink using Xilinx blockset is shown in Fig. 4. Total hardware resources required on the FPGA to implement the energy detector are shown in table 2. The complex base band signal received from the Receiver block is unbuffered and split into

4 real and complex components using Simulink blocks as shown. These data streams are sent to the Gateway In block which feed data as fixed point. The data is sampled at integer multiple times the Simulink system period. This data can be send to the FPGA by Ethernet, UART or USB for the test of Spectrum vacancy. All the Xilinx hardware implementable blocks are shown in different colors in Fig. 4. And Simulink blocks are shown in white. The Energy Detection algorithm is implemented in four stages as shown in Fig. 5. The first stage consists of scaling the received input signal which includes raising the input magnitude by a factor of 1e5 for avoiding round off errors due very small input values followed by division by implemented using CORDIC 3.0 divider and the values are sent to the FFT block. This is implemented using FFT 7.1 in-pipelined streaming mode in order to stream data at equal input and output rates, edone and dv signals generated by FFT block are used for synchronizing data rates with other stages. In the third stage the squared magnitude of the data coming from FFT block is found and sent to the final stage. In the fourth stage data is accumulated K times before it is sent to the threshold detector which is implemented using MCode block. The decision output port goes high when input signal power is greater than the predefined threshold value. This decision is valid only when valid port goes high. Table II. Resources required for implementing the Energy Detector on FPGA Values estimated after post map Resource Slices 2,448 Flip Flops 11,506 Look Up Tables 8,103 I/O Buffers Multipliers/DSP48s Let n i denote the noise sample received then the estimate of noise power is given by 1 Quantity are collected over a period of time as shown in Fig. 6 are taken to estimate the noise variance. IV. EXPERIMENTAL RESULTS The experimental setup consisting of USRP2 boards and the host computers along with their interconnections during runtime are shown in Fig. 7. Fig. 7 Photograph of the entire experimental setup The performance of detector is measured with probability of detection (Pd) and probability of false alarm (P fa ). Performance of energy detector for different values of SNR and different sample size (N) can be characterized through Receiver operating characteristics (ROC) curves. The value of N is obtained from eqn. 6 for the desired operating range. Fig. 8 shows one such plot for various SNR values. The ROC curves clearly suggest that both P fa and P d either increase or decrease simultaneously, which acts as a trade off for choosing the desired operating region, in fact an explicit relation exist between the two as shown in eqn. 9 (2 ) (9) where erfc and erfc -1 are the complementary error function and its inverse, and is the SNR [16]. In practice, it is common to choose a fixed FFT size to meet the desired resolution with a moderate complexity and low latency, in the present simulation we have used a 1024 point FFT for computation. From the ROC curves it is evident that for a P fa 0.04 and P d 0.85, SNR of 6 db or above is required. Fig. 6 Fluctuating noise power samples collected over a period of time According to the law of large numbers the noise estimate converges in probability to the Expected value, which is equal to the true value. A large number of samples Fig. 8 Receiver Operating Characteristic (ROC) curves

5 The signal power received and the SNR at the receiver are varied suitably by adjusting the amplitude level of the transmitted signal by the USRP2. These variations are shown in fig. 9, for an increment in the transmitted signal power corresponding SNR values have also improved as expected. Fig. 9 SNR and power of the received signal for various amplitude levels of the transmitted signal For the calculation of SNR and the evaluation of the decision statistic the whole of the 1024 point FFT is used whose bandwidth is adjusted by varying the sampling frequency at the receiver. As all the samples were used, similar results must be obtained as the time domain signal is equivalent to its frequency counterpart after requisite prefiltering. To test this equivalency the time samples collected from the USRP2 receiver were analyzed using conventional time domain energy detector as described previously in section IIIB. An Equiripple FIR low pass filter (LPF) with F pass band frequency of 1.8MHz and F stop band frequency of 2.4MHz with a stop band attenuation of 40dB were used for pre-filtering. This was carried out using MATLAB Simulink blockset. The SNR values obtained in both implementations i.e. calculations from frequency analysis by FFT (SNR f ) and time domain analysis (SNR t ) is shown in table III. These calculations were carried out at particular amplitude levels of the transmitted signal which are shown in fig. 9. A mean absolute difference of around 7.1% is observed. This small variation is understandable and is due to spectral leakages in FFT bins and also due to roll off factors in the (LPF). The software backend for USRPN210 for Simulink are yet to be released, once they are available a standalone architecture will be implemented using the Energy detector in Fig. 4, as the USRPN210 board has DSP optimized FPGA resources. SNR f (db) SNR t (db) % absolute difference % % % % % % % % % % V. CONCLUSION A proof-of-concept Hardware Implementable Spectrum Sensor was designed using Energy Detection Algorithm using FFT Analysis. For the implementation of the algorithm a prior knowledge of noise variance is required which is calculated from a so called no signal channel of a specified bandwidth by collecting noise samples over a period of time and applying the law of large numbers. The performance of the detector is measured by plotting P fa and P d for different values of SNR. A comparison was also made between the SNRs obtained by frequency and time domain analysis. The proposed architecture can be implemented on any DSP optimized FPGA which has the aforementioned resources. We plan to use this Spectrum sensor as a part of CR network which uses dynamic frequency hopping in our future works. ACKNOWLEDGMENTS This work was partially funded by MCIT, DIT GOVERNMENT OF INDIA under the Cognitive Radio Project at IITH. REFERENCES [1] Simon Haykin Cognitive Radio: Brain-Empowered Wireless Communications IEEE Journal on selected areas in communication, vol. 23, no. 2, February 2005W.-K. Chen, Linear Networks and Systems (Book style). Belmont, CA: Wadsworth, 1993, pp [2] Working Group on Wireless Regional Area Networks, IEEE Std [Online]. Available: B.Smith, An approach to graphs of linear forms (Unpublished work style), unpublished. [3] Zhi Quan, Shuguang Cui, H. Vincent Poor, and Ali H. Sayed Collaborative Wideband Sensing for Cognitive Radios IEEE Signak Processing Magazine November [4] T. Yucek and H. Arslan, A survey of spectrum sensing algorithms for cognitive radio, Proc. IEEE, Vol. 97,pp , May [5] K. C. Carlos and D. Birru., "Ieee :an introduction to the first wireless standard based on cognitive radios;' IEEE journal of communications" vol. I, no. I, pp , April [6] W. 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