TL3016, TL3016Y ULTRA-FAST LOW-POWER PRECISION COMPARATORS

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1 Ultrafast Operation ns (Typ) Low Positive Supply Current 1.6 ma (Typ) Operates From a Single -V Supply or From a Split ±-V Supply Complementary Outputs Low Offset Voltage No Minimum Slew Rate Requirement Output Latch Capability Functional Replacement to the LT116 TL316, TL316Y ULTRA-FAST LOW-POWER PRECISION COMPARATORS SLCS13D MARCH 1997 REVISED MARCH 2 V CC+ IN+ IN V CC D AND PW PACKAGE (TOP VIEW) symbol (each comparator) Q OUT Q OUT GND LATCH ENABLE description The TL316 is an ultrafast comparator designed to interface directly to TTL logic while operating from either a single -V power supply or dual ± -V supplies. It features extremely tight offset voltage and high gain for precision applications. It has complementary outputs that can be latched using the LATCH ENABLE terminal. Figure 1 shows the positive supply current of this comparator. The TL316 only requires 1.6 ma (typical) to achieve a propagation delay of 7.6 ns. The TL316 is a pin-for-pin functional replacement for the LT116 comparator, offering higher speed operation but consuming half the power. TA AVAILABLE OPTIONS PACKAGED DEVICES SMALL OUTLINE (D) TSSOP (PW) CHIP FORM (Y) C to 7 C TL316CD TL316CPWLE TL316Y C to C TL316ID TL316IPWLE The PW packages are available left-ended taped and reeled only. Chip forms are tested at only. ICC Positive Supply Current ma IN + IN POSITIVE SUPPLY CURRENT FREE-AIR TEMPERATURE TA Free-Air Temperature C Figure 1 Q OUT Q OUT Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 2, Texas Instruments Incorporated POST OFFICE BOX 633 DALLAS, TEXAS 726 1

2 TL316, TL316Y ULTRA-FAST LOW-POWER PRECISION COMPARATORS SLCS13D MARCH 1997 REVISED MARCH 2 TL316Y chip information This chip displays characteristics similar to the TL316C. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform. BONDING PAD ASSIGNMENTS LATCH ENABLE () VCC+ (1) (1) (2) (1) (1) () (7) IN+ IN (2) (3) () + (7) () (6) VCC GND Q OUT Q OUT (6) CHIP THICKNESS: 1 MILS TYPICAL (3) (6) BONDING PADS: MILS MINIMUM TJ max = 1 C TOLERANCES ARE ±1%. () () (6) ALL DIMENSIONS ARE IN MILS. 63 TERMINALS 1 AND 6 CAN BE CONNECTED TO MULTIPLE PADS. COMPONENT COUNT Bipolars 3 MOSFETs 9 Resistors 6 Capacitors 1 2 POST OFFICE BOX 633 DALLAS, TEXAS 726

3 TL316, TL316Y ULTRA-FAST LOW-POWER PRECISION COMPARATORS SLCS13D MARCH 1997 REVISED MARCH 2 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage, V DD (see Note 1) V to 7 V Differential input voltage, V ID (see Note 2) V Input voltage range, V I V Input voltage, V I (LATCH ENABLE) V Output current, I O ± 2 ma Continuous total power dissipation See Dissipation Rating Table Operating free-air temperature range, T A C to C Storage temperature range, T stg C to 1 C Lead temperature 1,6 mm (1/16 inch) from case for 1 seconds C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential voltages, are with respect to network ground. 2. Differential voltages are at IN+ with respect to IN. PACKAGE TA 2 C POWER RATING DISSIPATION RATING TABLE DERATING FACTOR ABOVE TA = 7 C POWER RATING D 72 mw. mw/ C 6 mw PW 2 mw.2 mw/ C 336 mw POST OFFICE BOX 633 DALLAS, TEXAS 726 3

4 TL316, TL316Y ULTRA-FAST LOW-POWER PRECISION COMPARATORS SLCS13D MARCH 1997 REVISED MARCH 2 electrical characteristics at specified operating free-air temperature, V DD = ± V, V LE = (unless otherwise noted) VIO αvio IIO IIB PARAMETER Input offset voltage Temperature coefficient of input offset voltage Input offset current Input bias current TEST CONDITIONS TL316C TL316I MIN TYP MAX MIN TYP MAX TA = full range UNIT mv.. µv/ C TA = full range TA = full range 1 1 Common-mode input VDD = ± V VICR voltage range VDD = V CMRR ksvr VOL VOH IDD VIL VIH Common-mode rejection ratio 3.7 VIC 3. V, db Positive supply:.6 V +VDD. V, Supply-voltage rejection ratio Negative supply: 7 V VDD 2 V, Low-level output voltage High-level output voltage Positive supply current Negative supply current Low-level input voltage (LATCH ENABLE) High-level input voltage (LATCH ENABLE) I(sink) = ma, I(sink) = 1 ma, V+.6 V, V+.6 V, TA = full range V+.6 V, V+.6 V, IO = 1 ma, IO = 1 ma, µa µa V db mv V ma.. V 2 2 V Low-level input current VLE = 1 1 IIL (LATCH ENABLE) VLE = 2 V Full range for the TL316C is TA = C to 7 C. Full range for the TL316I is TA = C to C. All typical values are measures with. µa POST OFFICE BOX 633 DALLAS, TEXAS 726

5 switching characteristics, V DD = ± V, V LE = (unless otherwise noted) PARAMETER tpd1 Propagation delay time tsk(p) Pulse skew ( tpd+ tpd ) TEST CONDITIONS TL316, TL316Y ULTRA-FAST LOW-POWER PRECISION COMPARATORS SLCS13D MARCH 1997 REVISED MARCH 2 TL316C TL316I MIN TYP MAX MIN TYP MAX VI I = 1 mv, VOD = mv TA = full range VI I = 1 mv, VOD = 2 mv TA = full range VI = 1 mv, VOD = mv, UNIT ns.. ns tsu Setup time, LATCH ENABLE ns Full range for the TL316C is C to 7 C. Full range for the TL316I is C to C. tpd1 cannot be measured in automatic handling equipment with low values of overdrive. The TL316 is 1% tested with a 1-V step and -mv overdrive at only. Correlation tests have shown that tpd1 limits given can be ensured with this test, if additional dc tests are performed to ensure that all internal bias conditions are correct. For low overdrive conditions, VOS is added to the overdrive. TYPICAL CHARACTERISTICS Table of Graphs FIGURE Input voltage 2 ICC Positive supply current Frequency 3 Free-air temperature ICC Negative supply current Free-air temperature Overdrive voltage 6 Supply voltage 7 tpd Propagation delay time Input impedance Load capacitance 9 Free-air temperature 1 VIC Common-mode input voltage Free-air temperature 11 Input threshold voltage (LATCH ENABLE) Free-air temperature 12 VO Output voltage Output source current 13 Output sink current 1 II Input current (LATCH ENABLE) Input voltage 1 POST OFFICE BOX 633 DALLAS, TEXAS 726

6 TL316, TL316Y ULTRA-FAST LOW-POWER PRECISION COMPARATORS SLCS13D MARCH 1997 REVISED MARCH 2 TYPICAL CHARACTERISTICS ICC Positive Supply Current ma POSITIVE SUPPLY CURRENT INPUT VOLTAGE ÎÎÎÎ ÎÎÎÎ TA = C TA = C Positive Supply Current ma ICC POSITIVE SUPPLY CURRENT FREQUENCY TA = C TA = C VI Input Voltage V Figure f Frequency MHz Figure POSITIVE SUPPLY CURRENT FREE-AIR TEMPERATURE NEGATIVE SUPPLY CURRENT FREE-AIR TEMPERATURE ICC Positive Supply Current ma Negative Supply Current ma ICC TA Free-Air Temperature C Figure TA Free-Air Temperature C Figure POST OFFICE BOX 633 DALLAS, TEXAS 726

7 TL316, TL316Y ULTRA-FAST LOW-POWER PRECISION COMPARATORS SLCS13D MARCH 1997 REVISED MARCH 2 TYPICAL CHARACTERISTICS Propagation Delay Time ns tpd PROPAGATION DELAY TIME OVERDRIVE VOLTAGE tpd Propagation Delay Time ns PROPAGATION DELAY TIME SUPPLY VOLTAGE Falling Edge Rising Edge Overdrive Voltage mv Figure VCC Supply Voltage V Figure tpd Propagation Delay Time ns PROPAGATION DELAY TIME INPUT IMPEDANCE mv 2 mv tpd Propagation Delay Time ns PROPAGATION DELAY TIME LOAD CAPACITANCE tpdhl tpdlh ZO Input Impedance Ω Figure CL Load Capacitance pf Figure 9 POST OFFICE BOX 633 DALLAS, TEXAS 726 7

8 TL316, TL316Y ULTRA-FAST LOW-POWER PRECISION COMPARATORS SLCS13D MARCH 1997 REVISED MARCH 2 TYPICAL CHARACTERISTICS Propagation Delay Time ns t pd PROPAGATION DELAY TIME FREE-AIR TEMPERATURE 2 2 Rising Edge TA Free-Air Temperature C Figure 1 Falling Edge V IC Common-Mode Input Voltage V COMMON-MODE INPUT VOLTAGE FREE-AIR TEMPERATURE ÎÎÎ VCC = V (Upper Limit) (Upper Limit) ÎÎÎ VCC = V (Lower Limit) ÎÎÎ (Lower Limit) TA Free-Air Temperature C Figure 11 VIT Input Threshold Voltage (LATCH ENABLE) V INPUT THRESHOLD VOLTAGE (LATCH ENABLE) FREE-AIR TEMPERATURE TA Free-Air Temperature C Figure 12 V O Output Voltage V OUTPUT VOLTAGE OUTPUT SOURCE CURRENT TA = C TA = C 3 1 Figure IO(source) Output Source Current ma POST OFFICE BOX 633 DALLAS, TEXAS 726

9 TL316, TL316Y ULTRA-FAST LOW-POWER PRECISION COMPARATORS SLCS13D MARCH 1997 REVISED MARCH 2 TYPICAL CHARACTERISTICS Output Voltage V V O OUTPUT VOLTAGE OUTPUT SINK CURRENT TA = C TA = C II Input Current (LATCH ENABLE) µ A INPUT CURRENT (LATCH ENABLE) INPUT VOLTAGE 1 IO(sink) Output Sink Current ma Figure VI Input Voltage V Figure POST OFFICE BOX 633 DALLAS, TEXAS 726 9

10 PACKAGE OPTION ADDENDUM 1-Jun-21 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan TL316CD ACTIVE SOIC D 7 Green (RoHS TL316CDG ACTIVE SOIC D 7 Green (RoHS TL316CDR ACTIVE SOIC D 2 Green (RoHS TL316CDRG ACTIVE SOIC D 2 Green (RoHS TL316CPW ACTIVE TSSOP PW 1 Green (RoHS (2) Lead/Ball Finish (6) MSL Peak Temp TL316CPWLE OBSOLETE TSSOP PW TBD Call TI Call TI TL316CPWR ACTIVE TSSOP PW 2 Green (RoHS TL316ID ACTIVE SOIC D 7 Green (RoHS TL316IDG ACTIVE SOIC D 7 Green (RoHS TL316IDR ACTIVE SOIC D 2 Green (RoHS TL316IDRG ACTIVE SOIC D 2 Green (RoHS TL316IPW ACTIVE TSSOP PW 1 Green (RoHS TL316IPWLE OBSOLETE TSSOP PW TBD Call TI Call TI TL316IPWR ACTIVE TSSOP PW 2 Green (RoHS TL316IPWRG ACTIVE TSSOP PW 2 Green (RoHS (3) Op Temp ( C) CU NIPDAU Level-1-26C-UNLIM to 7 316C CU NIPDAU Level-1-26C-UNLIM to 7 316C CU NIPDAU Level-1-26C-UNLIM to 7 316C CU NIPDAU Level-1-26C-UNLIM to 7 316C CU NIPDAU Level-1-26C-UNLIM to 7 T316 CU NIPDAU Level-1-26C-UNLIM to 7 T316 CU NIPDAU Level-1-26C-UNLIM - to 316I CU NIPDAU Level-1-26C-UNLIM - to 316I CU NIPDAU Level-1-26C-UNLIM - to 316I CU NIPDAU Level-1-26C-UNLIM - to 316I CU NIPDAU Level-1-26C-UNLIM - to Z316 CU NIPDAU Level-1-26C-UNLIM - to Z316 CU NIPDAU Level-1-26C-UNLIM - to Z316 Device Marking (/) Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. Addendum-Page 1

11 PACKAGE OPTION ADDENDUM 1-Jun-21 (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS - please check for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS : TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. () There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. () Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

12 PACKAGE MATERIALS INFORMATION 13-Feb-216 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) A (mm) B (mm) K (mm) P1 (mm) W (mm) Pin1 Quadrant TL316CDR SOIC D Q1 TL316IDR SOIC D Q1 Pack Materials-Page 1

13 PACKAGE MATERIALS INFORMATION 13-Feb-216 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TL316CDR SOIC D TL316IDR SOIC D Pack Materials-Page 2

SCALE 2. PWA PACKAGE OUTLINE TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 6.6 TYP 6.2 SEATING PLANE C A PIN 1 ID AREA.1 C 1 6X.6 3.1 2.9 NOTE 3 2X 1.9 B..3 NOTE X.3.19.1 C A B 1.

14 SCALE 2. PWA PACKAGE OUTLINE TSSOP mm max height SMALL OUTLINE PACKAGE 6.6 TYP 6.2 SEATING PLANE C A PIN 1 ID AREA.1 C 1 6X NOTE 3 2X 1.9 B..3 NOTE X C A B 1.2 MAX SEE DETAIL A (.1) TYP.2 GAGE PLANE -.7. DETAIL A TYPICAL /A 2/21 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y1.M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed.1 mm per side.. This dimension does not include interlead flash. Interlead flash shall not exceed.2 mm per side.. Reference JEDEC registration MO-13, variation AA.

15 PWA EXAMPLE BOARD LAYOUT TSSOP mm max height SMALL OUTLINE PACKAGE X (.) 1 X (1.) SYMM (R.) TYP SYMM 6X (.6) (.) LAND PATTERN EXAMPLE SCALE:1X SOLDER MASK OPENING METAL METAL UNDER SOLDER MASK SOLDER MASK OPENING. MAX ALL AROUND. MIN ALL AROUND NON SOLDER MASK DEFINED SOLDER MASK DEFINED SOLDER MASK DETAILS NOT TO SCALE 221/A 2/21 NOTES: (continued) 6. Publication IPC-731 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

16 PWA EXAMPLE STENCIL DESIGN TSSOP mm max height SMALL OUTLINE PACKAGE X (.) 1 X (1.) SYMM (R.) TYP SYMM 6X (.6) (.) SOLDER PASTE EXAMPLE BASED ON.12 mm THICK STENCIL SCALE:1X 221/A 2/21 NOTES: (continued). Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-72 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design.

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absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Low Input Bias Current...50 pa Typ Low Input Noise Current 0.01 pa/ Hz Typ Low Supply Current... 4.5 ma Typ High Input impedance...10 12 Ω Typ Internally Trimmed Offset Voltage Wide Gain Bandwidth...3