Application Note E Advanced Device Configuration. Figure 1. E Evaluation-Kit (Version V2.0)

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1 1 Introduction Application Note E Advanced Device Configuration 1.1 Abstract This Application Note describes some enhanced configuration opportunities for the Elmos E522.41, especially in Stand-Alone Mode (see Chapter 2 Device Configuration ). In addition, several hints for EMC-optimized PCB layout are provided in Chapter 3 PCB Layout Guidelines. 1.2 References Figure 1. E Evaluation-Kit (Version V2.0) For further information about Operating Conditions, Electrical Parameters and a Functional Description of E please refer to the Datasheet (QM-No.: 25DS0025E.xx). A detailed description of the E Evaluation-Kit and the corresponding User Interface is given at the particular Evaluation-Kit s Application Note, which is delivered separately by the Evaluation-Kit CD. 1/5

2 2 Device Configuration 2.1 Overcurrent Thresholds For the limitation of the application current various overcurrent thresholds are selectable via I 2 C communication (see Table 1. Overcurrent Thresholds ). The E monitors the average value of the external application output current to the USB load by measuring of the corresponding voltage across the shunt resistor RS (see Datasheet, Chapter BUS Current Measurement). Hence, a slight adaption of the programmed overcurrent threshold can be done by minor changes of the shunt resistor. To get a desired overcurrent threshold I LIM,desired from a programmed value I LIM,programmed, the necessary shunt resistor R S can be calculated by: R S =50mΩ I LIM,programmed I LIM,desired Note: Not only the overcurrent monitoring but also Light Load Detection and especially Negative Resistance Programming (NRP) are referred to current measurement across the shunt resistor R S. To ensure the stability of the current regulation loop it is recommended to change the shunt resistor not more than 20mΩ. Even if the NRP source resistance is increased as a result of changing the shunt resistor RS, the output voltage at pin BUS is limited at V NRP,LIM (6V) to prevent overvoltage at the load in case of intermittent connections or if the load is suddenly removed. The overcurrent threshold (I LXT,H ) of the reliable protection by the additional fast current limitation of the high-side power switch is not adjustable by the selection of the shunt resistor R S. Table 1. Overcurrent Thresholds No. Description Condition Symbol Min Typ Max Unit Current Regulation and Limitation limits 1 I LIM A 2, 2) I LIM A 3 I LIM A 4 Current limit 1 to 7 I LIM A 5, 2) I LIM A 6 I LIM A 7, 2) I LIM A Programmed in Setup_SMPS Register via I 2 C communication. 2) Not Programmed via CFG1, CFG2 and CFG3 configuration pins in Stand-Alone mode. 2/5

3 3 PCB Layout Guidelines Careful PCB layout is critical to achieve low switching losses and clean, stable operation. Use a multi-layer board whenever possible for better noise immunity and power dissipation. Follow these guidelines for good PCB layout: 1. Use a large contiguous copper plane under the IC package. Ensure that all heat-dissipating components have adequate cooling. The bottom pad of the IC must be soldered down to this copper plane for effective heat dissipation and getting the full power out of the IC. Use multiple via or a single large via in this plane for heat dissipation 2. Isolate the power components and high current path from the sensitive analog circuitry. This is essential to prevent any noise coupling into the analog signals. 3. Keep the high-current paths short, especially at the ground terminals. This practice is essential for stable, jitterfree operation. The high current path comprising of input capacitor, SW[1,2], LX[1,2], inductor and the output capacitor should be as short as possible. 4. Keep the power traces and load connections short. This practice is essential for high efficiency. 5. The analog signal lines should be routed away from the high frequency planes. This ensures integrity of sensitive signals feeding back into the IC. 6. The ground connection for the analog and power section should be close to the IC. This keeps the ground current loops to a minimum. In cases where only one ground is used enough isolation between analog return signals and high power signals must be maintained. As an example and corresponding to the typical application schematic of Figure 2. Typical Application Schematic, the PCB layout of our E Evaluation-Kit is shown in Figure 3. Layout E Evaluation-Kit (Top Layer). At this PCB, all essential SMPS components (highlighted red in Figure 2) are located inside the marked rectangle (size: 3.1cm x 2.3cm). They are surrounded by some equipment for better Board Handling and Measurement (USB Connectors, Status-LEDs, Banana Plugs, etc.). An enlarged view of the SMPS area is presented in Figure 4. Layout E Evaluation-Kit (Zoom SMPS Area) described above, the high-current paths are kept short and connected to a common ground plane. Indispensable SMPS components are highlighted by blue color in Figure 4. Besides, the PCB layout already considers optional EMC- Filter components. Footprints R21 and C12 can be used for an additional Snubber Circuit at Pin LX1/2, although it isn t mandatory for stable operation of the SMPS. (The figure doesn t show components placed on Bottom Layer, including the compensation network (C9, C8, R6, located between IC1 and Testpoint T5-CMP), CHDR- and VDD- Bypass Capacitors.) A recommended suggestion for the selection of SMPS components can be found at the Datasheet (see Chapter 1.2 References ). VBAT L3 C5 C6 C3 C4 L4 C7 C 2 C22 C23 I 2 C address selection input Synchronizing frequency I 2 C communication input I 2 C communication input Interrupt request output System activate input USB2.0 Data comm. (+) USB2.0 Data comm. (-) R 2 R 4 R 3 ADR VDD SDA SCL INTB EN D+ D- SUP Peripheral Supply Control Logic with I 2 C Interface SMPS USB2.0 Data Switch and Protection BC 1.2 Port Identification SW1/2 CHDR LX1 LX2 CS BUS CMP PD+ PD- C21 C8 R 6 D 1 L 1 R1 R 29 C 9 C14 C 1 L2 C 15 C 16 Optional ESD Clamp D 3 5.1V@2.5A D4 VBUS D+ D- USB Connector Figure 2. Typical Application Schematic 3/5

4 Figure 3. Layout E Evaluation-Kit (Top Layer) Figure 4. Layout E Evaluation-Kit (Zoom SMPS Area) 4/5

5 Usage Restrictions Elmos Semiconductor AG provide the E Demonstration Board simply and solely for IC evaluation purposes in laboratory. The Kit or any part of the Kit must not be used for other purposes or within non laboratory environments. Especially the use or the integration in production systems, appliances or other installations is prohibited. The pcb s are delivered to customer are for the temporary purpose of testing, evaluation and development of the Elmos IC s only. Elmos will not assume any liability for additional applications of the pcb. Disclaimer Elmos Semiconductor AG shall not be liable for any damages arising out of defects resulting from ( delivered hardware or software, (2) non observance of instructions contained in this document, or (3) misuse, abuse, use under abnormal conditions or alteration by anyone other than Elmos Semiconductor AG. To the extend permitted by law Elmos Semiconductor AG hereby expressively disclaims and user expressively waives any and all warranties of merchantability and of fitness for a particular purpose, statutory warranty of non-infringement and any other warranty or product liability that may arise by reason of usage of trade, custom or course of dealing. Elmos Semiconductor AG Headquarters Heinrich-Hertz-Str Dortmund Germany Phone + 49 (0) Fax + 49 (0) sales-germany@elmos.com Note Elmos Semiconductor AG (below Elmos) reserves the right to make changes to the product contained in this publication without notice. Elmos assumes no responsibility for the use of any circuits described herein, conveys no licence under any patent or other right, and makes no representation that the circuits are free of patent infringement. While the information in this publication has been checked, no responsibility, however, is assumed for inaccuracies. Elmos does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of a life-support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications. Copyright 2016 Elmos Reproduction, in part or whole, without the prior written consent of Elmos, is prohibited. 5/5